Searched refs:msix_ctrl (Results 1 – 2 of 2) sorted by relevance
| /drivers/net/ethernet/huawei/hinic/ |
| D | hinic_hw_if.c | 43 u32 msix_ctrl, addr; in hinic_msix_attr_set() local
48 msix_ctrl = HINIC_MSIX_ATTR_SET(pending_limit, PENDING_LIMIT) | in hinic_msix_attr_set()
56 hinic_hwif_write_reg(hwif, addr, msix_ctrl); in hinic_msix_attr_set()
102 u32 msix_ctrl, addr; in hinic_msix_attr_cnt_clear() local
107 msix_ctrl = HINIC_MSIX_CNT_SET(1, RESEND_TIMER); in hinic_msix_attr_cnt_clear()
110 hinic_hwif_write_reg(hwif, addr, msix_ctrl); in hinic_msix_attr_cnt_clear()
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| /drivers/pci/ |
| D | msi.c | 193 desc->msix_ctrl |= PCI_MSIX_ENTRY_CTRL_MASKBIT; in pci_msix_mask()
194 pci_msix_write_vector_ctrl(desc, desc->msix_ctrl); in pci_msix_mask()
201 desc->msix_ctrl &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; in pci_msix_unmask()
202 pci_msix_write_vector_ctrl(desc, desc->msix_ctrl); in pci_msix_unmask()
294 u32 ctrl = entry->msix_ctrl; in __pci_write_msi_msg()
452 pci_msix_write_vector_ctrl(entry, entry->msix_ctrl); in __pci_restore_msix_state()
651 entry->msix_ctrl = readl(addr + PCI_MSIX_ENTRY_VECTOR_CTRL); in msix_setup_entries()
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