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Searched refs:mvdd (Results 1 – 25 of 25) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dvegam_smumgr.c603 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) in vegam_get_dependency_volt_by_clk() argument
609 *voltage = *mvdd = 0; in vegam_get_dependency_volt_by_clk()
634 *mvdd = data->vbios_boot_state.mvdd_bootup_value * in vegam_get_dependency_volt_by_clk()
636 else if (dep_table->entries[i].mvdd) in vegam_get_dependency_volt_by_clk()
637 *mvdd = (uint32_t) dep_table->entries[i].mvdd * in vegam_get_dependency_volt_by_clk()
663 *mvdd = data->vbios_boot_state.mvdd_bootup_value * VOLTAGE_SCALE; in vegam_get_dependency_volt_by_clk()
664 else if (dep_table->entries[i].mvdd) in vegam_get_dependency_volt_by_clk()
665 *mvdd = (uint32_t) dep_table->entries[i - 1].mvdd * VOLTAGE_SCALE; in vegam_get_dependency_volt_by_clk()
815 uint32_t mvdd; in vegam_populate_single_graphic_level() local
826 &level->MinVoltage, &mvdd); in vegam_populate_single_graphic_level()
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Dfiji_smumgr.c354 uint32_t clock, uint32_t *voltage, uint32_t *mvdd) in fiji_get_dependency_volt_by_clk() argument
359 *voltage = *mvdd = 0; in fiji_get_dependency_volt_by_clk()
385 *mvdd = data->vbios_boot_state.mvdd_bootup_value * in fiji_get_dependency_volt_by_clk()
387 else if (dep_table->entries[i].mvdd) in fiji_get_dependency_volt_by_clk()
388 *mvdd = (uint32_t) dep_table->entries[i].mvdd * in fiji_get_dependency_volt_by_clk()
410 *mvdd = data->vbios_boot_state.mvdd_bootup_value * VOLTAGE_SCALE; in fiji_get_dependency_volt_by_clk()
411 else if (dep_table->entries[i].mvdd) in fiji_get_dependency_volt_by_clk()
412 *mvdd = (uint32_t) dep_table->entries[i - 1].mvdd * VOLTAGE_SCALE; in fiji_get_dependency_volt_by_clk()
941 uint32_t mvdd; in fiji_populate_single_graphic_level() local
957 (uint32_t *)(&level->MinVoltage), &mvdd); in fiji_populate_single_graphic_level()
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Dpolaris10_smumgr.c355 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) in polaris10_get_dependency_volt_by_clk() argument
361 *voltage = *mvdd = 0; in polaris10_get_dependency_volt_by_clk()
386 *mvdd = data->vbios_boot_state.mvdd_bootup_value * in polaris10_get_dependency_volt_by_clk()
388 else if (dep_table->entries[i].mvdd) in polaris10_get_dependency_volt_by_clk()
389 *mvdd = (uint32_t) dep_table->entries[i].mvdd * in polaris10_get_dependency_volt_by_clk()
413 *mvdd = data->vbios_boot_state.mvdd_bootup_value * VOLTAGE_SCALE; in polaris10_get_dependency_volt_by_clk()
414 else if (dep_table->entries[i].mvdd) in polaris10_get_dependency_volt_by_clk()
415 *mvdd = (uint32_t) dep_table->entries[i - 1].mvdd * VOLTAGE_SCALE; in polaris10_get_dependency_volt_by_clk()
960 uint32_t mvdd; in polaris10_populate_single_graphic_level() local
977 &level->MinVoltage, &mvdd); in polaris10_populate_single_graphic_level()
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Dtonga_smumgr.c248 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) in tonga_get_dependency_volt_by_clk() argument
278 if (allowed_clock_voltage_table->entries[i].mvdd) in tonga_get_dependency_volt_by_clk()
279 *mvdd = (uint32_t) allowed_clock_voltage_table->entries[i].mvdd; in tonga_get_dependency_volt_by_clk()
296 if (allowed_clock_voltage_table->entries[i-1].mvdd) in tonga_get_dependency_volt_by_clk()
297 *mvdd = (uint32_t) allowed_clock_voltage_table->entries[i-1].mvdd; in tonga_get_dependency_volt_by_clk()
621 uint32_t mvdd; in tonga_populate_single_graphic_level() local
637 &graphic_level->MinVoltage, &mvdd); in tonga_populate_single_graphic_level()
975 uint32_t mvdd = 0; in tonga_populate_single_memory_level() local
986 &memory_level->MinVoltage, &mvdd); in tonga_populate_single_memory_level()
997 memory_level->MinMvdd = mvdd; in tonga_populate_single_memory_level()
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dhwmgr_ppt.h40 uint16_t mvdd; member
Dsmu_helper.c265 vol_table->entries[i].value = dep_table->entries[i].mvdd; in phm_get_svi2_mvdd_voltage_table()
715 dep_table->entries[i].mvdd = allowed_dep_table->entries[i].mvdd; in smu_get_voltage_dependency_table_ppt_v1()
Dprocess_pptables_v1_0.c391 mclk_table_record->mvdd = le16_to_cpu(mclk_dep_record->usMvdd); in get_mclk_voltage_dependency_table()
Dvega10_hwmgr.c703 mclk_table->entries[entry_id].mvdd = in vega10_patch_voltage_dependency_tables_with_lookup_table()
1071 vol_table->entries[i].value = dep_table->entries[i].mvdd; in vega10_get_mvdd_voltage_table()
1851 (uint8_t)(convert_to_vid(dep_on_mclk->entries[i].mvdd)); in vega10_populate_single_memory_level()
/drivers/gpu/drm/radeon/
Drv770_smc.h111 RV770_SMC_VOLTAGE_VALUE mvdd; member
Dnislands_smc.h111 NISLANDS_SMC_VOLTAGE_VALUE mvdd; member
Drv730_dpm.c308 rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in rv730_populate_smc_acpi_state()
365 &table->initialState.levels[0].mvdd); in rv730_populate_smc_initial_state()
Dsislands_smc.h156 SISLANDS_SMC_VOLTAGE_VALUE mvdd; member
Drv770_dpm.c670 ret = rv770_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in rv770_convert_power_level_to_smc()
999 rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in rv770_populate_smc_acpi_state()
1076 &table->initialState.levels[0].mvdd); in rv770_populate_smc_initial_state()
2251 u16 vddc, vddci, mvdd; in rv7xx_parse_pplib_clock_info() local
2252 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in rv7xx_parse_pplib_clock_info()
Drv740_dpm.c394 rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in rv740_populate_smc_acpi_state()
Dcypress_dpm.c760 ret = cypress_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in cypress_convert_power_level_to_smc()
1297 &table->initialState.levels[0].mvdd); in cypress_populate_smc_initial_state()
1459 cypress_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in cypress_populate_smc_acpi_state()
Dni_dpm.c1749 ni_populate_initial_mvdd_value(rdev, &table->initialState.level.mvdd); in ni_populate_smc_initial_state()
1919 ni_populate_mvdd_value(rdev, 0, &table->ACPIState.level.mvdd); in ni_populate_smc_acpi_state()
2389 ni_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in ni_convert_power_level_to_smc()
3971 u16 vddc, vddci, mvdd; in ni_parse_pplib_clock_info() local
3972 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in ni_parse_pplib_clock_info()
Dradeon_atombios.c2371 u16 *vddc, u16 *vddci, u16 *mvdd) in radeon_atombios_get_default_voltages() argument
2381 *mvdd = 0; in radeon_atombios_get_default_voltages()
2391 *mvdd = le16_to_cpu(firmware_info->info_22.usBootUpMVDDCVoltage); in radeon_atombios_get_default_voltages()
2403 u16 vddc, vddci, mvdd; in radeon_atombios_parse_pplib_non_clock_info() local
2405 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in radeon_atombios_parse_pplib_non_clock_info()
Dradeon_mode.h721 u16 *vddc, u16 *vddci, u16 *mvdd);
Dsi_dpm.c4429 si_populate_initial_mvdd_value(rdev, &table->initialState.level.mvdd); in si_populate_smc_initial_state()
4589 si_populate_mvdd_value(rdev, 0, &table->ACPIState.level.mvdd); in si_populate_smc_acpi_state()
5062 ret = si_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in si_convert_power_level_to_smc()
6770 u16 vddc, vddci, mvdd; in si_parse_pplib_clock_info() local
6771 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in si_parse_pplib_clock_info()
6776 si_pi->mvdd_bootup_value = mvdd; in si_parse_pplib_clock_info()
Drv6xx_dpm.c1864 u16 vddc, vddci, mvdd; in rv6xx_parse_pplib_clock_info() local
1865 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in rv6xx_parse_pplib_clock_info()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_atombios.h197 u16 *vddc, u16 *vddci, u16 *mvdd);
Damdgpu_atombios.c1157 u16 *vddc, u16 *vddci, u16 *mvdd) in amdgpu_atombios_get_default_voltages() argument
1167 *mvdd = 0; in amdgpu_atombios_get_default_voltages()
1177 *mvdd = le16_to_cpu(firmware_info->info_22.usBootUpMVDDCVoltage); in amdgpu_atombios_get_default_voltages()
/drivers/gpu/drm/amd/pm/powerplay/
Dsi_dpm.h442 RV770_SMC_VOLTAGE_VALUE mvdd; member
762 NISLANDS_SMC_VOLTAGE_VALUE mvdd; member
Dsislands_smc.h156 SISLANDS_SMC_VOLTAGE_VALUE mvdd; member
Dsi_dpm.c4893 si_populate_initial_mvdd_value(adev, &table->initialState.level.mvdd); in si_populate_smc_initial_state()
5052 si_populate_mvdd_value(adev, 0, &table->ACPIState.level.mvdd); in si_populate_smc_acpi_state()
5524 ret = si_populate_mvdd_value(adev, pl->mclk, &level->mvdd); in si_convert_power_level_to_smc()
7187 u16 vddc, vddci, mvdd; in si_parse_pplib_clock_info() local
7188 amdgpu_atombios_get_default_voltages(adev, &vddc, &vddci, &mvdd); in si_parse_pplib_clock_info()
7193 si_pi->mvdd_bootup_value = mvdd; in si_parse_pplib_clock_info()