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Searched refs:num_reg (Results 1 – 17 of 17) sorted by relevance

/drivers/of/
Dplatform.c111 int rc, i, num_reg = 0, num_irq; in of_device_alloc() local
119 while (of_address_to_resource(np, num_reg, &temp_res) == 0) in of_device_alloc()
120 num_reg++; in of_device_alloc()
124 if (num_irq || num_reg) { in of_device_alloc()
125 res = kcalloc(num_irq + num_reg, sizeof(*res), GFP_KERNEL); in of_device_alloc()
131 dev->num_resources = num_reg + num_irq; in of_device_alloc()
133 for (i = 0; i < num_reg; i++, res++) { in of_device_alloc()
/drivers/mfd/
Dstm32-timers.c51 unsigned int num_reg, unsigned int bursts, in stm32_timers_dma_burst_read() argument
58 size_t len = num_reg * bursts * sizeof(u32); in stm32_timers_dma_burst_read()
71 if (!num_reg || !bursts || reg > STM32_TIMERS_MAX_REGISTERS || in stm32_timers_dma_burst_read()
72 (reg + num_reg * sizeof(u32)) > STM32_TIMERS_MAX_REGISTERS) in stm32_timers_dma_burst_read()
/drivers/crypto/marvell/octeontx2/
Dotx2_cptpf_main.c167 int reg, dev, vf, start_vf, num_reg = 1; in cptpf_vf_flr_intr() local
172 num_reg = 2; in cptpf_vf_flr_intr()
174 for (reg = 0; reg < num_reg; reg++) { in cptpf_vf_flr_intr()
200 int reg, vf, num_reg = 1; in cptpf_vf_me_intr() local
204 num_reg = 2; in cptpf_vf_me_intr()
206 for (reg = 0; reg < num_reg; reg++) { in cptpf_vf_me_intr()
/drivers/gpu/drm/msm/hdmi/
Dhdmi_pll_8960.c32 int num_reg; member
393 for (i = 0; i < pll_rate->num_reg; i++) in hdmi_pll_set_rate()
/drivers/gpu/drm/radeon/
Dradeon_device.c272 rdev->scratch.num_reg = 5; in radeon_scratch_init()
274 rdev->scratch.num_reg = 7; in radeon_scratch_init()
277 for (i = 0; i < rdev->scratch.num_reg; i++) { in radeon_scratch_init()
296 for (i = 0; i < rdev->scratch.num_reg; i++) { in radeon_scratch_get()
318 for (i = 0; i < rdev->scratch.num_reg; i++) { in radeon_scratch_free()
Dr600.c2815 rdev->scratch.num_reg = 7; in r600_scratch_init()
2817 for (i = 0; i < rdev->scratch.num_reg; i++) { in r600_scratch_init()
Dsi.c3361 rdev->scratch.num_reg = 7; in si_scratch_init()
3363 for (i = 0; i < rdev->scratch.num_reg; i++) { in si_scratch_init()
Dradeon.h703 unsigned num_reg; member
Dcik.c3426 rdev->scratch.num_reg = 7; in cik_scratch_init()
3428 for (i = 0; i < rdev->scratch.num_reg; i++) { in cik_scratch_init()
/drivers/net/ethernet/marvell/octeontx2/nic/
Dotx2_pf.c138 int reg, dev, vf, start_vf, num_reg = 1; in otx2_pf_flr_intr_handler() local
142 num_reg = 2; in otx2_pf_flr_intr_handler()
144 for (reg = 0; reg < num_reg; reg++) { in otx2_pf_flr_intr_handler()
167 int vf, reg, num_reg = 1; in otx2_pf_me_intr_handler() local
171 num_reg = 2; in otx2_pf_me_intr_handler()
173 for (reg = 0; reg < num_reg; reg++) { in otx2_pf_me_intr_handler()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_gfx.h119 unsigned num_reg; member
Damdgpu_gfx.c115 if (i != 0 && i <= adev->gfx.scratch.num_reg) { in amdgpu_gfx_scratch_get()
Dgfx_v6_0.c1784 adev->gfx.scratch.num_reg = 8; in gfx_v6_0_scratch_init()
1786 adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; in gfx_v6_0_scratch_init()
Dgfx_v7_0.c2067 adev->gfx.scratch.num_reg = 8; in gfx_v7_0_scratch_init()
2069 adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; in gfx_v7_0_scratch_init()
Dgfx_v8_0.c840 adev->gfx.scratch.num_reg = 8; in gfx_v8_0_scratch_init()
842 adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; in gfx_v8_0_scratch_init()
Dgfx_v9_0.c1024 adev->gfx.scratch.num_reg = 8; in gfx_v9_0_scratch_init()
1026 adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; in gfx_v9_0_scratch_init()
Dgfx_v10_0.c3827 adev->gfx.scratch.num_reg = 8; in gfx_v10_0_scratch_init()
3829 adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; in gfx_v10_0_scratch_init()