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Searched refs:opp_cnt (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_optc.c203 static void optc3_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc3_set_odm_combine() argument
208 / opp_cnt; in optc3_set_odm_combine()
219 ASSERT(opp_cnt == 2 || opp_cnt == 4); in optc3_set_odm_combine()
224 if (opp_cnt == 2) { in optc3_set_odm_combine()
229 } else if (opp_cnt == 4) { in optc3_set_odm_combine()
240 if (opp_cnt == 2) { in optc3_set_odm_combine()
245 } else if (opp_cnt == 4) { in optc3_set_odm_combine()
257 REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc3_set_odm_combine()
258 optc1->opp_count = opp_cnt; in optc3_set_odm_combine()
/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_optc.c43 static void optc31_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc31_set_odm_combine() argument
48 / opp_cnt; in optc31_set_odm_combine()
53 if (opp_cnt == 4) { in optc31_set_odm_combine()
73 if (opp_cnt == 2) { in optc31_set_odm_combine()
78 } else if (opp_cnt == 4) { in optc31_set_odm_combine()
90 REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc31_set_odm_combine()
91 optc1->opp_count = opp_cnt; in optc31_set_odm_combine()
/drivers/gpu/drm/amd/display/dc/core/
Ddc_link_hwss.c437 int opp_cnt = 1; in dp_set_dsc_on_stream() local
440 opp_cnt++; in dp_set_dsc_on_stream()
448 …am->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt; in dp_set_dsc_on_stream()
454 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in dp_set_dsc_on_stream()
455 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dp_set_dsc_on_stream()
465 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in dp_set_dsc_on_stream()
466 dsc_cfg.pic_width *= opp_cnt; in dp_set_dsc_on_stream()
Ddc_link_dp.c4249 int opp_cnt = 1; in set_crtc_test_pattern() local
4272 opp_cnt++; in set_crtc_test_pattern()
4273 dpg_width = width / opp_cnt; in set_crtc_test_pattern()
4316 int opp_cnt = 1; in set_crtc_test_pattern() local
4320 opp_cnt++; in set_crtc_test_pattern()
4322 dpg_width = width / opp_cnt; in set_crtc_test_pattern()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_optc.c219 void optc2_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc2_set_odm_combine() argument
224 / opp_cnt; in optc2_set_odm_combine()
227 ASSERT(opp_cnt == 2); in optc2_set_odm_combine()
257 optc1->opp_count = opp_cnt; in optc2_set_odm_combine()
Ddcn20_hwseq.c616 int opp_cnt) in calc_mpc_flow_ctrl_cnt() argument
621 if (opp_cnt >= 2) in calc_mpc_flow_ctrl_cnt()
632 if (opp_cnt == 4) in calc_mpc_flow_ctrl_cnt()
648 int opp_cnt = 1; in dcn20_enable_stream_timing() local
666 opp_inst[opp_cnt] = odm_pipe->stream_res.opp->inst; in dcn20_enable_stream_timing()
667 opp_cnt++; in dcn20_enable_stream_timing()
670 if (opp_cnt > 1) in dcn20_enable_stream_timing()
673 opp_inst, opp_cnt, in dcn20_enable_stream_timing()
702 rate_control_2x_pclk = rate_control_2x_pclk || opp_cnt > 1; in dcn20_enable_stream_timing()
705 flow_control.flow_ctrl_cnt1 = calc_mpc_flow_ctrl_cnt(stream, opp_cnt); in dcn20_enable_stream_timing()
[all …]
Ddcn20_optc.h104 void optc2_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,
Ddcn20_stream_encoder.c459 if (is_two_pixels_per_containter(&param->timing) || param->opp_cnt > 1) { in enc2_stream_encoder_dp_unblank()
Ddcn20_resource.c1597 int opp_cnt = 1; in get_pixel_clock_parameters() local
1600 opp_cnt++; in get_pixel_clock_parameters()
1618 if (opp_cnt == 4) in get_pixel_clock_parameters()
1620 else if (optc2_is_two_pixels_per_containter(&stream->timing) || opp_cnt == 2) in get_pixel_clock_parameters()
2461 int opp_cnt = 1; in dcn20_validate_dsc() local
2464 opp_cnt++; in dcn20_validate_dsc()
2471 + stream->timing.h_border_right) / opp_cnt; in dcn20_validate_dsc()
2478 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dcn20_validate_dsc()
/drivers/gpu/drm/amd/display/dc/inc/hw/
Dstream_encoder.h91 int opp_cnt; member
Dtiming_generator.h291 void (*set_odm_combine)(struct timing_generator *optc, int *opp_id, int opp_cnt,