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Searched refs:p3 (Results 1 – 17 of 17) sorted by relevance

/drivers/clk/
Dclk-si5351.c38 unsigned long p3; member
140 params->p3 = 1; in si5351_read_parameters()
146 params->p3 = ((buf[5] & 0xf0) << 12) | (buf[0] << 8) | buf[1]; in si5351_read_parameters()
163 buf[0] = ((params->p3 & 0x0ff00) >> 8) & 0xff; in si5351_write_parameters()
164 buf[1] = params->p3 & 0xff; in si5351_write_parameters()
170 buf[5] = ((params->p3 & 0xf0000) >> 12) | in si5351_write_parameters()
426 if (hwdata->params.p3 == 0) in si5351_pll_recalc_rate()
430 rate = hwdata->params.p1 * hwdata->params.p3; in si5351_pll_recalc_rate()
431 rate += 512 * hwdata->params.p3; in si5351_pll_recalc_rate()
434 do_div(rate, 128 * hwdata->params.p3); in si5351_pll_recalc_rate()
[all …]
/drivers/misc/cxl/
Dhcalls.c206 u64 p1, u64 p2, u64 p3, u64 p4, u64 *out) in cxl_h_control_function() argument
211 CXL_H9_WAIT_UNTIL_DONE(rc, retbuf, H_CONTROL_CA_FUNCTION, unit_address, op, p1, p2, p3, p4); in cxl_h_control_function()
213 unit_address, OP_STR_AFU(op), p1, p2, p3, p4, retbuf[0], rc); in cxl_h_control_function()
214 trace_cxl_hcall_control_function(unit_address, OP_STR_AFU(op), p1, p2, p3, p4, retbuf[0], rc); in cxl_h_control_function()
479 u64 p1, u64 p2, u64 p3, u64 p4, u64 *out) in cxl_h_control_facility() argument
484 CXL_H9_WAIT_UNTIL_DONE(rc, retbuf, H_CONTROL_CA_FACILITY, unit_address, op, p1, p2, p3, p4); in cxl_h_control_facility()
486 unit_address, OP_STR_CONTROL_ADAPTER(op), p1, p2, p3, p4, retbuf[0], rc); in cxl_h_control_facility()
487 …trace_cxl_hcall_control_facility(unit_address, OP_STR_CONTROL_ADAPTER(op), p1, p2, p3, p4, retbuf[… in cxl_h_control_facility()
Dtrace.h517 TP_PROTO(u64 unit_address, char *fct, u64 p1, u64 p2, u64 p3,
520 TP_ARGS(unit_address, fct, p1, p2, p3, p4, r4, rc),
527 __field(u64, p3)
538 __entry->p3 = p3;
549 __entry->p3,
598 TP_PROTO(u64 unit_address, char *fct, u64 p1, u64 p2, u64 p3,
600 TP_ARGS(unit_address, fct, p1, p2, p3, p4, r4, rc)
646 TP_PROTO(u64 unit_address, char *fct, u64 p1, u64 p2, u64 p3,
648 TP_ARGS(unit_address, fct, p1, p2, p3, p4, r4, rc)
/drivers/media/i2c/
Dmt9t112.c277 int m, n, p1, p2, p3, p4, p5, p6, p7; in mt9t112_clock_info() local
288 p3 = n & 0x000f; in mt9t112_clock_info()
315 clk = vco / (p3 + 1); in mt9t112_clock_info()
371 u8 m, u8 n, u8 p1, u8 p2, u8 p3, u8 p4, in mt9t112_set_pll_dividers() argument
382 val = ((p3 & 0x0F) << 8) | ((p2 & 0x0F) << 4) | ((p1 & 0x0F) << 0); in mt9t112_set_pll_dividers()
411 priv->info->divider.p3, priv->info->divider.p4, in mt9t112_init_pll()
/drivers/scsi/aacraid/
Dsa.c153 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, in sa_sync_cmd() argument
167 sa_writel(dev, Mailbox3, p3); in sa_sync_cmd()
Drx.c163 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, in rx_sync_cmd() argument
177 writel(p3, &dev->IndexRegs->Mailbox[3]); in rx_sync_cmd()
Dsrc.c210 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, in src_sync_cmd() argument
226 writel(p3, &dev->IndexRegs->Mailbox[3]); in src_sync_cmd()
Daacraid.h905 …int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5,…
1694 #define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \ argument
1695 (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4)
/drivers/gpu/drm/vc4/
Dvc4_validate.c571 uint32_t p3 = (sample->p_offset[3] != ~0 ? in reloc_tex() local
612 if (VC4_GET_FIELD(p3, VC4_TEX_P2_PTYPE) == in reloc_tex()
619 cube_map_stride = p3 & VC4_TEX_P2_CMST_MASK; in reloc_tex()
739 DRM_INFO("Texture p3 at %d: 0x%08x\n", sample->p_offset[3], p3); in reloc_tex()
/drivers/net/ethernet/sgi/
Dmeth.c135 unsigned long p2, p3, flags; in mdio_probe() local
143 p3=mdio_read(priv,3); in mdio_probe()
145 switch ((p2<<12)|(p3>>4)){ in mdio_probe()
161 DPRINTK("PHY code: %x\n",(p2<<12)|(p3>>4)); in mdio_probe()
/drivers/atm/
Dfirestream.c628 u32 cmd, u32 p1, u32 p2, u32 p3) in submit_queue() argument
636 qe->p2 = p3; in submit_queue()
643 pq[qp].p2 = p3; in submit_queue()
655 u32 cmd, u32 p1, u32 p2, u32 p3) in submit_command() argument
660 write_fs (dev, CMDR3, p3); in submit_command()
/drivers/net/wireless/marvell/libertas/
Ddebugfs.c62 int p1, p2, p3, p4, p5, p6; in lbs_sleepparams_write() local
69 ret = sscanf(buf, "%d %d %d %d %d %d", &p1, &p2, &p3, &p4, &p5, &p6); in lbs_sleepparams_write()
76 sp.sp_stabletime = p3; in lbs_sleepparams_write()
DREADME102 echo "p1 p2 p3 p4 p5 p6" > sleepparams: writes the sleepclock configuration.
107 p3 is Clock stabilization time in usec (0-65535)
/drivers/gpu/drm/tiny/
Drepaper.c209 u8 p1, p2, p3, p4; in repaper_even_pixels() local
234 p3 = (pixels >> 2) & 0x03; in repaper_even_pixels()
236 pixels = (p1 << 0) | (p2 << 2) | (p3 << 4) | (p4 << 6); in repaper_even_pixels()
/drivers/net/wireless/ath/wil6210/
Ddebugfs.c784 int p1, p2, p3; in wil_write_back() local
796 rc = sscanf(kbuf, "%8s %d %d %d", cmd, &p1, &p2, &p3); in wil_write_back()
819 p3 = 0; in wil_write_back()
820 wmi_addba(wil, txdata->mid, p1, p2, p3); in wil_write_back()
839 p3 = WLAN_REASON_QSTA_LEAVE_QBSS; in wil_write_back()
841 wmi_delba_rx(wil, sta->mid, p1, p2, p3); in wil_write_back()
/drivers/input/mouse/
Delantech.c770 unsigned char p1, p2, p3; in elantech_packet_check_v1() local
783 p3 = (packet[0] & 0x04) >> 2; in elantech_packet_check_v1()
787 etd->parity[packet[3]] == p3; in elantech_packet_check_v1()
/drivers/video/fbdev/matrox/
Dmatroxfb_base.c312 unsigned int p3; in matrox_pan_var() local
330 p3 = minfo->hw.CRTCEXT[8] = pos >> 21; in matrox_pan_var()
341 mga_setr(M_EXTVGA_INDEX, 0x08, p3); in matrox_pan_var()