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/drivers/net/ethernet/qlogic/qed/
Dqed_fcoe.c91 struct fcoe_init_func_ramrod_data *p_data; in qed_sp_fcoe_func_start() local
115 p_data = &p_ramrod->init_ramrod_data; in qed_sp_fcoe_func_start()
128 p_data->mtu = cpu_to_le16(fcoe_pf_params->mtu); in qed_sp_fcoe_func_start()
130 p_data->sq_num_pages_in_pbl = tmp; in qed_sp_fcoe_func_start()
152 p_data->func_params.num_tasks = tmp; in qed_sp_fcoe_func_start()
153 p_data->func_params.log_page_size = fcoe_pf_params->log_page_size; in qed_sp_fcoe_func_start()
154 p_data->func_params.debug_mode = fcoe_pf_params->debug_mode; in qed_sp_fcoe_func_start()
156 DMA_REGPAIR_LE(p_data->q_params.glbl_q_params_addr, in qed_sp_fcoe_func_start()
160 p_data->q_params.cq_num_entries = tmp; in qed_sp_fcoe_func_start()
163 p_data->q_params.cmdq_num_entries = tmp; in qed_sp_fcoe_func_start()
[all …]
Dqed_dcbx.c146 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data) in qed_dcbx_dp_protocol() argument
152 p_data->dcbx_enabled); in qed_dcbx_dp_protocol()
159 qed_dcbx_app_update[i].name, p_data->arr[id].update, in qed_dcbx_dp_protocol()
160 p_data->arr[id].enable, p_data->arr[id].priority, in qed_dcbx_dp_protocol()
161 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc); in qed_dcbx_dp_protocol()
166 qed_dcbx_set_params(struct qed_dcbx_results *p_data, in qed_dcbx_set_params() argument
173 p_data->arr[type].enable = enable; in qed_dcbx_set_params()
174 p_data->arr[type].priority = prio; in qed_dcbx_set_params()
175 p_data->arr[type].tc = tc; in qed_dcbx_set_params()
177 p_data->arr[type].update = UPDATE_DCB; in qed_dcbx_set_params()
[all …]
Dqed_sp_commands.c39 u8 cmd, u8 protocol, struct qed_sp_init_data *p_data) in qed_sp_init_request() argument
41 u32 opaque_cid = p_data->opaque_fid << 16 | p_data->cid; in qed_sp_init_request()
60 p_ent->comp_mode = p_data->comp_mode; in qed_sp_init_request()
69 if (!p_data->p_comp_data) in qed_sp_init_request()
72 p_ent->comp_cb.cookie = p_data->p_comp_data->cookie; in qed_sp_init_request()
76 if (!p_data->p_comp_data) in qed_sp_init_request()
79 p_ent->comp_cb = *p_data->p_comp_data; in qed_sp_init_request()
Dqed_vf.c1016 struct qed_sp_vport_update_params *p_data, in qed_vf_handle_vp_update_is_needed() argument
1021 return !!(p_data->update_vport_active_rx_flg || in qed_vf_handle_vp_update_is_needed()
1022 p_data->update_vport_active_tx_flg); in qed_vf_handle_vp_update_is_needed()
1024 return !!p_data->update_tx_switching_flg; in qed_vf_handle_vp_update_is_needed()
1026 return !!p_data->update_inner_vlan_removal_flg; in qed_vf_handle_vp_update_is_needed()
1028 return !!p_data->update_accept_any_vlan_flg; in qed_vf_handle_vp_update_is_needed()
1030 return !!p_data->update_approx_mcast_flg; in qed_vf_handle_vp_update_is_needed()
1032 return !!(p_data->accept_flags.update_rx_mode_config || in qed_vf_handle_vp_update_is_needed()
1033 p_data->accept_flags.update_tx_mode_config); in qed_vf_handle_vp_update_is_needed()
1035 return !!p_data->rss_params; in qed_vf_handle_vp_update_is_needed()
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Dqed_sriov.c2741 struct qed_sp_vport_update_params *p_data, in qed_iov_vp_update_act_param() argument
2752 p_data->update_vport_active_rx_flg = p_act_tlv->update_rx; in qed_iov_vp_update_act_param()
2753 p_data->vport_active_rx_flg = p_act_tlv->active_rx; in qed_iov_vp_update_act_param()
2754 p_data->update_vport_active_tx_flg = p_act_tlv->update_tx; in qed_iov_vp_update_act_param()
2755 p_data->vport_active_tx_flg = p_act_tlv->active_tx; in qed_iov_vp_update_act_param()
2761 struct qed_sp_vport_update_params *p_data, in qed_iov_vp_update_vlan_param() argument
2777 p_data->update_inner_vlan_removal_flg = 1; in qed_iov_vp_update_vlan_param()
2778 p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan; in qed_iov_vp_update_vlan_param()
2786 struct qed_sp_vport_update_params *p_data, in qed_iov_vp_update_tx_switch() argument
2798 p_data->update_tx_switching_flg = 1; in qed_iov_vp_update_tx_switch()
[all …]
Dqed_sp.h331 union event_ring_data *p_data);
402 struct qed_sp_init_data *p_data);
/drivers/gpu/drm/i915/gvt/
Dedid.c136 unsigned int offset, void *p_data, unsigned int bytes) in gmbus0_mmio_write() argument
141 memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes); in gmbus0_mmio_write()
176 void *p_data, unsigned int bytes) in gmbus1_mmio_write() argument
180 u32 wvalue = *(u32 *)p_data; in gmbus1_mmio_write()
277 void *p_data, unsigned int bytes) in gmbus3_mmio_write() argument
286 void *p_data, unsigned int bytes) in gmbus3_mmio_read() argument
299 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); in gmbus3_mmio_read()
311 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); in gmbus3_mmio_read()
332 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); in gmbus3_mmio_read()
339 void *p_data, unsigned int bytes) in gmbus2_mmio_read() argument
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Dmmio.c61 void *p_data, unsigned int bytes, bool read) in failsafe_emulate_mmio_rw() argument
67 if (!vgpu || !p_data) in failsafe_emulate_mmio_rw()
75 intel_vgpu_default_mmio_read(vgpu, offset, p_data, in failsafe_emulate_mmio_rw()
78 intel_vgpu_default_mmio_write(vgpu, offset, p_data, in failsafe_emulate_mmio_rw()
84 memcpy(p_data, pt, bytes); in failsafe_emulate_mmio_rw()
86 memcpy(pt, p_data, bytes); in failsafe_emulate_mmio_rw()
103 void *p_data, unsigned int bytes) in intel_vgpu_emulate_mmio_read() argument
111 failsafe_emulate_mmio_rw(vgpu, pa, p_data, bytes, true); in intel_vgpu_emulate_mmio_read()
132 p_data, bytes); in intel_vgpu_emulate_mmio_read()
139 ret = intel_gvt_hypervisor_read_gpa(vgpu, pa, p_data, bytes); in intel_vgpu_emulate_mmio_read()
[all …]
Dcfg_space.c117 void *p_data, unsigned int bytes) in intel_vgpu_emulate_cfg_read() argument
128 memcpy(p_data, vgpu_cfg_space(vgpu) + offset, bytes); in intel_vgpu_emulate_cfg_read()
189 unsigned int offset, void *p_data, unsigned int bytes) in emulate_pci_command_write() argument
192 u8 new = *(u8 *)p_data; in emulate_pci_command_write()
196 vgpu_pci_cfg_mem_write(vgpu, offset, p_data, bytes); in emulate_pci_command_write()
220 unsigned int offset, void *p_data, unsigned int bytes) in emulate_pci_rom_bar_write() argument
223 u32 new = *(u32 *)(p_data); in emulate_pci_rom_bar_write()
229 vgpu_pci_cfg_mem_write(vgpu, offset, p_data, bytes); in emulate_pci_rom_bar_write()
234 void *p_data, unsigned int bytes) in emulate_pci_bar_write() argument
236 u32 new = *(u32 *)(p_data); in emulate_pci_bar_write()
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Dhandlers.c76 void *p_data, unsigned int bytes) in read_vreg() argument
78 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); in read_vreg()
82 void *p_data, unsigned int bytes) in write_vreg() argument
84 memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes); in write_vreg()
196 unsigned int fence_num, void *p_data, unsigned int bytes) in sanitize_fence_mmio_access() argument
212 memset(p_data, 0, bytes); in sanitize_fence_mmio_access()
219 unsigned int offset, void *p_data, unsigned int bytes) in gamw_echo_dev_rw_ia_write() argument
221 u32 ips = (*(u32 *)p_data) & GAMW_ECO_ENABLE_64K_IPS_FIELD; in gamw_echo_dev_rw_ia_write()
239 write_vreg(vgpu, offset, p_data, bytes); in gamw_echo_dev_rw_ia_write()
244 void *p_data, unsigned int bytes) in fence_mmio_read() argument
[all …]
Dmmio.h93 void *p_data, unsigned int bytes);
95 void *p_data, unsigned int bytes);
98 void *p_data, unsigned int bytes);
100 void *p_data, unsigned int bytes);
109 void *p_data, unsigned int bytes);
Dedid.h144 unsigned int offset, void *p_data, unsigned int bytes);
147 unsigned int offset, void *p_data, unsigned int bytes);
152 void *p_data);
Dinterrupt.h220 void *p_data, unsigned int bytes);
222 unsigned int reg, void *p_data, unsigned int bytes);
224 unsigned int reg, void *p_data, unsigned int bytes);
226 unsigned int reg, void *p_data, unsigned int bytes);
Dinterrupt.c176 unsigned int reg, void *p_data, unsigned int bytes) in intel_vgpu_reg_imr_handler() argument
180 u32 imr = *(u32 *)p_data; in intel_vgpu_reg_imr_handler()
206 unsigned int reg, void *p_data, unsigned int bytes) in intel_vgpu_reg_master_irq_handler() argument
210 u32 ier = *(u32 *)p_data; in intel_vgpu_reg_master_irq_handler()
245 unsigned int reg, void *p_data, unsigned int bytes) in intel_vgpu_reg_ier_handler() argument
251 u32 ier = *(u32 *)p_data; in intel_vgpu_reg_ier_handler()
284 void *p_data, unsigned int bytes) in intel_vgpu_reg_iir_handler() argument
289 u32 iir = *(u32 *)p_data; in intel_vgpu_reg_iir_handler()
Dgtt.h288 unsigned int off, void *p_data, unsigned int bytes);
291 unsigned int off, void *p_data, unsigned int bytes);
Dgtt.c783 u64 pa, void *p_data, int bytes);
1729 u64 pa, void *p_data, int bytes) in ppgtt_handle_guest_write_page_table_bytes() argument
2179 unsigned int off, void *p_data, unsigned int bytes) in emulate_ggtt_mmio_read() argument
2194 memset(p_data, 0, bytes); in emulate_ggtt_mmio_read()
2199 memcpy(p_data, (void *)&e.val64 + (off & (info->gtt_entry_size - 1)), in emulate_ggtt_mmio_read()
2217 void *p_data, unsigned int bytes) in intel_vgpu_emulate_ggtt_mmio_read() argument
2226 ret = emulate_ggtt_mmio_read(vgpu, off, p_data, bytes); in intel_vgpu_emulate_ggtt_mmio_read()
2243 void *p_data, unsigned int bytes) in emulate_ggtt_mmio_write() argument
2268 memcpy((void *)&e.val64 + (off & (info->gtt_entry_size - 1)), p_data, in emulate_ggtt_mmio_write()
2370 unsigned int off, void *p_data, unsigned int bytes) in intel_vgpu_emulate_ggtt_mmio_write() argument
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/drivers/firmware/
Dstratix10-svc.c198 struct stratix10_svc_data *p_data, in svc_thread_cmd_data_claim() argument
223 p_data->chan->scl->receive_cb(p_data->chan->scl, in svc_thread_cmd_data_claim()
244 struct stratix10_svc_data *p_data, in svc_thread_cmd_config_status() argument
276 p_data->chan->scl->receive_cb(p_data->chan->scl, cb_data); in svc_thread_cmd_config_status()
287 static void svc_thread_recv_status_ok(struct stratix10_svc_data *p_data, in svc_thread_recv_status_ok() argument
295 switch (p_data->command) { in svc_thread_recv_status_ok()
323 p_data->chan->scl->receive_cb(p_data->chan->scl, cb_data); in svc_thread_recv_status_ok()
808 struct stratix10_svc_data *p_data; in stratix10_svc_send() local
812 p_data = kzalloc(sizeof(*p_data), GFP_KERNEL); in stratix10_svc_send()
813 if (!p_data) in stratix10_svc_send()
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/drivers/devfreq/
Dgovernor_passive.c18 struct devfreq_passive_data *p_data in devfreq_passive_get_target_freq() local
20 struct devfreq *parent_devfreq = (struct devfreq *)p_data->parent; in devfreq_passive_get_target_freq()
30 if (p_data->get_target_freq) in devfreq_passive_get_target_freq()
31 return p_data->get_target_freq(devfreq, freq); in devfreq_passive_get_target_freq()
137 struct devfreq_passive_data *p_data in devfreq_passive_event_handler() local
139 struct devfreq *parent = (struct devfreq *)p_data->parent; in devfreq_passive_event_handler()
140 struct notifier_block *nb = &p_data->nb; in devfreq_passive_event_handler()
148 if (!p_data->this) in devfreq_passive_event_handler()
149 p_data->this = devfreq; in devfreq_passive_event_handler()
/drivers/edac/
Dsynopsys_edac.c327 const struct synps_platform_data *p_data; member
486 if (priv->p_data->quirks & DDR_ECC_INTR_SUPPORT) { in handle_error()
506 if (priv->p_data->quirks & DDR_ECC_INTR_SUPPORT) { in handle_error()
534 const struct synps_platform_data *p_data; in intr_handler() local
540 p_data = priv->p_data; in intr_handler()
547 status = p_data->get_error_info(priv); in intr_handler()
569 const struct synps_platform_data *p_data; in check_errors() local
574 p_data = priv->p_data; in check_errors()
576 status = p_data->get_error_info(priv); in check_errors()
777 const struct synps_platform_data *p_data; in init_csrows() local
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/drivers/gpio/
Dgpio-zynq.c131 const struct zynq_platform_data *p_data; member
165 return !!(gpio->p_data->quirks & ZYNQ_GPIO_QUIRK_IS_ZYNQ); in zynq_gpio_is_zynq()
176 return !!(gpio->p_data->quirks & GPIO_QUIRK_DATA_RO_BUG); in gpio_data_ro_bug()
198 for (bank = 0; bank < gpio->p_data->max_bank; bank++) { in zynq_gpio_get_bank_pin()
199 if ((pin_num >= gpio->p_data->bank_min[bank]) && in zynq_gpio_get_bank_pin()
200 (pin_num <= gpio->p_data->bank_max[bank])) { in zynq_gpio_get_bank_pin()
203 gpio->p_data->bank_min[bank]; in zynq_gpio_get_bank_pin()
206 if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL) in zynq_gpio_get_bank_pin()
624 unsigned int bank_offset = gpio->p_data->bank_min[bank_num]; in zynq_gpio_handle_bank_irq()
655 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) { in zynq_gpio_irqhandler()
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/drivers/block/drbd/
Ddrbd_protocol.h145 struct p_data { struct
153 struct p_data p_data; argument
158 struct p_data p_data; member
/drivers/scsi/qla4xxx/
Dql4_83xx.c110 uint8_t *p_data, int u32_word_count) in qla4_83xx_flash_read_u32() argument
147 *(__le32 *)p_data = le32_to_cpu(u32_word); in qla4_83xx_flash_read_u32()
148 p_data = p_data + 4; in qla4_83xx_flash_read_u32()
160 uint32_t flash_addr, uint8_t *p_data, in qla4_83xx_lockless_flash_read_u32() argument
201 *(__le32 *)p_data = le32_to_cpu(u32_word); in qla4_83xx_lockless_flash_read_u32()
202 p_data = p_data + 4; in qla4_83xx_lockless_flash_read_u32()
231 *(__le32 *)p_data = le32_to_cpu(u32_word); in qla4_83xx_lockless_flash_read_u32()
232 p_data = p_data + 4; in qla4_83xx_lockless_flash_read_u32()
/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_83xx_hw.c2640 u32 flash_addr, u8 *p_data, in qlcnic_83xx_lockless_flash_read32() argument
2668 *(u32 *)p_data = word; in qlcnic_83xx_lockless_flash_read32()
2669 p_data = p_data + 4; in qlcnic_83xx_lockless_flash_read32()
2691 *(u32 *)p_data = word; in qlcnic_83xx_lockless_flash_read32()
2692 p_data = p_data + 4; in qlcnic_83xx_lockless_flash_read32()
2876 u32 *p_data) in qlcnic_83xx_flash_write32() argument
2882 qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_WRDATA, *p_data); in qlcnic_83xx_flash_write32()
2896 u32 *p_data, int count) in qlcnic_83xx_flash_bulk_write() argument
2918 qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_WRDATA, *p_data++); in qlcnic_83xx_flash_bulk_write()
2934 *p_data++); in qlcnic_83xx_flash_bulk_write()
[all …]
/drivers/media/tuners/
Dmax2165.c52 static int max2165_read_reg(struct max2165_priv *priv, u8 reg, u8 *p_data) in max2165_read_reg() argument
70 *p_data = b1[0]; in max2165_read_reg()
/drivers/scsi/qla2xxx/
Dqla_nx2.c507 qla8044_read_flash_data(scsi_qla_host_t *vha, uint8_t *p_data, in qla8044_read_flash_data() argument
546 *(uint32_t *)p_data = u32_word; in qla8044_read_flash_data()
547 p_data = p_data + 4; in qla8044_read_flash_data()
1031 uint32_t flash_addr, uint8_t *p_data, int u32_word_count) in qla8044_lockless_flash_read_u32() argument
1071 *(uint32_t *)p_data = u32_word; in qla8044_lockless_flash_read_u32()
1072 p_data = p_data + 4; in qla8044_lockless_flash_read_u32()
1100 *(uint32_t *)p_data = u32_word; in qla8044_lockless_flash_read_u32()
1101 p_data = p_data + 4; in qla8044_lockless_flash_read_u32()
3653 uint32_t *p_data) in qla8044_flash_write_u32() argument
3664 ret_val = qla8044_wr_reg_indirect(vha, QLA8044_FLASH_WRDATA, *p_data); in qla8044_flash_write_u32()

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