| /drivers/gpu/drm/amd/amdkfd/ |
| D | kfd_pm4_headers.h | 68 uint32_t page_table_base:28; member
117 uint32_t page_table_base:28; member
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| D | kfd_packet_manager_vi.c | 55 packet->bitfields3.page_table_base = qpd->page_table_base; in pm_map_process_vi()
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| D | kfd_packet_manager_v9.c | 35 uint64_t vm_page_table_base_addr = qpd->page_table_base; in pm_map_process_v9()
80 uint64_t vm_page_table_base_addr = qpd->page_table_base; in pm_map_process_aldebaran()
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| D | kfd_pm4_headers_vi.h | 163 uint32_t page_table_base:28; member
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| D | kfd_device_queue_manager.c | 276 qpd->page_table_base); in allocate_vmid()
777 qpd->page_table_base = pd_base; in restore_process_queues_nocpsch()
784 qpd->page_table_base); in restore_process_queues_nocpsch()
856 qpd->page_table_base = pd_base; in restore_process_queues_cpsch()
900 qpd->page_table_base = pd_base; in register_process()
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| D | kfd_priv.h | 600 uint64_t page_table_base; member
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_gfxhub.h | 30 uint64_t page_table_base);
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| D | gfxhub_v1_0.c | 41 uint64_t page_table_base) in gfxhub_v1_0_setup_vm_pt_regs() argument
47 lower_32_bits(page_table_base)); in gfxhub_v1_0_setup_vm_pt_regs()
51 upper_32_bits(page_table_base)); in gfxhub_v1_0_setup_vm_pt_regs()
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| D | amdgpu_mmhub.h | 45 uint64_t page_table_base);
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| D | gfxhub_v2_0.c | 121 uint64_t page_table_base) in gfxhub_v2_0_setup_vm_pt_regs() argument
127 lower_32_bits(page_table_base)); in gfxhub_v2_0_setup_vm_pt_regs()
131 upper_32_bits(page_table_base)); in gfxhub_v2_0_setup_vm_pt_regs()
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| D | gfxhub_v2_1.c | 124 uint64_t page_table_base) in gfxhub_v2_1_setup_vm_pt_regs() argument
130 lower_32_bits(page_table_base)); in gfxhub_v2_1_setup_vm_pt_regs()
134 upper_32_bits(page_table_base)); in gfxhub_v2_1_setup_vm_pt_regs()
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| D | amdgpu_amdkfd_gfx_v9.h | 65 uint32_t vmid, uint64_t page_table_base);
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| D | mmhub_v2_0.c | 192 uint64_t page_table_base) in mmhub_v2_0_setup_vm_pt_regs() argument
198 lower_32_bits(page_table_base)); in mmhub_v2_0_setup_vm_pt_regs()
202 upper_32_bits(page_table_base)); in mmhub_v2_0_setup_vm_pt_regs()
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| D | mmhub_v2_3.c | 121 uint64_t page_table_base) in mmhub_v2_3_setup_vm_pt_regs() argument
126 hub->ctx_addr_distance * vmid, lower_32_bits(page_table_base)); in mmhub_v2_3_setup_vm_pt_regs()
129 hub->ctx_addr_distance * vmid, upper_32_bits(page_table_base)); in mmhub_v2_3_setup_vm_pt_regs()
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| D | mmhub_v1_0.c | 55 uint64_t page_table_base) in mmhub_v1_0_setup_vm_pt_regs() argument
61 lower_32_bits(page_table_base)); in mmhub_v1_0_setup_vm_pt_regs()
65 upper_32_bits(page_table_base)); in mmhub_v1_0_setup_vm_pt_regs()
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| D | amdgpu_amdkfd_gfx_v9.c | 697 uint32_t vmid, uint64_t page_table_base) in kgd_gfx_v9_set_vm_context_page_table_base() argument
707 adev->mmhub.funcs->setup_vm_pt_regs(adev, vmid, page_table_base); in kgd_gfx_v9_set_vm_context_page_table_base()
709 adev->gfxhub.funcs->setup_vm_pt_regs(adev, vmid, page_table_base); in kgd_gfx_v9_set_vm_context_page_table_base()
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| D | amdgpu_amdkfd_gfx_v8.c | 621 uint64_t page_table_base) in set_vm_context_page_table_base() argument
630 lower_32_bits(page_table_base)); in set_vm_context_page_table_base()
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| D | amdgpu_amdkfd_gfx_v7.c | 660 uint64_t page_table_base) in set_vm_context_page_table_base() argument
669 lower_32_bits(page_table_base)); in set_vm_context_page_table_base()
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| D | amdgpu_amdkfd_gfx_v10.c | 746 uint64_t page_table_base) in set_vm_context_page_table_base() argument
757 adev->gfxhub.funcs->setup_vm_pt_regs(adev, vmid, page_table_base); in set_vm_context_page_table_base()
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| D | amdgpu_amdkfd_gfx_v10_3.c | 656 uint64_t page_table_base) in set_vm_context_page_table_base_v10_3() argument
661 adev->gfxhub.funcs->setup_vm_pt_regs(adev, vmid, page_table_base); in set_vm_context_page_table_base_v10_3()
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| D | mmhub_v1_7.c | 55 uint64_t page_table_base) in mmhub_v1_7_setup_vm_pt_regs() argument
60 hub->ctx_addr_distance * vmid, lower_32_bits(page_table_base)); in mmhub_v1_7_setup_vm_pt_regs()
63 hub->ctx_addr_distance * vmid, upper_32_bits(page_table_base)); in mmhub_v1_7_setup_vm_pt_regs()
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| D | mmhub_v9_4.c | 101 uint64_t page_table_base) in mmhub_v9_4_setup_vm_pt_regs() argument
107 page_table_base); in mmhub_v9_4_setup_vm_pt_regs()
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| /drivers/gpu/drm/amd/include/ |
| D | kgd_kfd_interface.h | 297 uint32_t vmid, uint64_t page_table_base);
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| /drivers/gpu/drm/amd/display/dc/ |
| D | dc_hw_types.h | 121 union large_integer page_table_base; member
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| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_hwseq.c | 793 plane->address.page_table_base.quad_part == 0 && in dcn30_apply_idle_power_optimizations()
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