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Searched refs:pg (Results 1 – 25 of 89) sorted by relevance

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/drivers/scsi/device_handler/
Dscsi_dh_alua.c85 struct alua_port_group __rcu *pg; member
104 static bool alua_rtpg_queue(struct alua_port_group *pg,
111 struct alua_port_group *pg; in release_port_group() local
113 pg = container_of(kref, struct alua_port_group, kref); in release_port_group()
114 if (pg->rtpg_sdev) in release_port_group()
115 flush_delayed_work(&pg->rtpg_work); in release_port_group()
117 list_del(&pg->node); in release_port_group()
119 kfree_rcu(pg, rcu); in release_port_group()
182 struct alua_port_group *pg; in alua_find_get_pg() local
187 list_for_each_entry(pg, &port_group_list, node) { in alua_find_get_pg()
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/drivers/md/
Ddm-mpath.c41 struct priority_group *pg; /* Owning PG */ member
168 struct priority_group *pg; in alloc_priority_group() local
170 pg = kzalloc(sizeof(*pg), GFP_KERNEL); in alloc_priority_group()
172 if (pg) in alloc_priority_group()
173 INIT_LIST_HEAD(&pg->pgpaths); in alloc_priority_group()
175 return pg; in alloc_priority_group()
189 static void free_priority_group(struct priority_group *pg, in free_priority_group() argument
192 struct path_selector *ps = &pg->ps; in free_priority_group()
199 free_pgpaths(&pg->pgpaths, ti); in free_priority_group()
200 kfree(pg); in free_priority_group()
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/drivers/soc/tegra/
Dpmc.c671 static int tegra_powergate_prepare_clocks(struct tegra_powergate *pg) in tegra_powergate_prepare_clocks() argument
677 for (i = 0; i < pg->num_clks; i++) { in tegra_powergate_prepare_clocks()
678 pg->clk_rates[i] = clk_get_rate(pg->clks[i]); in tegra_powergate_prepare_clocks()
680 if (!pg->clk_rates[i]) { in tegra_powergate_prepare_clocks()
685 if (pg->clk_rates[i] <= safe_rate) in tegra_powergate_prepare_clocks()
694 err = clk_set_rate(pg->clks[i], safe_rate); in tegra_powergate_prepare_clocks()
703 clk_set_rate(pg->clks[i], pg->clk_rates[i]); in tegra_powergate_prepare_clocks()
708 static int tegra_powergate_unprepare_clocks(struct tegra_powergate *pg) in tegra_powergate_unprepare_clocks() argument
713 for (i = 0; i < pg->num_clks; i++) { in tegra_powergate_unprepare_clocks()
714 err = clk_set_rate(pg->clks[i], pg->clk_rates[i]); in tegra_powergate_unprepare_clocks()
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/drivers/xen/
Dunpopulated-alloc.c86 struct page *pg = virt_to_page(vaddr + PAGE_SIZE * i); in fill_list() local
89 pg->zone_device_data = page_list; in fill_list()
90 page_list = pg; in fill_list()
124 struct page *pg = page_list; in xen_alloc_unpopulated_pages() local
126 BUG_ON(!pg); in xen_alloc_unpopulated_pages()
127 page_list = pg->zone_device_data; in xen_alloc_unpopulated_pages()
129 pages[i] = pg; in xen_alloc_unpopulated_pages()
133 ret = xen_alloc_p2m_entry(page_to_pfn(pg)); in xen_alloc_unpopulated_pages()
192 struct page *pg = in init() local
195 pg->zone_device_data = page_list; in init()
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/drivers/gpu/drm/gma500/
Dgtt.c356 struct psb_gtt *pg; in psb_gtt_init() local
367 pg = &dev_priv->gtt; in psb_gtt_init()
381 pg->gtt_phys_start = dev_priv->pge_ctl & PAGE_MASK; in psb_gtt_init()
389 pg->mmu_gatt_start = 0xE0000000; in psb_gtt_init()
391 pg->gtt_start = pci_resource_start(pdev, PSB_GTT_RESOURCE); in psb_gtt_init()
395 if (pg->gtt_start == 0 || gtt_pages == 0) { in psb_gtt_init()
398 pg->gtt_start = dev_priv->pge_ctl; in psb_gtt_init()
401 pg->gatt_start = pci_resource_start(pdev, PSB_GATT_RESOURCE); in psb_gtt_init()
402 pg->gatt_pages = pci_resource_len(pdev, PSB_GATT_RESOURCE) in psb_gtt_init()
406 if (pg->gatt_pages == 0 || pg->gatt_start == 0) { in psb_gtt_init()
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Dpsb_drv.c128 struct psb_gtt *pg = &dev_priv->gtt; in psb_do_init() local
132 if (pg->mmu_gatt_start & 0x0FFFFFFF) { in psb_do_init()
137 stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4; in psb_do_init()
139 stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages; in psb_do_init()
141 dev_priv->gatt_free_offset = pg->mmu_gatt_start + in psb_do_init()
158 PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE); in psb_do_init()
185 struct psb_gtt *pg = &dev_priv->gtt; in psb_driver_unload() local
187 down_read(&pg->sem); in psb_driver_unload()
191 pg->mmu_gatt_start, in psb_driver_unload()
193 up_read(&pg->sem); in psb_driver_unload()
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/drivers/block/paride/
Dpg.c208 struct pg { struct
223 static struct pg devices[PG_UNITS]; argument
225 static int pg_identify(struct pg *dev, int log);
250 struct pg *dev = &devices[unit]; in pg_init_units()
263 static inline int status_reg(struct pg *dev) in status_reg()
268 static inline int read_reg(struct pg *dev, int reg) in read_reg()
273 static inline void write_reg(struct pg *dev, int reg, int val) in write_reg()
278 static inline u8 DRIVE(struct pg *dev) in DRIVE()
288 static int pg_wait(struct pg *dev, int go, int stop, unsigned long tmo, char *msg) in pg_wait()
320 static int pg_command(struct pg *dev, char *cmd, int dlen, unsigned long tmo) in pg_command()
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/drivers/gpio/
Dgpio-palmas.c29 struct palmas_gpio *pg = gpiochip_get_data(gc); in palmas_gpio_get() local
30 struct palmas *palmas = pg->palmas; in palmas_gpio_get()
61 struct palmas_gpio *pg = gpiochip_get_data(gc); in palmas_gpio_set() local
62 struct palmas *palmas = pg->palmas; in palmas_gpio_set()
83 struct palmas_gpio *pg = gpiochip_get_data(gc); in palmas_gpio_output() local
84 struct palmas *palmas = pg->palmas; in palmas_gpio_output()
105 struct palmas_gpio *pg = gpiochip_get_data(gc); in palmas_gpio_input() local
106 struct palmas *palmas = pg->palmas; in palmas_gpio_input()
123 struct palmas_gpio *pg = gpiochip_get_data(gc); in palmas_gpio_to_irq() local
124 struct palmas *palmas = pg->palmas; in palmas_gpio_to_irq()
/drivers/net/wireless/marvell/mwifiex/
Dsta_ioctl.c678 struct mwifiex_power_group *pg; in mwifiex_set_tx_power() local
710 pg = (struct mwifiex_power_group *) in mwifiex_set_tx_power()
714 pg->first_rate_code = 0x00; in mwifiex_set_tx_power()
715 pg->last_rate_code = 0x03; in mwifiex_set_tx_power()
716 pg->modulation_class = MOD_CLASS_HR_DSSS; in mwifiex_set_tx_power()
717 pg->power_step = 0; in mwifiex_set_tx_power()
718 pg->power_min = (s8) dbm_min; in mwifiex_set_tx_power()
719 pg->power_max = (s8) dbm; in mwifiex_set_tx_power()
720 pg++; in mwifiex_set_tx_power()
722 pg->first_rate_code = 0x00; in mwifiex_set_tx_power()
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Dsta_cmdresp.c340 struct mwifiex_power_group *pg; in mwifiex_get_power_level() local
346 pg = (struct mwifiex_power_group *) in mwifiex_get_power_level()
354 max_power = pg->power_max; in mwifiex_get_power_level()
355 min_power = pg->power_min; in mwifiex_get_power_level()
359 pg++; in mwifiex_get_power_level()
360 if (max_power < pg->power_max) in mwifiex_get_power_level()
361 max_power = pg->power_max; in mwifiex_get_power_level()
363 if (min_power > pg->power_min) in mwifiex_get_power_level()
364 min_power = pg->power_min; in mwifiex_get_power_level()
387 struct mwifiex_power_group *pg; in mwifiex_ret_tx_power_cfg() local
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/drivers/net/ethernet/huawei/hinic/
Dhinic_hw_eqs.c634 int err, pg; in alloc_eq_pages() local
648 for (pg = 0; pg < eq->num_pages; pg++) { in alloc_eq_pages()
649 eq->virt_addr[pg] = dma_alloc_coherent(&pdev->dev, in alloc_eq_pages()
651 &eq->dma_addr[pg], in alloc_eq_pages()
653 if (!eq->virt_addr[pg]) { in alloc_eq_pages()
658 addr = EQ_HI_PHYS_ADDR_REG(eq, pg); in alloc_eq_pages()
659 val = upper_32_bits(eq->dma_addr[pg]); in alloc_eq_pages()
663 addr = EQ_LO_PHYS_ADDR_REG(eq, pg); in alloc_eq_pages()
664 val = lower_32_bits(eq->dma_addr[pg]); in alloc_eq_pages()
679 while (--pg >= 0) in alloc_eq_pages()
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/drivers/mmc/host/
Dusdhi6rol0.c167 struct usdhi6_page pg; /* current page from an SG */ member
324 host->head_pg.page = host->pg.page; in usdhi6_blk_bounce()
325 host->head_pg.mapped = host->pg.mapped; in usdhi6_blk_bounce()
326 host->pg.page = nth_page(host->pg.page, 1); in usdhi6_blk_bounce()
327 host->pg.mapped = kmap(host->pg.page); in usdhi6_blk_bounce()
337 memcpy(host->bounce_buf + blk_head, host->pg.mapped, in usdhi6_blk_bounce()
362 WARN(host->pg.page, "%p not properly unmapped!\n", host->pg.page); in usdhi6_sg_map()
368 host->pg.page = sg_page(sg); in usdhi6_sg_map()
369 host->pg.mapped = kmap(host->pg.page); in usdhi6_sg_map()
385 host->blk_page = host->pg.mapped; in usdhi6_sg_map()
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/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_dcb.c1127 data[i].pg = DCBX_ILLEGAL_PG; in bnx2x_dcbx_get_num_pg_traf_type()
1137 if (data[traf_type].pg == add_pg) { in bnx2x_dcbx_get_num_pg_traf_type()
1149 data[help_data->num_of_pg].pg = add_pg; in bnx2x_dcbx_get_num_pg_traf_type()
1249 if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) { in bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params()
1376 u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 }; in bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params() local
1405 pg[0] = pg_help_data->data[0].pg; in bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params()
1408 pg[1] = pg_help_data->data[1].pg; in bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params()
1412 pg[0] = pg_help_data->data[1].pg; in bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params()
1415 pg[1] = pg_help_data->data[0].pg; in bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params()
1425 pg[0] = pg_help_data->data[0].pg; in bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params()
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/drivers/pinctrl/bcm/
Dpinctrl-bcm6362.c522 const struct bcm6362_pingroup *pg = &bcm6362_groups[group]; in bcm6362_pinctrl_set_mux() local
528 for (i = 0; i < pg->num_pins; i++) in bcm6362_pinctrl_set_mux()
529 bcm6362_set_gpio(pc, pg->pins[i]); in bcm6362_pinctrl_set_mux()
534 mask = BIT(pg->pins[0]); in bcm6362_pinctrl_set_mux()
535 val = BIT(pg->pins[0]); in bcm6362_pinctrl_set_mux()
539 mask = BIT(pg->pins[0]); in bcm6362_pinctrl_set_mux()
540 val = BIT(pg->pins[0]); in bcm6362_pinctrl_set_mux()
544 mask = BIT(pg->pins[0]); in bcm6362_pinctrl_set_mux()
Dpinctrl-bcm63268.c548 const struct bcm63268_pingroup *pg = &bcm63268_groups[group]; in bcm63268_pinctrl_set_mux() local
554 for (i = 0; i < pg->num_pins; i++) in bcm63268_pinctrl_set_mux()
555 bcm63268_set_gpio(pc, pg->pins[i]); in bcm63268_pinctrl_set_mux()
560 mask = BIT(pg->pins[0]); in bcm63268_pinctrl_set_mux()
561 val = BIT(pg->pins[0]); in bcm63268_pinctrl_set_mux()
565 mask = BIT(pg->pins[0]); in bcm63268_pinctrl_set_mux()
566 val = BIT(pg->pins[0]); in bcm63268_pinctrl_set_mux()
570 mask = BIT(pg->pins[0]); in bcm63268_pinctrl_set_mux()
Dpinctrl-bcm6358.c262 const struct bcm6358_pingroup *pg = &bcm6358_groups[group]; in bcm6358_pinctrl_set_mux() local
263 unsigned int val = pg->mode_val; in bcm6358_pinctrl_set_mux()
267 for (pin = 0; pin < pg->num_pins; pin++) in bcm6358_pinctrl_set_mux()
272 for (pin = 0; pin < pg->num_pins; pin++) { in bcm6358_pinctrl_set_mux()
280 if (pg->direction & BIT(pin)) in bcm6358_pinctrl_set_mux()
Dpinctrl-bcm6368.c396 const struct bcm6368_pingroup *pg = &bcm6368_groups[group]; in bcm6368_pinctrl_set_mux() local
403 for (i = 0; i < pg->num_pins; i++) { in bcm6368_pinctrl_set_mux()
404 pin = pg->pins[i]; in bcm6368_pinctrl_set_mux()
412 pin = pg->pins[0]; in bcm6368_pinctrl_set_mux()
422 for (pin = 0; pin < pg->num_pins; pin++) { in bcm6368_pinctrl_set_mux()
/drivers/hv/
Dhv_balloon.c674 static void hv_page_online_one(struct hv_hotadd_state *has, struct page *pg) in hv_page_online_one() argument
676 if (!has_pfn_is_backed(has, page_to_pfn(pg))) { in hv_page_online_one()
677 if (!PageOffline(pg)) in hv_page_online_one()
678 __SetPageOffline(pg); in hv_page_online_one()
681 if (PageOffline(pg)) in hv_page_online_one()
682 __ClearPageOffline(pg); in hv_page_online_one()
685 generic_online_page(pg, 0); in hv_page_online_one()
767 static void hv_online_page(struct page *pg, unsigned int order) in hv_online_page() argument
771 unsigned long pfn = page_to_pfn(pg); in hv_online_page()
1202 struct page *pg; in free_balloon_pages() local
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/drivers/target/
Dtarget_core_rd.c66 struct page *pg; in rd_release_sgl_table() local
75 pg = sg_page(&sg[j]); in rd_release_sgl_table()
76 if (pg) { in rd_release_sgl_table()
77 __free_page(pg); in rd_release_sgl_table()
118 struct page *pg; in rd_allocate_sgl_table() local
153 pg = alloc_pages(GFP_KERNEL, 0); in rd_allocate_sgl_table()
154 if (!pg) { in rd_allocate_sgl_table()
159 sg_assign_page(&sg[j], pg); in rd_allocate_sgl_table()
162 p = kmap(pg); in rd_allocate_sgl_table()
164 kunmap(pg); in rd_allocate_sgl_table()
/drivers/power/supply/
Dbq24257_charger.c92 struct gpio_desc *pg; member
438 if (bq->pg) in bq24257_get_chip_state()
439 state->power_good = !gpiod_get_value_cansleep(bq->pg); in bq24257_get_chip_state()
866 bq->pg = devm_gpiod_get_optional(bq->dev, BQ24257_PG_GPIO, GPIOD_IN); in bq24257_pg_gpio_probe()
868 if (PTR_ERR(bq->pg) == -EPROBE_DEFER) { in bq24257_pg_gpio_probe()
871 } else if (IS_ERR(bq->pg)) { in bq24257_pg_gpio_probe()
873 bq->pg = NULL; in bq24257_pg_gpio_probe()
877 if (bq->pg) in bq24257_pg_gpio_probe()
878 dev_dbg(bq->dev, "probed PG pin = %d\n", desc_to_gpio(bq->pg)); in bq24257_pg_gpio_probe()
1036 if (PTR_ERR(bq->pg) == -EPROBE_DEFER) in bq24257_probe()
[all …]
/drivers/dma-buf/heaps/
Dcma_heap.c292 pgoff_t pg; in cma_heap_allocate() local
338 for (pg = 0; pg < pagecount; pg++) in cma_heap_allocate()
339 buffer->pages[pg] = &cma_pages[pg]; in cma_heap_allocate()
/drivers/mtd/tests/
Dreadtest.c83 int pg, oob; in dump_eraseblock() local
100 for (pg = 0, i = 0; pg < pgcnt; pg++) in dump_eraseblock()
/drivers/char/agp/
Di460-agp.c403 int i, start_offset, end_offset, idx, pg, num_entries; in i460_insert_memory_large_io_page() local
443 pg = lp - i460.lp_desc; in i460_insert_memory_large_io_page()
444 WR_GATT(pg, i460_mask_memory(agp_bridge, in i460_insert_memory_large_io_page()
446 WR_FLUSH_GATT(pg); in i460_insert_memory_large_io_page()
464 int i, pg, start_offset, end_offset, idx, num_entries; in i460_remove_memory_large_io_page() local
489 pg = lp - i460.lp_desc; in i460_remove_memory_large_io_page()
490 WR_GATT(pg, 0); in i460_remove_memory_large_io_page()
491 WR_FLUSH_GATT(pg); in i460_remove_memory_large_io_page()
/drivers/pinctrl/
Dpinctrl-oxnas.c591 const struct oxnas_pin_group *pg = &pctl->groups[group]; in oxnas_ox810se_pinmux_enable() local
594 struct oxnas_desc_function *functions = pg->functions; in oxnas_ox810se_pinmux_enable()
595 u32 mask = BIT(pg->pin); in oxnas_ox810se_pinmux_enable()
601 fname, pg->bank, pg->pin, in oxnas_ox810se_pinmux_enable()
605 (pg->bank ? in oxnas_ox810se_pinmux_enable()
612 (pg->bank ? in oxnas_ox810se_pinmux_enable()
619 (pg->bank ? in oxnas_ox810se_pinmux_enable()
641 const struct oxnas_pin_group *pg = &pctl->groups[group]; in oxnas_ox820_pinmux_enable() local
644 struct oxnas_desc_function *functions = pg->functions; in oxnas_ox820_pinmux_enable()
645 unsigned int offset = (pg->bank ? PINMUX_820_BANK_OFFSET : 0); in oxnas_ox820_pinmux_enable()
[all …]
/drivers/net/ethernet/mellanox/mlx4/
Dfw_qos.c56 __be16 pg; member
112 u8 *pg, u16 *ratelimit) in mlx4_SET_PORT_SCHEDULER() argument
146 tc->pg = htons(pg[i]); in mlx4_SET_PORT_SCHEDULER()

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