/drivers/net/phy/ |
D | vitesse.c | 135 phy_modify(phydev, 0x0c, 0x0300, 0x0200); in vsc73xx_config_init() 139 phy_modify(phydev, MII_TPISTATUS, 0xff00, 0x0061); in vsc73xx_config_init() 151 phy_modify(phydev, 0x08, 0x0200, 0x0200); in vsc738x_config_init() 154 phy_modify(phydev, 0x12, 0xff07, 0x0003); in vsc738x_config_init() 155 phy_modify(phydev, 0x11, 0x00ff, 0x00a2); in vsc738x_config_init() 158 phy_modify(phydev, 0x08, 0x0200, 0x0000); in vsc738x_config_init() 168 phy_modify(phydev, 0x08, 0x0200, 0x0200); in vsc738x_config_init() 178 phy_modify(phydev, 0x08, 0x0200, 0x0000); in vsc738x_config_init() 193 phy_modify(phydev, 0x16, 0x0fc0, 0x0240); in vsc738x_config_init() 194 phy_modify(phydev, 0x14, 0x6000, 0x4000); in vsc738x_config_init() [all …]
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D | nxp-tja11xx.c | 111 ret = phy_modify(phydev, reg, mask, set); in phy_modify_check() 160 ret = phy_modify(phydev, MII_ECTRL, MII_ECTRL_POWER_MODE_MASK, in tja11xx_wakeup() 268 ret = phy_modify(phydev, MII_CFG1, in tja11xx_config_init() 290 ret = phy_modify(phydev, MII_CFG2, MII_CFG2_SLEEP_REQUEST_TO, in tja11xx_config_init()
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D | marvell.c | 799 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL, in m88e3016_config_init() 815 return phy_modify(phydev, MII_M1111_PHY_EXT_SR, in m88e1111_config_init_hwcfg_mode() 841 return phy_modify(phydev, MII_M1111_PHY_EXT_CR, in m88e1111_config_init_rgmii_delays() 921 err = phy_modify(phydev, MII_M1111_PHY_EXT_SR, in m88e1111_config_init_1000basex() 997 err = phy_modify(phydev, MII_M1111_PHY_EXT_CR, in m88e1111_set_downshift() 1061 err = phy_modify(phydev, MII_M1011_PHY_SCR, in m88e1011_set_downshift() 1190 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, in m88e1510_config_init() 1313 err = phy_modify(phydev, 0x1e, 0x0fc0, in m88e1145_config_init_rgmii() 1442 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3, in m88e1540_set_fld() 1979 err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, in m88e1510_loopback() [all …]
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D | dp83869.c | 467 return phy_modify(phydev, DP83869_CFG2, in dp83869_set_downshift() 668 ret = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0); in dp83869_configure_fiber() 785 ret = phy_modify(phydev, DP83869_CFG2, DP83869_DOWNSHIFT_EN, in dp83869_config_init()
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D | dp83867.c | 442 return phy_modify(phydev, DP83867_CFG2, in dp83867_set_downshift() 649 ret = phy_modify(phydev, DP83867_CFG2, DP83867_DOWNSHIFT_EN, in dp83867_config_init() 845 err = phy_modify(phydev, MII_DP83867_PHYCTRL, in dp83867_phy_reset()
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D | dp83822.c | 413 err = phy_modify(phydev, MII_DP83822_CTRL_2, in dp83822_config_init() 441 err = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0); in dp83822_config_init()
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D | phy_device.c | 2027 return phy_modify(phydev, MII_BMCR, in genphy_setup_forced() 2123 return phy_modify(phydev, MII_BMCR, BMCR_ISOLATE, in genphy_restart_aneg() 2209 err = phy_modify(phydev, MII_BMCR, BMCR_SPEED1000 | BMCR_SPEED100, in genphy_c37_config_aneg() 2508 ret = phy_modify(phydev, MII_BMCR, BMCR_ISOLATE, res); in genphy_soft_reset() 2636 phy_modify(phydev, MII_BMCR, ~0, ctl); in genphy_loopback() 2644 phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0); in genphy_loopback()
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D | at803x.c | 442 phy_modify(phydev, MII_BMCR, 0, value); in at803x_suspend() 449 return phy_modify(phydev, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE, 0); in at803x_resume() 821 return phy_modify(phydev, MII_ADVERTISE, MDIO_AN_CTRL1_XNP, 0); in at803x_config_init()
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D | bcm54140.c | 479 ret = phy_modify(phydev, MII_BMCR, 0, BMCR_PDOWN); in bcm54140_b0_workaround() 483 ret = phy_modify(phydev, MII_BMCR, BMCR_PDOWN, 0); in bcm54140_b0_workaround()
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D | phy-core.c | 631 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) in phy_modify() function 641 EXPORT_SYMBOL_GPL(phy_modify);
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D | adin.c | 352 rc = phy_modify(phydev, ADIN1300_PHY_CTRL3, in adin_set_downshift() 405 return phy_modify(phydev, ADIN1300_PHY_CTRL_STATUS2, in adin_set_edpd()
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D | intel-xway.c | 227 return phy_modify(phydev, XWAY_MDIO_MIICTRL, in xway_gphy_rgmii_init()
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D | micrel.c | 463 return phy_modify(phydev, MII_KSZPHY_CTRL_2, in ksz8081_config_mdix() 1172 return phy_modify(phydev, MII_BMCR, in ksz886x_config_mdix()
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D | mxl-gpy.c | 485 ret = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, in gpy_loopback()
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/drivers/net/ethernet/realtek/ |
D | r8169_phy_config.c | 468 phy_modify(phydev, 0x0b, 0x00ef, 0x0010); in rtl8168d_1_hw_phy_config() 469 phy_modify(phydev, 0x0c, 0x5d00, 0xa200); in rtl8168d_1_hw_phy_config() 503 phy_modify(phydev, 0x02, 0x0600, 0x0100); in rtl8168d_1_hw_phy_config() 541 phy_modify(phydev, 0x02, 0x0600, 0x0100); in rtl8168d_2_hw_phy_config() 1284 phy_modify(phydev, 0x17, 0xff00, 0x0800); in rtl8125b_hw_phy_config()
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/drivers/net/phy/mscc/ |
D | mscc_main.c | 2092 ret = phy_modify(phydev, MSCC_PHY_EXT_PHY_CNTL_1, MEDIA_OP_MODE_MASK, in vsc8514_config_init()
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