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Searched refs:psr_level (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dce/
Ddmub_psr.c205 static void dmub_psr_set_level(struct dmub_psr *dmub, uint16_t psr_level, uint8_t panel_inst) in dmub_psr_set_level() argument
220 cmd.psr_set_level.psr_set_level_data.psr_level = psr_level; in dmub_psr_set_level()
296 copy_settings_data->psr_level = psr_context->psr_level.u32all; in dmub_psr_copy_settings()
Ddmub_psr.h44 void (*psr_set_level)(struct dmub_psr *dmub, uint16_t psr_level,
Ddce_dmcu.c271 masterCmdData3.bits.psr_level = psr_context->psr_level.u32all; in dce_dmcu_setup_psr()
710 masterCmdData3.bits.psr_level = psr_context->psr_level.u32all; in dcn10_dmcu_setup_psr()
Ddce_dmcu.h290 unsigned int psr_level:16; /*[15:0]*/ member
/drivers/gpu/drm/amd/display/dmub/inc/
Ddmub_cmd.h1333 uint16_t psr_level; member
1454 uint16_t psr_level; member
/drivers/gpu/drm/amd/display/dc/
Ddc_types.h753 union dmcu_psr_level psr_level; member
/drivers/gpu/drm/amd/display/dc/core/
Ddc_link.c2854 psr_context->psr_level.u32all = 0; in dc_link_setup_psr()
2859 psr_context->psr_level.bits.SKIP_CRTC_DISABLE = true; in dc_link_setup_psr()
2861 psr_context->psr_level.bits.SKIP_CRTC_DISABLE = false; in dc_link_setup_psr()
2865 psr_context->psr_level.bits.SKIP_CRTC_DISABLE = true; in dc_link_setup_psr()
2879 psr_context->psr_level.bits.DISABLE_PSR_ENTRY_ABORT = 1; in dc_link_setup_psr()