| /drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/ |
| D | gpc.fuc | 60 */ mov b32 $r15 reg /*
65 // In: $r15 error code (see os.h)
69 nv_wr32(NV_PGRAPH_FECS_CC_SCRATCH_VAL(5), $r15)
70 mov $r15 1
71 nv_wr32(NV_PGRAPH_FECS_INTR_UP_SET, $r15)
88 */ mov $r15 NV_PGRAPH_GPC0_TPCX_STRAND_CMD_ENABLE /*
89 */ gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_CMD, $r15) /*
92 */ mov $r15 NV_PGRAPH_GPC0_TPCX_STRAND_CMD_DISABLE /*
93 */ gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_CMD, $r15) /*
96 */ mov $r15 NV_PGRAPH_GPC0_TPCX_STRAND_INDEX_ALL /*
[all …]
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| D | hub.fuc | 52 // In: $r15 error code (see os.h)
55 nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_VAL(5), 0, $r15)
56 mov $r15 1
57 nv_iowr(NV_PGRAPH_FECS_INTR_UP_SET, 0, $r15)
122 extr $r1 $r15 16:20
124 and $r15 0x1f
125 st b32 D[$r0 + #gpc_count] $r15
129 shl b32 $r1 $r15
138 mov $r15 2
141 mov $r15 0x10
[all …]
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| D | com.fuc | 31 // $r15 data
40 mov $r15 E_CMD_OVERFLOW
51 st b32 D[$r8 + 0x4] $r15
65 // $r15 data
79 ld b32 $r15 D[$r9 + 0x4]
92 // Out: $r15 value
104 nv_iord($r15, NV_PGRAPH_FECS_MMIO_RDVAL, 0)
110 // $r15 value
113 nv_iowr(NV_PGRAPH_FECS_MMIO_WRVAL, 0, $r15)
155 // $r15 mmio list tail
[all …]
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| D | macros.fuc | 246 */ mov b32 reg $r15
249 */ mov b32 $r15 reg /*
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| /drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/ |
| D | kernel.fuc | 48 // $r15 - current
65 // $r15 - current
94 // $r15 - current
112 // $r15 - current
136 // $r15 - current (kern)
186 push $r15
187 mov $r15 #proc_kern
231 pop $r15
245 // $r15 - current
279 // $r15 - current
[all …]
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| D | memx.fuc | 79 // $r15 - current (memx)
123 // $r15 - current (memx)
166 // $r15 - current (memx)
204 // $r15 - current (memx)
217 // $r15 - current (memx)
234 // $r15 - current (memx)
254 // $r15 - current (memx)
267 // $r15 - current (memx)
362 // $r15 - current (memx)
403 // $r15 - current (memx)
[all …]
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| D | idle.fuc | 41 // $r15 - current (idle)
49 // $r15 - current (idle)
77 cmp b32 $r1 $r15
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| D | perf.fuc | 42 // $r15 - current (perf)
53 // $r15 - current (perf)
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| D | test.fuc | 41 // $r15 - current (test)
57 // $r15 - current (test)
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| D | host.fuc | 64 // $r15 - current (host)
93 // $r15 - current (host)
132 // $r15 - current (host)
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| D | i2c_.fuc | 305 // $r15 - current (i2c)
389 // $r15 - current (i2c)
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| D | arith.fuc | 46 // $r15 - current
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| /drivers/media/usb/dvb-usb-v2/ |
| D | mxl111sf-gpio.c | 204 u8 r12, r15, r17, r18, r3D, r82, r84, r89; in mxl111sf_config_pin_mux_modes() local
218 ret = mxl111sf_read_reg(state, 0x15, &r15); in mxl111sf_config_pin_mux_modes()
247 r15 &= ~PIN_MUX_I2S_ENABLE_MASK; in mxl111sf_config_pin_mux_modes()
275 r15 &= ~PIN_MUX_I2S_ENABLE_MASK; in mxl111sf_config_pin_mux_modes()
303 r15 &= ~PIN_MUX_I2S_ENABLE_MASK; in mxl111sf_config_pin_mux_modes()
331 r15 &= ~PIN_MUX_I2S_ENABLE_MASK; in mxl111sf_config_pin_mux_modes()
359 r15 &= ~PIN_MUX_I2S_ENABLE_MASK; in mxl111sf_config_pin_mux_modes()
387 r15 |= PIN_MUX_I2S_ENABLE_MASK; in mxl111sf_config_pin_mux_modes()
415 r15 |= PIN_MUX_I2S_ENABLE_MASK; in mxl111sf_config_pin_mux_modes()
443 r15 &= ~PIN_MUX_I2S_ENABLE_MASK; in mxl111sf_config_pin_mux_modes()
[all …]
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| /drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/ |
| D | com.fuc | 198 mov $r15 0x61c
199 shl b32 $r15 6
201 iowrs I[$r15] $r5
220 iowrs I[$r15] $r14
248 xbit $r15 $r3 0x1e
582 shl b32 $r15 $r14 12
584 or $r15 $r14
588 iowr I[$r6 + 0x000] $r15
595 ld b32 $r15 D[$r5 + #ctx_src_xsize]
597 mulu $r15 $r11
[all …]
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| /drivers/net/wireless/broadcom/b43/ |
| D | radio_2057.c | 117 r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \ argument
134 .radio_pad2g_tune_pus_core0 = r15, \
149 r10, r11, r12, r13, r14, r15, r16, r17) \ argument
165 .radio_txmix2g_tune_boost_pu_core1 = r15, \
|
| D | radio_2059.c | 23 r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \ argument
40 .radio_rxtx5a = r15, \
|
| D | radio_2055.c | 259 r12, r13, r14, r15, r16, r17, r18, r19, r20, r21) \ argument
275 .radio_c1_tx_pgapadtn = r15, \
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| D | radio_2056.c | 3026 r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \ argument
3044 .radio_syn_logen_buf3 = r15, \
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| /drivers/net/hamradio/ |
| D | dmascc.c | 236 static void start_timer(struct scc_priv *priv, int t, int r15);
1063 static void start_timer(struct scc_priv *priv, int t, int r15) in start_timer() argument
1072 write_scc(priv, R15, r15 | CTSIE); in start_timer()
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| /drivers/tty/serial/ |
| D | sunzilog.c | 179 unsigned char r15; in __load_zsregs() local
235 r15 = read_zsreg(channel, R15); in __load_zsregs()
236 if (r15 & 0x01) { in __load_zsregs()
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| /drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/ |
| D | g98.fuc0s | 173 shl b32 $r15 $r4 1
174 cmps b32 $r15 0
|