| /drivers/net/can/ |
| D | flexcan.c | 662 u32 reg_ctrl = (priv->reg_ctrl_default | FLEXCAN_CTRL_ERR_MSK); in flexcan_error_irq_enable() local
664 priv->write(reg_ctrl, ®s->ctrl); in flexcan_error_irq_enable()
670 u32 reg_ctrl = (priv->reg_ctrl_default & ~FLEXCAN_CTRL_ERR_MSK); in flexcan_error_irq_disable() local
672 priv->write(reg_ctrl, ®s->ctrl); in flexcan_error_irq_disable()
1036 u32 reg_ctrl, reg_id, reg_iflag1; in flexcan_mailbox_read() local
1045 reg_ctrl = priv->read(&mb->can_ctrl); in flexcan_mailbox_read()
1046 } while (reg_ctrl & FLEXCAN_MB_CODE_RX_BUSY_BIT); in flexcan_mailbox_read()
1049 code = reg_ctrl & FLEXCAN_MB_CODE_MASK; in flexcan_mailbox_read()
1064 reg_ctrl = priv->read(&mb->can_ctrl); in flexcan_mailbox_read()
1072 if (reg_ctrl & FLEXCAN_MB_CNT_EDL) in flexcan_mailbox_read()
[all …]
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| /drivers/media/pci/cx23885/ |
| D | cx23885-i2c.c | 84 cx_write(bus->reg_ctrl, bus->i2c_period | (1 << 2)); in i2c_sendbytes()
107 cx_write(bus->reg_ctrl, ctrl); in i2c_sendbytes()
129 cx_write(bus->reg_ctrl, ctrl); in i2c_sendbytes()
163 cx_write(bus->reg_ctrl, bus->i2c_period | (1 << 2) | 1); in i2c_readbytes()
189 cx_write(bus->reg_ctrl, ctrl); in i2c_readbytes()
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| D | cx23885.h | 241 u32 reg_ctrl; member
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| D | cx23885-core.c | 949 dev->i2c_bus[0].reg_ctrl = I2C1_CTRL; in cx23885_dev_setup()
959 dev->i2c_bus[1].reg_ctrl = I2C2_CTRL; in cx23885_dev_setup()
969 dev->i2c_bus[2].reg_ctrl = I2C3_CTRL; in cx23885_dev_setup()
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| /drivers/media/pci/cx25821/ |
| D | cx25821-i2c.c | 83 cx_write(bus->reg_ctrl, bus->i2c_period | (1 << 2)); in i2c_sendbytes()
108 cx_write(bus->reg_ctrl, ctrl); in i2c_sendbytes()
134 cx_write(bus->reg_ctrl, ctrl); in i2c_sendbytes()
174 cx_write(bus->reg_ctrl, bus->i2c_period | (1 << 2) | 1); in i2c_readbytes()
199 cx_write(bus->reg_ctrl, ctrl); in i2c_readbytes()
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| D | cx25821.h | 149 u32 reg_ctrl; member
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| D | cx25821-core.c | 891 dev->i2c_bus[0].reg_ctrl = I2C1_CTRL; in cx25821_dev_setup()
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| /drivers/gpu/drm/tiny/ |
| D | arcpgu.c | 119 u32 reg_ctrl; in arc_pgu_set_pxl_fmt() local
129 reg_ctrl = arc_pgu_read(arcpgu, ARCPGU_REG_CTRL); in arc_pgu_set_pxl_fmt()
131 reg_ctrl &= ~ARCPGU_MODE_XRGB8888; in arc_pgu_set_pxl_fmt()
133 reg_ctrl |= ARCPGU_MODE_XRGB8888; in arc_pgu_set_pxl_fmt()
134 arc_pgu_write(arcpgu, ARCPGU_REG_CTRL, reg_ctrl); in arc_pgu_set_pxl_fmt()
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| /drivers/spi/ |
| D | spi-ath79.c | 42 u32 reg_ctrl; member
89 sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL); in ath79_spi_enable()
102 ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl); in ath79_spi_disable()
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| /drivers/gpu/drm/hisilicon/kirin/ |
| D | kirin_drm_ade.c | 350 u32 reg_ctrl, reg_addr, reg_size, reg_stride, reg_space, reg_en; in ade_rdma_dump_regs() local
353 reg_ctrl = RD_CH_CTRL(ch); in ade_rdma_dump_regs()
362 val = readl(base + reg_ctrl); in ade_rdma_dump_regs()
552 u32 reg_ctrl, reg_addr, reg_size, reg_stride, reg_space, reg_en; in ade_rdma_set() local
563 reg_ctrl = RD_CH_CTRL(ch); in ade_rdma_set()
573 writel((fmt << 16) & 0x1f0000, base + reg_ctrl); in ade_rdma_set()
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| /drivers/misc/lis3lv02d/ |
| D | lis3lv02d.h | 267 int (*reg_ctrl) (struct lis3lv02d *lis3, bool state); member
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| D | lis3lv02d.c | 394 if (lis3->reg_ctrl) in lis3lv02d_poweroff()
398 if (lis3->reg_ctrl) in lis3lv02d_poweroff()
399 lis3->reg_ctrl(lis3, LIS3_REG_OFF); in lis3lv02d_poweroff()
437 if (lis3->reg_ctrl) in lis3lv02d_poweron()
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| /drivers/net/wireless/ath/wcn36xx/ |
| D | dxe.c | 124 wcn->dxe_tx_l_ch.reg_ctrl = WCN36XX_DXE_REG_CTL_TX_L; in wcn36xx_dxe_alloc_ctl_blks()
125 wcn->dxe_tx_h_ch.reg_ctrl = WCN36XX_DXE_REG_CTL_TX_H; in wcn36xx_dxe_alloc_ctl_blks()
843 ch->reg_ctrl, ch->def_ctrl); in wcn36xx_dxe_tx_frame()
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| D | dxe.h | 443 u32 reg_ctrl; member
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | vi.c | 1062 u32 reg_ctrl; in vi_set_vce_clocks() local
1068 reg_ctrl = ixGNB_CLK3_DFS_CNTL; in vi_set_vce_clocks()
1073 reg_ctrl = ixCG_ECLK_CNTL; in vi_set_vce_clocks()
1094 tmp = RREG32_SMC(reg_ctrl); in vi_set_vce_clocks()
1097 WREG32_SMC(reg_ctrl, tmp); in vi_set_vce_clocks()
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