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Searched refs:reg_enable (Results 1 – 3 of 3) sorted by relevance

/drivers/irqchip/
Dirq-bcm6345-l1.c91 static inline unsigned int reg_enable(struct bcm6345_l1_chip *intc, in reg_enable() function
133 pending &= __raw_readl(cpu->map_base + reg_enable(intc, idx)); in bcm6345_l1_irq_handle()
156 intc->cpus[cpu_idx]->map_base + reg_enable(intc, word)); in __bcm6345_l1_unmask()
168 intc->cpus[cpu_idx]->map_base + reg_enable(intc, word)); in __bcm6345_l1_mask()
262 __raw_writel(0, cpu->map_base + reg_enable(intc, i)); in bcm6345_l1_init_one()
Dirq-bcm2835.c70 static const int reg_enable[] __initconst = { 0x18, 0x10, 0x14 }; variable
152 intc.enable[b] = base + reg_enable[b]; in armctrl_of_init()
/drivers/cpufreq/
Dqcom-cpufreq-hw.c32 u32 reg_enable; member
364 .reg_enable = 0x0,
373 .reg_enable = 0x0,
494 if (!(readl_relaxed(base + data->soc_data->reg_enable) & 0x1)) { in qcom_cpufreq_hw_cpu_init()