/drivers/clk/imx/ |
D | clk-pllv4.c | 92 unsigned long round_rate, i; in clk_pllv4_round_rate() local 98 round_rate = parent_rate * pllv4_mult_table[i]; in clk_pllv4_round_rate() 99 if (rate >= round_rate) { in clk_pllv4_round_rate() 114 temp64 = (u64)(rate - round_rate); in clk_pllv4_round_rate() 126 return round_rate; in clk_pllv4_round_rate() 132 return round_rate + (u32)temp64; in clk_pllv4_round_rate() 203 .round_rate = clk_pllv4_round_rate,
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D | clk-fixup-div.c | 49 return fixup_div->ops->round_rate(&fixup_div->divider.hw, rate, prate); in clk_fixup_div_round_rate() 84 .round_rate = clk_fixup_div_round_rate,
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D | clk-pllv3.c | 154 .round_rate = clk_pllv3_round_rate, 209 .round_rate = clk_pllv3_sys_round_rate, 298 .round_rate = clk_pllv3_av_round_rate, 391 .round_rate = clk_pllv3_vf610_round_rate,
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D | clk-busy.c | 54 return busy->div_ops->round_rate(&busy->div.hw, rate, prate); in clk_busy_divider_round_rate() 72 .round_rate = clk_busy_divider_round_rate,
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D | clk-scu.c | 428 .round_rate = clk_scu_round_rate, 438 .round_rate = clk_scu_round_rate, 446 .round_rate = clk_scu_round_rate, 759 .round_rate = clk_gpr_div_scu_round_rate,
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/drivers/clk/actions/ |
D | owl-composite.c | 119 return comp->fix_fact_ops->round_rate(&fix_fact_hw->hw, rate, parent_rate); in owl_comp_fix_fact_round_rate() 155 .round_rate = owl_comp_div_round_rate, 172 .round_rate = owl_comp_fact_round_rate, 184 .round_rate = owl_comp_fix_fact_round_rate,
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/drivers/clk/ |
D | clk-vt8500.c | 205 .round_rate = vt8500_dclk_round_rate, 214 .round_rate = vt8500_dclk_round_rate, 602 long round_rate; in vtwm_pll_round_rate() local 609 round_rate = VT8500_BITS_TO_FREQ(*prate, mul, div1); in vtwm_pll_round_rate() 614 round_rate = WM8650_BITS_TO_FREQ(*prate, mul, div1, div2); in vtwm_pll_round_rate() 619 round_rate = WM8750_BITS_TO_FREQ(*prate, mul, div1, div2); in vtwm_pll_round_rate() 624 round_rate = WM8850_BITS_TO_FREQ(*prate, mul, div1, div2); in vtwm_pll_round_rate() 633 return round_rate; in vtwm_pll_round_rate() 668 .round_rate = vtwm_pll_round_rate,
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D | clk-composite.c | 61 if (rate_hw && rate_ops && rate_ops->round_rate && in clk_composite_determine_rate() 70 rate = rate_ops->round_rate(rate_hw, req->rate, in clk_composite_determine_rate() 86 tmp_rate = rate_ops->round_rate(rate_hw, req->rate, in clk_composite_determine_rate() 128 return rate_ops->round_rate(rate_hw, rate, prate); in clk_composite_round_rate() 257 else if (rate_ops->round_rate) in __clk_hw_register_composite() 258 clk_composite_ops->round_rate = in __clk_hw_register_composite() 263 if (rate_ops->determine_rate || rate_ops->round_rate) in __clk_hw_register_composite()
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/drivers/clk/ti/ |
D | dpll.c | 36 .round_rate = &omap4_dpll_regm4xen_round_rate, 61 .round_rate = &omap2_dpll_round_rate, 74 .round_rate = &omap2_dpll_round_rate, 93 .round_rate = &omap2_dpll_round_rate, 104 .round_rate = &omap2_dpll_round_rate, 120 .round_rate = &omap2_dpll_round_rate, 132 .round_rate = &omap2_dpll_round_rate, 144 .round_rate = &omap2_dpll_round_rate,
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/drivers/sh/clk/ |
D | cpg.c | 183 .round_rate = sh_clk_div_round_rate, 189 .round_rate = sh_clk_div_round_rate, 314 .round_rate = sh_clk_div_round_rate, 368 .round_rate = sh_clk_div_round_rate, 446 .round_rate = fsidiv_round_rate,
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/drivers/clk/mvebu/ |
D | clk-corediv.c | 202 .round_rate = clk_corediv_round_rate, 218 .round_rate = clk_corediv_round_rate, 231 .round_rate = clk_corediv_round_rate, 243 .round_rate = clk_corediv_round_rate,
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/drivers/clk/qcom/ |
D | clk-alpha-pll.c | 920 .round_rate = clk_alpha_pll_round_rate, 930 .round_rate = alpha_pll_huayra_round_rate, 940 .round_rate = clk_alpha_pll_round_rate, 950 .round_rate = clk_alpha_pll_round_rate, 1035 .round_rate = clk_alpha_pll_postdiv_round_rate, 1041 .round_rate = clk_alpha_pll_postdiv_round_ro_rate, 1279 .round_rate = clk_alpha_pll_round_rate, 1288 .round_rate = clk_alpha_pll_round_rate, 1371 .round_rate = clk_trion_pll_postdiv_round_rate, 1417 .round_rate = clk_alpha_pll_postdiv_fabia_round_rate, [all …]
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D | clk-regmap-divider.c | 73 .round_rate = div_round_rate, 80 .round_rate = div_round_ro_rate,
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/drivers/clk/mxs/ |
D | clk-div.c | 48 return div->ops->round_rate(&div->divider.hw, rate, prate); in clk_div_round_rate() 66 .round_rate = clk_div_round_rate,
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/drivers/clk/samsung/ |
D | clk-pll.c | 296 .round_rate = samsung_pll_round_rate, 409 .round_rate = samsung_pll_round_rate, 532 .round_rate = samsung_pll_round_rate, 677 .round_rate = samsung_pll_round_rate, 906 .round_rate = samsung_pll_round_rate, 914 .round_rate = samsung_pll_round_rate, 922 .round_rate = samsung_pll_round_rate, 1053 .round_rate = samsung_pll_round_rate, 1145 .round_rate = samsung_pll_round_rate, 1237 .round_rate = samsung_pll_round_rate,
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/drivers/clk/tegra/ |
D | clk-periph.c | 57 return div_ops->round_rate(div_hw, rate, prate); in clk_periph_round_rate() 133 .round_rate = clk_periph_round_rate, 156 .round_rate = clk_periph_round_rate,
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D | clk-audio-sync.c | 41 .round_rate = clk_sync_source_round_rate,
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/drivers/clk/ux500/ |
D | clk-prcmu.c | 196 .round_rate = clk_prcmu_round_rate, 213 .round_rate = clk_prcmu_round_rate, 240 .round_rate = clk_prcmu_round_rate,
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/drivers/media/platform/qcom/camss/ |
D | camss-csiphy.c | 146 long round_rate; in csiphy_set_clock_rates() local 165 round_rate = clk_round_rate(clock->clk, clock->freq[j]); in csiphy_set_clock_rates() 166 if (round_rate < 0) { in csiphy_set_clock_rates() 168 round_rate); in csiphy_set_clock_rates() 172 csiphy->timer_clk_rate = round_rate; in csiphy_set_clock_rates()
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/drivers/clk/meson/ |
D | clk-mpll.c | 160 .round_rate = mpll_round_rate, 166 .round_rate = mpll_round_rate,
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/drivers/clk/baikal-t1/ |
D | ccu-div.c | 556 .round_rate = ccu_div_var_round_rate, 563 .round_rate = ccu_div_var_round_rate, 573 .round_rate = ccu_div_fixed_round_rate, 587 .round_rate = ccu_div_fixed_round_rate,
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/drivers/clk/zynqmp/ |
D | divider.c | 202 .round_rate = zynqmp_clk_divider_round_rate, 208 .round_rate = zynqmp_clk_divider_round_rate,
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/drivers/clk/sifive/ |
D | fu540-prci.c | 49 .round_rate = sifive_prci_wrpll_round_rate,
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/drivers/clk/at91/ |
D | clk-sam9x60-pll.c | 288 .round_rate = sam9x60_frac_pll_round_rate, 297 .round_rate = sam9x60_frac_pll_round_rate, 490 .round_rate = sam9x60_div_pll_round_rate, 499 .round_rate = sam9x60_div_pll_round_rate,
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/drivers/clk/sprd/ |
D | composite.c | 56 .round_rate = sprd_comp_round_rate,
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