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Searched refs:rq_regs_c (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubp.c160 CHUNK_SIZE_C, rq_regs->rq_regs_c.chunk_size, in hubp21_program_requestor()
161 MIN_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_chunk_size, in hubp21_program_requestor()
162 META_CHUNK_SIZE_C, rq_regs->rq_regs_c.meta_chunk_size, in hubp21_program_requestor()
163 MIN_META_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_meta_chunk_size, in hubp21_program_requestor()
164 DPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.dpte_group_size, in hubp21_program_requestor()
165 SWATH_HEIGHT_C, rq_regs->rq_regs_c.swath_height, in hubp21_program_requestor()
166 PTE_ROW_HEIGHT_LINEAR_C, rq_regs->rq_regs_c.pte_row_height_linear); in hubp21_program_requestor()
282 CHUNK_SIZE_C, &rq_regs.rq_regs_c.chunk_size, in hubp21_validate_dml_output()
283 MIN_CHUNK_SIZE_C, &rq_regs.rq_regs_c.min_chunk_size, in hubp21_validate_dml_output()
284 META_CHUNK_SIZE_C, &rq_regs.rq_regs_c.meta_chunk_size, in hubp21_validate_dml_output()
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/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hubp.c218 CHUNK_SIZE_C, rq_regs->rq_regs_c.chunk_size, in hubp2_program_requestor()
219 MIN_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_chunk_size, in hubp2_program_requestor()
220 META_CHUNK_SIZE_C, rq_regs->rq_regs_c.meta_chunk_size, in hubp2_program_requestor()
221 MIN_META_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_meta_chunk_size, in hubp2_program_requestor()
222 DPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.dpte_group_size, in hubp2_program_requestor()
223 MPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.mpte_group_size, in hubp2_program_requestor()
224 SWATH_HEIGHT_C, rq_regs->rq_regs_c.swath_height, in hubp2_program_requestor()
225 PTE_ROW_HEIGHT_LINEAR_C, rq_regs->rq_regs_c.pte_row_height_linear); in hubp2_program_requestor()
1277 CHUNK_SIZE_C, &rq_regs->rq_regs_c.chunk_size, in hubp2_read_state()
1278 MIN_CHUNK_SIZE_C, &rq_regs->rq_regs_c.min_chunk_size, in hubp2_read_state()
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/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hubp.c575 CHUNK_SIZE_C, rq_regs->rq_regs_c.chunk_size, in hubp1_program_requestor()
576 MIN_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_chunk_size, in hubp1_program_requestor()
577 META_CHUNK_SIZE_C, rq_regs->rq_regs_c.meta_chunk_size, in hubp1_program_requestor()
578 MIN_META_CHUNK_SIZE_C, rq_regs->rq_regs_c.min_meta_chunk_size, in hubp1_program_requestor()
579 DPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.dpte_group_size, in hubp1_program_requestor()
580 MPTE_GROUP_SIZE_C, rq_regs->rq_regs_c.mpte_group_size, in hubp1_program_requestor()
581 SWATH_HEIGHT_C, rq_regs->rq_regs_c.swath_height, in hubp1_program_requestor()
582 PTE_ROW_HEIGHT_LINEAR_C, rq_regs->rq_regs_c.pte_row_height_linear); in hubp1_program_requestor()
1090 CHUNK_SIZE_C, &rq_regs->rq_regs_c.chunk_size, in hubp1_read_state()
1091 MIN_CHUNK_SIZE_C, &rq_regs->rq_regs_c.min_chunk_size, in hubp1_read_state()
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Ddcn10_hw_sequencer_debug.c217 …rq_regs->rq_regs_l.pte_row_height_linear, rq_regs->rq_regs_c.chunk_size, rq_regs->rq_regs_c.min_ch… in dcn10_get_rq_states()
218 rq_regs->rq_regs_c.meta_chunk_size, rq_regs->rq_regs_c.min_meta_chunk_size, in dcn10_get_rq_states()
219 rq_regs->rq_regs_c.dpte_group_size, rq_regs->rq_regs_c.mpte_group_size, in dcn10_get_rq_states()
220 rq_regs->rq_regs_c.swath_height, rq_regs->rq_regs_c.pte_row_height_linear); in dcn10_get_rq_states()
Ddcn10_hw_sequencer.c214 …rq_regs->rq_regs_l.pte_row_height_linear, rq_regs->rq_regs_c.chunk_size, rq_regs->rq_regs_c.min_ch… in dcn10_log_hubp_states()
215 rq_regs->rq_regs_c.meta_chunk_size, rq_regs->rq_regs_c.min_meta_chunk_size, in dcn10_log_hubp_states()
216 rq_regs->rq_regs_c.dpte_group_size, rq_regs->rq_regs_c.mpte_group_size, in dcn10_log_hubp_states()
217 rq_regs->rq_regs_c.swath_height, rq_regs->rq_regs_c.pte_row_height_linear); in dcn10_log_hubp_states()
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_hubp.c454 CHUNK_SIZE_C, &rq_regs->rq_regs_c.chunk_size, in hubp3_read_state()
455 MIN_CHUNK_SIZE_C, &rq_regs->rq_regs_c.min_chunk_size, in hubp3_read_state()
456 META_CHUNK_SIZE_C, &rq_regs->rq_regs_c.meta_chunk_size, in hubp3_read_state()
457 MIN_META_CHUNK_SIZE_C, &rq_regs->rq_regs_c.min_meta_chunk_size, in hubp3_read_state()
458 DPTE_GROUP_SIZE_C, &rq_regs->rq_regs_c.dpte_group_size, in hubp3_read_state()
459 SWATH_HEIGHT_C, &rq_regs->rq_regs_c.swath_height, in hubp3_read_state()
460 PTE_ROW_HEIGHT_LINEAR_C, &rq_regs->rq_regs_c.pte_row_height_linear); in hubp3_read_state()
/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_rq_dlg_helpers.c185 print__data_rq_regs_st(mode_lib, rq_regs.rq_regs_c); in print__rq_regs_st()
Ddisplay_mode_structs.h533 display_data_rq_regs_st rq_regs_c; member
Ddml1_display_rq_dlg_calc.c241 extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c); in dml1_extract_rq_regs()
244 rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height); in dml1_extract_rq_regs()
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20.c202 extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c); in extract_rq_regs()
203 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param.dlg.rq_c.dpte_row_height), in extract_rq_regs()
208 rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height); in extract_rq_regs()
Ddisplay_rq_dlg_calc_20v2.c202 extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c); in extract_rq_regs()
203 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param.dlg.rq_c.dpte_row_height), in extract_rq_regs()
208 rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height); in extract_rq_regs()
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.c181 extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c); in extract_rq_regs()
182 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor( in extract_rq_regs()
188 rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height); in extract_rq_regs()
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_rq_dlg_calc_31.c209 extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c); in extract_rq_regs()
210 …rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param.dlg.rq_c.dpte_row_height), … in extract_rq_regs()
214 rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height); in extract_rq_regs()
/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_rq_dlg_calc_30.c127 extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c); in extract_rq_regs()
128 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param.dlg.rq_c.dpte_row_height), in extract_rq_regs()
133 rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height); in extract_rq_regs()