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Searched refs:rx_delay (Results 1 – 11 of 11) sorted by relevance

/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-mediatek.c45 u32 rx_delay; member
131 mac_delay->rx_delay /= 550; in mt2712_delay_ps2stage()
139 mac_delay->rx_delay /= 170; in mt2712_delay_ps2stage()
156 mac_delay->rx_delay *= 550; in mt2712_delay_stage2ps()
164 mac_delay->rx_delay *= 170; in mt2712_delay_stage2ps()
185 delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
186 delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay); in mt2712_set_delay()
196 delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
197 delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->rx_delay); in mt2712_set_delay()
215 delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
[all …]
Ddwmac-rk.c31 int tx_delay, int rx_delay);
66 int rx_delay; member
168 int tx_delay, int rx_delay) in rk3128_set_to_rgmii() argument
181 DELAY_ENABLE(RK3128, tx_delay, rx_delay) | in rk3128_set_to_rgmii()
182 RK3128_GMAC_CLK_RX_DL_CFG(rx_delay) | in rk3128_set_to_rgmii()
284 int tx_delay, int rx_delay) in rk3228_set_to_rgmii() argument
296 DELAY_ENABLE(RK3228, tx_delay, rx_delay)); in rk3228_set_to_rgmii()
299 RK3228_GMAC_CLK_RX_DL_CFG(rx_delay) | in rk3228_set_to_rgmii()
406 int tx_delay, int rx_delay) in rk3288_set_to_rgmii() argument
419 DELAY_ENABLE(RK3288, tx_delay, rx_delay) | in rk3288_set_to_rgmii()
[all …]
Ddwmac-ingenic.c63 int rx_delay; member
214 if (mac->rx_delay == 0) in x2000_mac_set_mode()
218 FIELD_PREP(MACPHYC_RX_DELAY_MASK, (mac->rx_delay + 9750) / 19500 - 1); in x2000_mac_set_mode()
284 mac->rx_delay = rx_delay_ps * 1000; in ingenic_mac_probe()
/drivers/net/phy/
Dnxp-c45-tja11xx.c201 u32 rx_delay; member
891 u64 rx_delay = priv->rx_delay; in nxp_c45_set_delays() local
906 degree = div_u64(rx_delay, PS_PER_DEGREE); in nxp_c45_set_delays()
940 &priv->rx_delay); in nxp_c45_get_delays()
942 priv->rx_delay = DEFAULT_ID_PS; in nxp_c45_get_delays()
944 ret = nxp_c45_check_delay(phydev, priv->rx_delay); in nxp_c45_get_delays()
/drivers/staging/octeon/
Dethernet.c645 bool rx_delay; in cvm_set_rgmii_delay() local
651 rx_delay = true; in cvm_set_rgmii_delay()
656 rx_delay = delay_value > 0; in cvm_set_rgmii_delay()
663 if (!rx_delay && !tx_delay) in cvm_set_rgmii_delay()
665 else if (!rx_delay) in cvm_set_rgmii_delay()
/drivers/isdn/mISDN/
Ddsp_cmx.c1758 if (delay < dsp->rx_delay[0])
1759 dsp->rx_delay[0] = delay;
1769 delay = dsp->rx_delay[0];
1772 if (delay > dsp->rx_delay[i])
1773 delay = dsp->rx_delay[i];
1834 dsp->rx_delay[i] = dsp->rx_delay[i - 1];
1839 dsp->rx_delay[0] = CMX_BUFF_HALF; /* (infinite) delay */
Ddsp.h202 int rx_delay[MAX_SECONDS_JITTER_CHECK]; member
/drivers/net/ethernet/apm/xgene/
Dxgene_enet_main.h233 u8 rx_delay; member
Dxgene_enet_hw.c491 CFG_RXCLK_MUXSEL0_SET(&rgmii, pdata->rx_delay); in xgene_gmac_set_speed()
Dxgene_enet_main.c1607 pdata->rx_delay = 2; in xgene_get_rx_delay()
1616 pdata->rx_delay = delay; in xgene_get_rx_delay()
/drivers/net/wireless/ath/ath9k/
Dar9003_calib.c1405 u32 rx_delay = 0; in ar9003_hw_init_cal_pcoem() local
1482 rx_delay = REG_READ(ah, AR_PHY_RX_DELAY); in ar9003_hw_init_cal_pcoem()
1505 REG_WRITE(ah, AR_PHY_RX_DELAY, rx_delay); in ar9003_hw_init_cal_pcoem()