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Searched refs:sam (Results 1 – 5 of 5) sorted by relevance

/drivers/net/ethernet/intel/ixgbevf/
Dipsec.c23 struct sa_mbx_msg *sam; in ixgbevf_ipsec_set_pf_sa() local
27 sam = (struct sa_mbx_msg *)(&msgbuf[1]); in ixgbevf_ipsec_set_pf_sa()
28 sam->flags = xs->xso.flags; in ixgbevf_ipsec_set_pf_sa()
29 sam->spi = xs->id.spi; in ixgbevf_ipsec_set_pf_sa()
30 sam->proto = xs->id.proto; in ixgbevf_ipsec_set_pf_sa()
31 sam->family = xs->props.family; in ixgbevf_ipsec_set_pf_sa()
34 memcpy(sam->addr, &xs->id.daddr.a6, sizeof(xs->id.daddr.a6)); in ixgbevf_ipsec_set_pf_sa()
36 memcpy(sam->addr, &xs->id.daddr.a4, sizeof(xs->id.daddr.a4)); in ixgbevf_ipsec_set_pf_sa()
37 memcpy(sam->key, xs->aead->alg_key, sizeof(sam->key)); in ixgbevf_ipsec_set_pf_sa()
/drivers/clk/hisilicon/
Dclk-hi3620.c325 u32 sam, drv, div, val; in mmc_clk_set_timing() local
330 sam = 3; in mmc_clk_set_timing()
335 sam = 13; in mmc_clk_set_timing()
340 sam = 3; in mmc_clk_set_timing()
345 sam = 6; in mmc_clk_set_timing()
350 sam = 6; in mmc_clk_set_timing()
365 val = mmc_clk_delay(val, sam, mclk->sam_off, mclk->sam_bits); in mmc_clk_set_timing()
/drivers/net/ethernet/intel/ixgbe/
Dixgbe_ipsec.c888 struct sa_mbx_msg *sam; in ixgbe_ipsec_vf_add_sa() local
895 sam = (struct sa_mbx_msg *)(&msgbuf[1]); in ixgbe_ipsec_vf_add_sa()
906 sam->flags = sam->flags & ~XFRM_OFFLOAD_IPV6; in ixgbe_ipsec_vf_add_sa()
907 if (sam->flags != XFRM_OFFLOAD_INBOUND) { in ixgbe_ipsec_vf_add_sa()
918 xs->xso.flags = sam->flags; in ixgbe_ipsec_vf_add_sa()
919 xs->id.spi = sam->spi; in ixgbe_ipsec_vf_add_sa()
920 xs->id.proto = sam->proto; in ixgbe_ipsec_vf_add_sa()
921 xs->props.family = sam->family; in ixgbe_ipsec_vf_add_sa()
923 memcpy(&xs->id.daddr.a6, sam->addr, sizeof(xs->id.daddr.a6)); in ixgbe_ipsec_vf_add_sa()
925 memcpy(&xs->id.daddr.a4, sam->addr, sizeof(xs->id.daddr.a4)); in ixgbe_ipsec_vf_add_sa()
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/drivers/net/can/mscan/
Dmscan.h256 #define BTR1_SET_SAM(sam) ((sam) ? 1 << BTR1_SAM_SHIFT : 0) argument
/drivers/ata/
Dpata_octeon_cf.c112 reg_cfg.s.sam = 0; /* Don't combine write and output enable */ in octeon_cf_set_boot_reg_cfg()