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Searched refs:sel (Results 1 – 25 of 213) sorted by relevance

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/drivers/media/platform/vsp1/
Dvsp1_rwpf.c134 struct v4l2_subdev_selection *sel) in vsp1_rwpf_get_selection() argument
145 if (rwpf->entity.type == VSP1_ENTITY_WPF || sel->pad != RWPF_PAD_SINK) in vsp1_rwpf_get_selection()
151 sel->which); in vsp1_rwpf_get_selection()
157 switch (sel->target) { in vsp1_rwpf_get_selection()
159 sel->r = *vsp1_rwpf_get_crop(rwpf, config); in vsp1_rwpf_get_selection()
165 sel->r.left = 0; in vsp1_rwpf_get_selection()
166 sel->r.top = 0; in vsp1_rwpf_get_selection()
167 sel->r.width = format->width; in vsp1_rwpf_get_selection()
168 sel->r.height = format->height; in vsp1_rwpf_get_selection()
183 struct v4l2_subdev_selection *sel) in vsp1_rwpf_set_selection() argument
[all …]
Dvsp1_uif.c86 struct v4l2_subdev_selection *sel) in uif_get_selection() argument
93 if (sel->pad != UIF_PAD_SINK) in uif_get_selection()
99 sel->which); in uif_get_selection()
105 switch (sel->target) { in uif_get_selection()
110 sel->r.left = 0; in uif_get_selection()
111 sel->r.top = 0; in uif_get_selection()
112 sel->r.width = format->width; in uif_get_selection()
113 sel->r.height = format->height; in uif_get_selection()
117 sel->r = *vsp1_entity_get_pad_selection(&uif->entity, config, in uif_get_selection()
118 sel->pad, sel->target); in uif_get_selection()
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Dvsp1_histo.c203 struct v4l2_subdev_selection *sel) in histo_get_selection() argument
211 if (sel->pad != HISTO_PAD_SINK) in histo_get_selection()
217 sel->which); in histo_get_selection()
223 switch (sel->target) { in histo_get_selection()
229 sel->r.left = 0; in histo_get_selection()
230 sel->r.top = 0; in histo_get_selection()
231 sel->r.width = crop->width; in histo_get_selection()
232 sel->r.height = crop->height; in histo_get_selection()
239 sel->r.left = 0; in histo_get_selection()
240 sel->r.top = 0; in histo_get_selection()
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Dvsp1_brx.c186 struct v4l2_subdev_selection *sel) in brx_get_selection() argument
191 if (sel->pad == brx->entity.source_pad) in brx_get_selection()
194 switch (sel->target) { in brx_get_selection()
196 sel->r.left = 0; in brx_get_selection()
197 sel->r.top = 0; in brx_get_selection()
198 sel->r.width = BRX_MAX_SIZE; in brx_get_selection()
199 sel->r.height = BRX_MAX_SIZE; in brx_get_selection()
204 sel->which); in brx_get_selection()
209 sel->r = *brx_get_compose(brx, config, sel->pad); in brx_get_selection()
220 struct v4l2_subdev_selection *sel) in brx_set_selection() argument
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/drivers/power/supply/
Dmt6360_charger.c267 u32 sel, value; in mt6360_charger_get_ichg() local
269 ret = regmap_read(mci->regmap, MT6360_PMU_CHG_CTRL7, &sel); in mt6360_charger_get_ichg()
272 sel = (sel & MT6360_ICHG_MASK) >> MT6360_ICHG_SHFT; in mt6360_charger_get_ichg()
273 ret = linear_range_get_value(&mt6360_chg_range[MT6360_RANGE_ICHG], sel, &value); in mt6360_charger_get_ichg()
290 u32 sel, value; in mt6360_charger_get_cv() local
292 ret = regmap_read(mci->regmap, MT6360_PMU_CHG_CTRL4, &sel); in mt6360_charger_get_cv()
295 sel = (sel & MT6360_VOREG_MASK) >> MT6360_VOREG_SHFT; in mt6360_charger_get_cv()
296 ret = linear_range_get_value(&mt6360_chg_range[MT6360_RANGE_VOREG], sel, &value); in mt6360_charger_get_cv()
313 u32 sel, value; in mt6360_charger_get_aicr() local
315 ret = regmap_read(mci->regmap, MT6360_PMU_CHG_CTRL3, &sel); in mt6360_charger_get_aicr()
[all …]
/drivers/regulator/
Danatop-regulator.c31 int sel; member
63 int sel; in anatop_regmap_enable() local
65 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; in anatop_regmap_enable()
66 return regulator_set_voltage_sel_regmap(reg, sel); in anatop_regmap_enable()
86 anatop_reg->sel = selector; in anatop_regmap_core_set_voltage_sel()
92 anatop_reg->sel = selector; in anatop_regmap_core_set_voltage_sel()
101 return anatop_reg->sel; in anatop_regmap_core_get_voltage_sel()
109 int sel; in anatop_regmap_get_bypass() local
111 sel = regulator_get_voltage_sel_regmap(reg); in anatop_regmap_get_bypass()
112 if (sel == LDO_FET_FULL_ON) in anatop_regmap_get_bypass()
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Dhelpers.c174 unsigned int sel) in regulator_set_voltage_sel_pickable_regmap() argument
186 if (sel < voltages_in_range) in regulator_set_voltage_sel_pickable_regmap()
188 sel -= voltages_in_range; in regulator_set_voltage_sel_pickable_regmap()
194 sel <<= ffs(rdev->desc->vsel_mask) - 1; in regulator_set_voltage_sel_pickable_regmap()
195 sel += rdev->desc->linear_ranges[i].min_sel; in regulator_set_voltage_sel_pickable_regmap()
203 rdev->desc->vsel_mask, sel | range); in regulator_set_voltage_sel_pickable_regmap()
212 rdev->desc->vsel_mask, sel); in regulator_set_voltage_sel_pickable_regmap()
261 int regulator_set_voltage_sel_regmap(struct regulator_dev *rdev, unsigned sel) in regulator_set_voltage_sel_regmap() argument
265 sel <<= ffs(rdev->desc->vsel_mask) - 1; in regulator_set_voltage_sel_regmap()
268 rdev->desc->vsel_mask, sel); in regulator_set_voltage_sel_regmap()
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Dmax77693-regulator.c60 unsigned int reg, sel; in max77693_chg_get_current_limit() local
68 sel = reg & reg_data->linear_mask; in max77693_chg_get_current_limit()
71 if (sel <= reg_data->min_sel) in max77693_chg_get_current_limit()
72 sel = 0; in max77693_chg_get_current_limit()
74 sel -= reg_data->min_sel; in max77693_chg_get_current_limit()
76 val = chg_min_uA + reg_data->uA_step * sel; in max77693_chg_get_current_limit()
88 int sel = 0; in max77693_chg_set_current_limit() local
90 while (chg_min_uA + reg_data->uA_step * sel < min_uA) in max77693_chg_set_current_limit()
91 sel++; in max77693_chg_set_current_limit()
93 if (chg_min_uA + reg_data->uA_step * sel > max_uA) in max77693_chg_set_current_limit()
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/drivers/clk/bcm/
Dclk-kona-setup.c21 #define selector_clear_exists(sel) ((sel)->width = 0) argument
54 struct bcm_clk_sel *sel; in clk_requires_trigger() local
60 sel = &peri->sel; in clk_requires_trigger()
61 if (sel->parent_count && selector_exists(sel)) in clk_requires_trigger()
84 struct bcm_clk_sel *sel; in peri_clk_data_offsets_valid() local
148 sel = &peri->sel; in peri_clk_data_offsets_valid()
149 if (selector_exists(sel)) { in peri_clk_data_offsets_valid()
150 if (sel->offset > limit) { in peri_clk_data_offsets_valid()
152 __func__, name, sel->offset, limit); in peri_clk_data_offsets_valid()
291 static bool sel_valid(struct bcm_clk_sel *sel, const char *field_name, in sel_valid() argument
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Dclk-bcm281xx.c46 .sel = SELECTOR(0x0a10, 0, 2),
55 .sel = SELECTOR(0x0a04, 0, 2),
63 .sel = SELECTOR(0x0a00, 0, 2),
87 .sel = SELECTOR(0x0e74, 0, 2),
109 .sel = SELECTOR(0x0a28, 0, 3),
121 .sel = SELECTOR(0x0a2c, 0, 3),
133 .sel = SELECTOR(0x0a34, 0, 3),
145 .sel = SELECTOR(0x0a30, 0, 3),
156 .sel = SELECTOR(0x0a24, 0, 2),
166 .sel = SELECTOR(0x0a38, 0, 2),
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Dclk-kona.c821 static u8 parent_index(struct bcm_clk_sel *sel, u8 parent_sel) in parent_index() argument
825 BUG_ON(sel->parent_count > (u32)U8_MAX); in parent_index()
826 for (i = 0; i < sel->parent_count; i++) in parent_index()
827 if (sel->parent_sel[i] == parent_sel) in parent_index()
840 static u8 selector_read_index(struct ccu_data *ccu, struct bcm_clk_sel *sel) in selector_read_index() argument
848 if (!selector_exists(sel)) in selector_read_index()
853 reg_val = __ccu_read(ccu, sel->offset); in selector_read_index()
856 parent_sel = bitfield_extract(reg_val, sel->shift, sel->width); in selector_read_index()
859 index = parent_index(sel, parent_sel); in selector_read_index()
862 __func__, parent_sel, ccu->name, sel->offset); in selector_read_index()
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Dclk-bcm21664.c46 .sel = SELECTOR(0x0a10, 0, 2),
72 .sel = SELECTOR(0x0a28, 0, 3),
84 .sel = SELECTOR(0x0a2c, 0, 3),
96 .sel = SELECTOR(0x0a34, 0, 3),
108 .sel = SELECTOR(0x0a30, 0, 3),
167 .sel = SELECTOR(0x0a10, 0, 2),
177 .sel = SELECTOR(0x0a14, 0, 2),
187 .sel = SELECTOR(0x0a18, 0, 2),
199 .sel = SELECTOR(0x0a64, 0, 3),
210 .sel = SELECTOR(0x0a68, 0, 3),
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/drivers/firmware/
Ddmi-sysfs.c273 struct dmi_system_event_log sel; \
274 if (sizeof(sel) > dmi_entry_length(dh)) \
276 memcpy(&sel, dh, sizeof(sel)); \
277 return sprintf(buf, "%u\n", sel._field); \
279 static DMI_SYSFS_MAPPED_ATTR(sel, _field)
313 typedef u8 (*sel_io_reader)(const struct dmi_system_event_log *sel,
318 static u8 read_sel_8bit_indexed_io(const struct dmi_system_event_log *sel, in read_sel_8bit_indexed_io() argument
324 outb((u8)offset, sel->io.index_addr); in read_sel_8bit_indexed_io()
325 ret = inb(sel->io.data_addr); in read_sel_8bit_indexed_io()
330 static u8 read_sel_2x8bit_indexed_io(const struct dmi_system_event_log *sel, in read_sel_2x8bit_indexed_io() argument
[all …]
/drivers/clk/qcom/
Dclk-krait.c21 static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel) in __krait_mux_set_sel() argument
29 regval |= (sel & mux->mask) << mux->shift; in __krait_mux_set_sel()
32 regval |= (sel & mux->mask) << (mux->shift + LPL_SHIFT); in __krait_mux_set_sel()
50 u32 sel; in krait_mux_set_parent() local
52 sel = clk_mux_index_to_val(mux->parent_map, 0, index); in krait_mux_set_parent()
53 mux->en_mask = sel; in krait_mux_set_parent()
56 __krait_mux_set_sel(mux, sel); in krait_mux_set_parent()
66 u32 sel; in krait_mux_get_parent() local
68 sel = krait_get_l2_indirect_reg(mux->offset); in krait_mux_get_parent()
69 sel >>= mux->shift; in krait_mux_get_parent()
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/drivers/accessibility/speakup/
Dselection.c21 struct tiocl_selection sel; member
31 struct tiocl_selection sel; in __speakup_set_selection() local
33 sel = ssw->sel; in __speakup_set_selection()
51 set_selection_kernel(&sel, tty); in __speakup_set_selection()
81 speakup_sel_work.sel.xs = spk_xs + 1; in speakup_set_selection()
82 speakup_sel_work.sel.ys = spk_ys + 1; in speakup_set_selection()
83 speakup_sel_work.sel.xe = spk_xe + 1; in speakup_set_selection()
84 speakup_sel_work.sel.ye = spk_ye + 1; in speakup_set_selection()
85 speakup_sel_work.sel.sel_mode = TIOCL_SELCHAR; in speakup_set_selection()
/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_dio_link_encoder.c72 enum encoder_type_select sel, in dcn31_link_encoder_set_dio_phy_mux() argument
79 if (sel == ENCODER_TYPE_HDMI_FRL) in dcn31_link_encoder_set_dio_phy_mux()
82 else if (sel == ENCODER_TYPE_DP_128B132B) in dcn31_link_encoder_set_dio_phy_mux()
86 ENC_TYPE_SEL, sel); in dcn31_link_encoder_set_dio_phy_mux()
89 if (sel == ENCODER_TYPE_HDMI_FRL) in dcn31_link_encoder_set_dio_phy_mux()
92 else if (sel == ENCODER_TYPE_DP_128B132B) in dcn31_link_encoder_set_dio_phy_mux()
96 ENC_TYPE_SEL, sel); in dcn31_link_encoder_set_dio_phy_mux()
99 if (sel == ENCODER_TYPE_HDMI_FRL) in dcn31_link_encoder_set_dio_phy_mux()
102 else if (sel == ENCODER_TYPE_DP_128B132B) in dcn31_link_encoder_set_dio_phy_mux()
106 ENC_TYPE_SEL, sel); in dcn31_link_encoder_set_dio_phy_mux()
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/drivers/media/v4l2-core/
Dv4l2-subdev.c247 struct v4l2_subdev_selection *sel) in check_selection() argument
249 if (!sel) in check_selection()
252 return check_which(sel->which) ? : check_pad(sd, sel->pad) ? : in check_selection()
253 check_state_pads(sel->which, state); in check_selection()
258 struct v4l2_subdev_selection *sel) in call_get_selection() argument
260 return check_selection(sd, state, sel) ? : in call_get_selection()
261 sd->ops->pad->get_selection(sd, state, sel); in call_get_selection()
266 struct v4l2_subdev_selection *sel) in call_set_selection() argument
268 return check_selection(sd, state, sel) ? : in call_set_selection()
269 sd->ops->pad->set_selection(sd, state, sel); in call_set_selection()
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/drivers/media/tuners/
Dmt20xx.c108 unsigned int fref,lo1,lo1n,lo1a,s,sel,lo1freq, desired_lo1, in mt2032_compute_freq() local
121 if(s>1890) sel=0; in mt2032_compute_freq()
122 else if(s>1720) sel=1; in mt2032_compute_freq()
123 else if(s>1530) sel=2; in mt2032_compute_freq()
124 else if(s>1370) sel=3; in mt2032_compute_freq()
125 else sel=4; // >1090 in mt2032_compute_freq()
128 if(s>1790) sel=0; // <1958 in mt2032_compute_freq()
129 else if(s>1617) sel=1; in mt2032_compute_freq()
130 else if(s>1449) sel=2; in mt2032_compute_freq()
131 else if(s>1291) sel=3; in mt2032_compute_freq()
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/drivers/clk/imx/
Dclk-imx35.c34 unsigned char arm, ahb, sel; member
38 { .arm = 1, .ahb = 4, .sel = 0},
39 { .arm = 1, .ahb = 3, .sel = 1},
40 { .arm = 2, .ahb = 2, .sel = 0},
41 { .arm = 0, .ahb = 0, .sel = 0},
42 { .arm = 0, .ahb = 0, .sel = 0},
43 { .arm = 0, .ahb = 0, .sel = 0},
44 { .arm = 4, .ahb = 1, .sel = 0},
45 { .arm = 1, .ahb = 5, .sel = 0},
46 { .arm = 1, .ahb = 8, .sel = 0},
[all …]
Dclk-imx6q.c170 int parent, child, sel; in of_assigned_ldb_sels() local
204 sel = ldb_di_sel_by_clock_id(parent); in of_assigned_ldb_sels()
205 if (sel < 0) { in of_assigned_ldb_sels()
212 *ldb_di0_sel = sel; in of_assigned_ldb_sels()
214 *ldb_di1_sel = sel; in of_assigned_ldb_sels()
321 unsigned int sel[2][4]; in init_ldb_clks() local
325 sel[0][0] = (reg >> CS2CDR_LDB_DI0_CLK_SEL_SHIFT) & 7; in init_ldb_clks()
326 sel[1][0] = (reg >> CS2CDR_LDB_DI1_CLK_SEL_SHIFT) & 7; in init_ldb_clks()
328 sel[0][3] = sel[0][2] = sel[0][1] = sel[0][0]; in init_ldb_clks()
329 sel[1][3] = sel[1][2] = sel[1][1] = sel[1][0]; in init_ldb_clks()
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/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_tc_u32.c55 for (i = 0; i < cls->knode.sel->nkeys; i++) { in fill_match_fields()
56 off = cls->knode.sel->keys[i].off; in fill_match_fields()
57 val = cls->knode.sel->keys[i].val; in fill_match_fields()
58 mask = cls->knode.sel->keys[i].mask; in fill_match_fields()
62 if (!cls->knode.sel->keys[i].offmask) in fill_match_fields()
66 if (cls->knode.sel->keys[i].offmask) in fill_match_fields()
245 if (next[i].sel.offoff != cls->knode.sel->offoff || in cxgb4_config_knode()
246 next[i].sel.offshift != cls->knode.sel->offshift || in cxgb4_config_knode()
247 next[i].sel.offmask != cls->knode.sel->offmask || in cxgb4_config_knode()
248 next[i].sel.off != cls->knode.sel->off) in cxgb4_config_knode()
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/drivers/media/platform/qcom/camss/
Dcamss-vfe.c1059 struct v4l2_subdev_selection *sel);
1084 struct v4l2_subdev_selection sel = { 0 }; in vfe_set_format() local
1099 sel.which = fmt->which; in vfe_set_format()
1100 sel.pad = MSM_VFE_PAD_SINK; in vfe_set_format()
1101 sel.target = V4L2_SEL_TGT_COMPOSE; in vfe_set_format()
1102 sel.r.width = fmt->format.width; in vfe_set_format()
1103 sel.r.height = fmt->format.height; in vfe_set_format()
1104 ret = vfe_set_selection(sd, sd_state, &sel); in vfe_set_format()
1122 struct v4l2_subdev_selection *sel) in vfe_get_selection() argument
1132 if (sel->pad == MSM_VFE_PAD_SINK) in vfe_get_selection()
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/drivers/net/ethernet/netronome/nfp/abm/
Dcls.c35 if (knode->sel->flags != TC_U32_TERMINAL) { in nfp_abm_u32_check_knode()
40 if (knode->sel->off || knode->sel->offshift || knode->sel->offmask || in nfp_abm_u32_check_knode()
41 knode->sel->offoff || knode->fshift) { in nfp_abm_u32_check_knode()
45 if (knode->sel->hoff || knode->sel->hmask) { in nfp_abm_u32_check_knode()
62 if (knode->sel->nkeys != 1) { in nfp_abm_u32_check_knode()
79 k = &knode->sel->keys[0]; in nfp_abm_u32_check_knode()
185 val = be32_to_cpu(knode->sel->keys[0].val) >> tos_off & 0xff; in nfp_abm_u32_knode_replace()
186 mask = be32_to_cpu(knode->sel->keys[0].mask) >> tos_off & 0xff; in nfp_abm_u32_knode_replace()
/drivers/media/platform/omap3isp/
Dispresizer.c1227 struct v4l2_subdev_selection *sel) in resizer_get_selection() argument
1234 if (sel->pad != RESZ_PAD_SINK) in resizer_get_selection()
1238 sel->which); in resizer_get_selection()
1240 sel->which); in resizer_get_selection()
1242 switch (sel->target) { in resizer_get_selection()
1244 sel->r.left = 0; in resizer_get_selection()
1245 sel->r.top = 0; in resizer_get_selection()
1246 sel->r.width = INT_MAX; in resizer_get_selection()
1247 sel->r.height = INT_MAX; in resizer_get_selection()
1249 resizer_try_crop(format_sink, format_source, &sel->r); in resizer_get_selection()
[all …]
/drivers/media/i2c/ccs/
Dccs-core.c2311 struct v4l2_subdev_selection *sel, in ccs_set_compose_binner() argument
2320 crops[CCS_PAD_SINK]->width, sel->r.width, in ccs_set_compose_binner()
2321 crops[CCS_PAD_SINK]->height, sel->r.height, sel->flags); in ccs_set_compose_binner()
2328 sel->r.width, in ccs_set_compose_binner()
2331 sel->r.height, sel->flags); in ccs_set_compose_binner()
2339 if (sel->which == V4L2_SUBDEV_FORMAT_ACTIVE) { in ccs_set_compose_binner()
2344 sel->r.width = (crops[CCS_PAD_SINK]->width / binh) & ~1; in ccs_set_compose_binner()
2345 sel->r.height = (crops[CCS_PAD_SINK]->height / binv) & ~1; in ccs_set_compose_binner()
2359 struct v4l2_subdev_selection *sel, in ccs_set_compose_scaler() argument
2373 sel->r.width = min_t(unsigned int, sel->r.width, in ccs_set_compose_scaler()
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