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Searched refs:spll_func_cntl (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/radeon/
Drv730_dpm.c43 u32 spll_func_cntl = pi->clk_regs.rv730.cg_spll_func_cntl; in rv730_populate_sclk_value() local
73 spll_func_cntl |= SPLL_DIVEN; in rv730_populate_sclk_value()
75 spll_func_cntl &= ~SPLL_DIVEN; in rv730_populate_sclk_value()
76 spll_func_cntl &= ~(SPLL_HILEN_MASK | SPLL_LOLEN_MASK | SPLL_REF_DIV_MASK); in rv730_populate_sclk_value()
77 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv730_populate_sclk_value()
78 spll_func_cntl |= SPLL_HILEN((dividers.post_div >> 4) & 0xf); in rv730_populate_sclk_value()
79 spll_func_cntl |= SPLL_LOLEN(dividers.post_div & 0xf); in rv730_populate_sclk_value()
107 sclk->vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv730_populate_sclk_value()
235 u32 spll_func_cntl; in rv730_populate_smc_acpi_state() local
284 spll_func_cntl = pi->clk_regs.rv730.cg_spll_func_cntl; in rv730_populate_smc_acpi_state()
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Drv740_dpm.c124 u32 spll_func_cntl = pi->clk_regs.rv770.cg_spll_func_cntl; in rv740_populate_sclk_value() local
146 spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK); in rv740_populate_sclk_value()
147 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv740_populate_sclk_value()
148 spll_func_cntl |= SPLL_PDIV_A(dividers.post_div); in rv740_populate_sclk_value()
176 sclk->vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv740_populate_sclk_value()
325 u32 spll_func_cntl = pi->clk_regs.rv770.cg_spll_func_cntl; in rv740_populate_smc_acpi_state() local
371 spll_func_cntl |= SPLL_RESET | SPLL_SLEEP | SPLL_BYPASS_EN; in rv740_populate_smc_acpi_state()
385 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv740_populate_smc_acpi_state()
Drv770_dpm.c491 u32 spll_func_cntl = in rv770_populate_sclk_value() local
524 spll_func_cntl |= SPLL_DIVEN; in rv770_populate_sclk_value()
526 spll_func_cntl &= ~SPLL_DIVEN; in rv770_populate_sclk_value()
527 spll_func_cntl &= ~(SPLL_HILEN_MASK | SPLL_LOLEN_MASK | SPLL_REF_DIV_MASK); in rv770_populate_sclk_value()
528 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv770_populate_sclk_value()
529 spll_func_cntl |= SPLL_HILEN((dividers.post_div >> 4) & 0xf); in rv770_populate_sclk_value()
530 spll_func_cntl |= SPLL_LOLEN(dividers.post_div & 0xf); in rv770_populate_sclk_value()
558 sclk->vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv770_populate_sclk_value()
929 u32 spll_func_cntl = in rv770_populate_smc_acpi_state() local
978 spll_func_cntl |= SPLL_RESET | SPLL_SLEEP | SPLL_BYPASS_EN; in rv770_populate_smc_acpi_state()
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Dni_dpm.c1800 u32 spll_func_cntl = ni_pi->clock_registers.cg_spll_func_cntl; in ni_populate_smc_acpi_state() local
1912 table->ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in ni_populate_smc_acpi_state()
2005 u32 spll_func_cntl = ni_pi->clock_registers.cg_spll_func_cntl; in ni_calculate_sclk_params() local
2029 spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK); in ni_calculate_sclk_params()
2030 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in ni_calculate_sclk_params()
2031 spll_func_cntl |= SPLL_PDIV_A(dividers.post_div); in ni_calculate_sclk_params()
2059 sclk->vCG_SPLL_FUNC_CNTL = spll_func_cntl; in ni_calculate_sclk_params()
Dcypress_dpm.c1346 u32 spll_func_cntl = in cypress_populate_smc_acpi_state() local
1431 spll_func_cntl |= SPLL_RESET | SPLL_SLEEP | SPLL_BYPASS_EN; in cypress_populate_smc_acpi_state()
1451 cpu_to_be32(spll_func_cntl); in cypress_populate_smc_acpi_state()
Dsi_dpm.c4474 u32 spll_func_cntl = si_pi->clock_registers.cg_spll_func_cntl; in si_populate_smc_acpi_state() local
4578 cpu_to_be32(spll_func_cntl); in si_populate_smc_acpi_state()
4770 u32 spll_func_cntl = si_pi->clock_registers.cg_spll_func_cntl; in si_calculate_sclk_params() local
4793 spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK); in si_calculate_sclk_params()
4794 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in si_calculate_sclk_params()
4795 spll_func_cntl |= SPLL_PDIV_A(dividers.post_div); in si_calculate_sclk_params()
4823 sclk->vCG_SPLL_FUNC_CNTL = spll_func_cntl; in si_calculate_sclk_params()
Dci_dpm.c2959 u32 spll_func_cntl = pi->clock_registers.cg_spll_func_cntl; in ci_populate_smc_acpi_level() local
2986 spll_func_cntl &= ~SPLL_PWRON; in ci_populate_smc_acpi_level()
2987 spll_func_cntl |= SPLL_RESET; in ci_populate_smc_acpi_level()
2992 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in ci_populate_smc_acpi_level()
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Diceland_smumgr.c800 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in iceland_calculate_sclk_params() local
825 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, in iceland_calculate_sclk_params()
827 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, in iceland_calculate_sclk_params()
1431 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in iceland_populate_smc_acpi_level() local
1461 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, in iceland_populate_smc_acpi_level()
1463 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, in iceland_populate_smc_acpi_level()
1468 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in iceland_populate_smc_acpi_level()
Dfiji_smumgr.c860 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in fiji_calculate_sclk_params() local
885 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, CG_SPLL_FUNC_CNTL, in fiji_calculate_sclk_params()
887 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, CG_SPLL_FUNC_CNTL, in fiji_calculate_sclk_params()
1307 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in fiji_populate_smc_acpi_level() local
1343 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, CG_SPLL_FUNC_CNTL, in fiji_populate_smc_acpi_level()
1345 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, CG_SPLL_FUNC_CNTL, in fiji_populate_smc_acpi_level()
1350 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in fiji_populate_smc_acpi_level()
Dci_smumgr.c301 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in ci_calculate_sclk_params() local
326 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, CG_SPLL_FUNC_CNTL, in ci_calculate_sclk_params()
328 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, CG_SPLL_FUNC_CNTL, in ci_calculate_sclk_params()
1384 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in ci_populate_smc_acpi_level() local
1414 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, in ci_populate_smc_acpi_level()
1416 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, in ci_populate_smc_acpi_level()
1421 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in ci_populate_smc_acpi_level()
Dtonga_smumgr.c543 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in tonga_calculate_sclk_params() local
568 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, in tonga_calculate_sclk_params()
570 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, in tonga_calculate_sclk_params()
1183 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in tonga_populate_smc_acpi_level() local
1210 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, CG_SPLL_FUNC_CNTL, in tonga_populate_smc_acpi_level()
1212 spll_func_cntl = PHM_SET_FIELD(spll_func_cntl, CG_SPLL_FUNC_CNTL, in tonga_populate_smc_acpi_level()
1217 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in tonga_populate_smc_acpi_level()
/drivers/gpu/drm/amd/pm/powerplay/
Dsi_dpm.c4936 u32 spll_func_cntl = si_pi->clock_registers.cg_spll_func_cntl; in si_populate_smc_acpi_state() local
5041 cpu_to_be32(spll_func_cntl); in si_populate_smc_acpi_state()
5232 u32 spll_func_cntl = si_pi->clock_registers.cg_spll_func_cntl; in si_calculate_sclk_params() local
5255 spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK); in si_calculate_sclk_params()
5256 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in si_calculate_sclk_params()
5257 spll_func_cntl |= SPLL_PDIV_A(dividers.post_div); in si_calculate_sclk_params()
5285 sclk->vCG_SPLL_FUNC_CNTL = spll_func_cntl; in si_calculate_sclk_params()