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Searched refs:start_offset (Results 1 – 25 of 41) sorted by relevance

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/drivers/infiniband/hw/mlx5/
Ddm.c176 u64 start_offset; in copy_op_to_user() local
181 start_offset = op_entry->op_addr & ~PAGE_MASK; in copy_op_to_user()
189 &start_offset, sizeof(start_offset)); in copy_op_to_user()
280 u64 start_offset; in handle_alloc_dm_memic() local
323 start_offset = dm->base.dev_addr & ~PAGE_MASK; in handle_alloc_dm_memic()
326 &start_offset, sizeof(start_offset)); in handle_alloc_dm_memic()
490 u64 start_offset; in UVERBS_HANDLER() local
504 start_offset = memic->base.dev_addr & ~PAGE_MASK; in UVERBS_HANDLER()
506 &start_offset, sizeof(start_offset)); in UVERBS_HANDLER()
/drivers/infiniband/hw/hfi1/
Deprom.c64 u32 start_offset; in read_length() local
82 start_offset = start & EP_PAGE_MASK; in read_length()
83 if (start_offset) { in read_length()
91 bytes = EP_PAGE_SIZE - start_offset; in read_length()
95 memcpy(dest, (u8 *)buffer + start_offset, len); in read_length()
99 memcpy(dest, (u8 *)buffer + start_offset, bytes); in read_length()
/drivers/slimbus/
Dmessaging.c183 (msg->start_offset + msg->num_bytes) > 0xC00) in slim_val_inf_sanity()
207 msg->start_offset, mc); in slim_val_inf_sanity()
252 msg->start_offset, msg->num_bytes, mc, sl); in slim_xfer_msg()
254 txn->ec = ((sl | (1 << 3)) | ((msg->start_offset & 0xFFF) << 4)); in slim_xfer_msg()
277 msg->start_offset = addr; in slim_fill_msg()
/drivers/gpu/drm/vboxvideo/
Dmodesetting.c30 s32 origin_x, s32 origin_y, u32 start_offset, in hgsmi_process_display_info() argument
44 p->start_offset = start_offset; in hgsmi_process_display_info()
Dvboxvideo_guest.h53 s32 origin_x, s32 origin_y, u32 start_offset,
Dvboxvideo.h274 u32 start_offset; member
/drivers/char/agp/
Di460-agp.c403 int i, start_offset, end_offset, idx, pg, num_entries; in i460_insert_memory_large_io_page() local
416 start_offset = pg_start % I460_KPAGES_PER_IOPAGE; in i460_insert_memory_large_io_page()
429 for (idx = ((lp == start) ? start_offset : 0); in i460_insert_memory_large_io_page()
449 for (idx = ((lp == start) ? start_offset : 0); in i460_insert_memory_large_io_page()
464 int i, pg, start_offset, end_offset, idx, num_entries; in i460_remove_memory_large_io_page() local
474 start_offset = pg_start % I460_KPAGES_PER_IOPAGE; in i460_remove_memory_large_io_page()
478 for (idx = ((lp == start) ? start_offset : 0); in i460_remove_memory_large_io_page()
/drivers/misc/ocxl/
Dcore.c85 int start_offset, size; in reclaim_afu_actag() local
87 start_offset = afu->actag_base - fn->actag_base; in reclaim_afu_actag()
89 ocxl_actag_afu_free(afu->fn, start_offset, size); in reclaim_afu_actag()
124 int start_offset, size; in reclaim_afu_pasid() local
126 start_offset = afu->pasid_base - fn->pasid_base; in reclaim_afu_pasid()
128 ocxl_pasid_afu_free(afu->fn, start_offset, size); in reclaim_afu_pasid()
/drivers/thunderbolt/
Dproperty.c349 u32 *block, unsigned int start_offset, size_t block_len) in __tb_property_format_dir() argument
403 data_offset = start_offset + dir_len; in __tb_property_format_dir()
404 dir_end = start_offset + data_len + dir_len; in __tb_property_format_dir()
415 pe = (struct tb_property_dir_entry *)&block[start_offset]; in __tb_property_format_dir()
421 re = (struct tb_property_rootdir_entry *)&block[start_offset]; in __tb_property_format_dir()
/drivers/net/ethernet/mellanox/mlx5/core/steering/
Dmlx5_ifc_dr_ste_v1.h40 u8 start_offset[0x7]; member
86 u8 start_offset[0x7]; member
96 u8 start_offset[0x7]; member
Ddr_ste_v1.c396 MLX5_SET(ste_double_action_insert_with_ptr_v1, d_action, start_offset, offset / 2); in dr_ste_v1_set_insert_hdr()
415 MLX5_SET(ste_single_action_remove_header_size_v1, s_action, start_offset, offset / 2); in dr_ste_v1_set_remove_hdr()
427 start_offset, HDR_LEN_L2_MACS >> 1); in dr_ste_v1_set_push_vlan()
893 MLX5_SET(ste_double_action_insert_with_inline_v1, hw_action, start_offset, 0); in dr_ste_v1_set_action_decap_l3_list()
906 MLX5_SET(ste_single_action_remove_header_size_v1, hw_action, start_offset, 0); in dr_ste_v1_set_action_decap_l3_list()
/drivers/net/ethernet/mellanox/mlx5/core/diag/
Dfw_tracer.c292 MLX5_SET(mtrc_stdb, in, start_offset, offset); in mlx5_tracer_read_strings_db()
313 MLX5_SET(mtrc_stdb, in, start_offset, offset); in mlx5_tracer_read_strings_db()
669 u32 block_count, start_offset, prev_start_offset, prev_consumer_index; in mlx5_fw_tracer_handle_traces() local
683 start_offset = tracer->buff.consumer_index * TRACER_BLOCK_SIZE_BYTE; in mlx5_fw_tracer_handle_traces()
686 memcpy(tmp_trace_block, tracer->buff.log_buf + start_offset, in mlx5_fw_tracer_handle_traces()
732 start_offset = tracer->buff.consumer_index * TRACER_BLOCK_SIZE_BYTE; in mlx5_fw_tracer_handle_traces()
733 memcpy(tmp_trace_block, tracer->buff.log_buf + start_offset, in mlx5_fw_tracer_handle_traces()
/drivers/net/ethernet/chelsio/cxgb4/
Dcudbg_lib_common.h37 u32 start_offset; member
Dcxgb4_cudbg.c119 entity_hdr->start_offset = dbg_buff->offset; in cxgb4_cudbg_collect_entity()
124 dbg_buff->offset = entity_hdr->start_offset; in cxgb4_cudbg_collect_entity()
/drivers/gpu/drm/amd/display/dc/inc/hw/
Ddmcu.h76 unsigned int start_offset,
Dtiming_generator.h76 int start_offset; member
/drivers/gpu/drm/amd/display/dc/dce/
Ddce_dmcu.c84 unsigned int start_offset, in dce_dmcu_load_iram() argument
98 REG_WRITE(DMCU_IRAM_WR_CTRL, start_offset); in dce_dmcu_load_iram()
481 unsigned int start_offset, in dcn10_dmcu_load_iram() argument
499 REG_WRITE(DMCU_IRAM_WR_CTRL, start_offset); in dcn10_dmcu_load_iram()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd.c96 size_t *start_offset) in amdgpu_doorbell_get_kfd_info() argument
105 *start_offset = adev->doorbell.num_doorbells * sizeof(u32); in amdgpu_doorbell_get_kfd_info()
109 *start_offset = 0; in amdgpu_doorbell_get_kfd_info()
/drivers/scsi/mpi3mr/mpi/
Dmpi30_image.h27 __le32 start_offset; member
/drivers/scsi/qla4xxx/
Dql4_83xx.h218 uint8_t *start_offset; member
/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_83xx_init.c55 u16 start_offset; member
63 u16 start_offset;
1730 ahw->reset.start_offset = ahw->reset.buff + in qlcnic_83xx_get_reset_instruction_template()
1731 ahw->reset.hdr->start_offset; in qlcnic_83xx_get_reset_instruction_template()
2042 qlcnic_83xx_exec_template_cmd(p_dev, p_dev->ahw->reset.start_offset); in qlcnic_83xx_start_hw()
/drivers/media/usb/cpia2/
Dcpia2_core.c2405 unsigned long start_offset = vma->vm_pgoff << PAGE_SHIFT; in cpia2_remap_buffer() local
2409 DBG("mmap offset:%ld size:%ld\n", start_offset, size); in cpia2_remap_buffer()
2415 (start_offset % cam->frame_size) != 0 || in cpia2_remap_buffer()
2416 (start_offset+size > cam->frame_size*cam->num_frames)) in cpia2_remap_buffer()
2419 pos = ((unsigned long) (cam->frame_buffer)) + start_offset; in cpia2_remap_buffer()
/drivers/gpu/drm/i915/gvt/
Dcmd_parser.c1899 unsigned long start_offset = 0; in perform_bb_shadow() local
1928 start_offset = gma & ~I915_GTT_PAGE_MASK; in perform_bb_shadow()
1931 round_up(bb_size + start_offset, in perform_bb_shadow()
1946 bb->va + start_offset); in perform_bb_shadow()
1953 ret = audit_bb_end(s, bb->va + start_offset + bb_end_cmd_offset); in perform_bb_shadow()
1976 s->ip_va = bb->va + start_offset; in perform_bb_shadow()
/drivers/scsi/qla2xxx/
Dqla_nx2.h275 uint8_t *start_offset; member
/drivers/scsi/libfc/
Dfc_fcp.c485 size_t start_offset; in fc_fcp_recv_data() local
497 start_offset = offset; in fc_fcp_recv_data()
568 if (fsp->xfer_contig_end == start_offset) in fc_fcp_recv_data()

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