| /drivers/clocksource/ |
| D | timer-ti-dm.c | 56 static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) in omap_dm_timer_read_reg() argument
59 return __omap_dm_timer_read(timer, reg, timer->posted); in omap_dm_timer_read_reg()
72 static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, in omap_dm_timer_write_reg() argument
76 __omap_dm_timer_write(timer, reg, value, timer->posted); in omap_dm_timer_write_reg()
79 static void omap_timer_restore_context(struct omap_dm_timer *timer) in omap_timer_restore_context() argument
81 __omap_dm_timer_write(timer, OMAP_TIMER_OCP_CFG_OFFSET, in omap_timer_restore_context()
82 timer->context.ocp_cfg, 0); in omap_timer_restore_context()
84 omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, in omap_timer_restore_context()
85 timer->context.twer); in omap_timer_restore_context()
86 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, in omap_timer_restore_context()
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| D | timer-zevio.c | 64 struct zevio_timer *timer = container_of(dev, struct zevio_timer, in zevio_timer_set_event() local
67 writel(delta, timer->timer1 + IO_CURRENT_VAL); in zevio_timer_set_event()
69 timer->timer1 + IO_CONTROL); in zevio_timer_set_event()
76 struct zevio_timer *timer = container_of(dev, struct zevio_timer, in zevio_timer_shutdown() local
80 writel(0, timer->interrupt_regs + IO_INTR_MSK); in zevio_timer_shutdown()
81 writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK); in zevio_timer_shutdown()
83 writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL); in zevio_timer_shutdown()
89 struct zevio_timer *timer = container_of(dev, struct zevio_timer, in zevio_timer_set_oneshot() local
93 writel(TIMER_INTR_MSK, timer->interrupt_regs + IO_INTR_MSK); in zevio_timer_set_oneshot()
94 writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK); in zevio_timer_set_oneshot()
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| D | timer-microchip-pit64b.c | 70 struct mchp_pit64b_timer timer; member
84 struct mchp_pit64b_timer timer; member
117 static inline void mchp_pit64b_reset(struct mchp_pit64b_timer *timer, in mchp_pit64b_reset() argument
125 writel_relaxed(MCHP_PIT64B_CR_SWRST, timer->base + MCHP_PIT64B_CR); in mchp_pit64b_reset()
126 writel_relaxed(mode | timer->mode, timer->base + MCHP_PIT64B_MR); in mchp_pit64b_reset()
127 writel_relaxed(high, timer->base + MCHP_PIT64B_MSB_PR); in mchp_pit64b_reset()
128 writel_relaxed(low, timer->base + MCHP_PIT64B_LSB_PR); in mchp_pit64b_reset()
129 writel_relaxed(irqs, timer->base + MCHP_PIT64B_IER); in mchp_pit64b_reset()
130 writel_relaxed(MCHP_PIT64B_CR_START, timer->base + MCHP_PIT64B_CR); in mchp_pit64b_reset()
133 static void mchp_pit64b_suspend(struct mchp_pit64b_timer *timer) in mchp_pit64b_suspend() argument
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| D | Makefile | 2 obj-$(CONFIG_TIMER_OF) += timer-of.o
3 obj-$(CONFIG_TIMER_PROBE) += timer-probe.o
4 obj-$(CONFIG_ATMEL_PIT) += timer-atmel-pit.o
5 obj-$(CONFIG_ATMEL_ST) += timer-atmel-st.o
6 obj-$(CONFIG_ATMEL_TCB_CLKSRC) += timer-atmel-tcb.o
9 obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC) += timer-cs5535.o
18 obj-$(CONFIG_DAVINCI_TIMER) += timer-davinci.o
19 obj-$(CONFIG_DIGICOLOR_TIMER) += timer-digicolor.o
20 obj-$(CONFIG_OMAP_DM_TIMER) += timer-ti-dm.o
21 obj-$(CONFIG_OMAP_DM_TIMER) += timer-ti-dm-systimer.o
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| D | dw_apb_timer.c | 49 static inline u32 apbt_readl(struct dw_apb_timer *timer, unsigned long offs) in apbt_readl() argument
51 return readl(timer->base + offs); in apbt_readl()
54 static inline void apbt_writel(struct dw_apb_timer *timer, u32 val, in apbt_writel() argument
57 writel(val, timer->base + offs); in apbt_writel()
60 static inline u32 apbt_readl_relaxed(struct dw_apb_timer *timer, unsigned long offs) in apbt_readl_relaxed() argument
62 return readl_relaxed(timer->base + offs); in apbt_readl_relaxed()
65 static inline void apbt_writel_relaxed(struct dw_apb_timer *timer, u32 val, in apbt_writel_relaxed() argument
68 writel_relaxed(val, timer->base + offs); in apbt_writel_relaxed()
71 static void apbt_disable_int(struct dw_apb_timer *timer) in apbt_disable_int() argument
73 u32 ctrl = apbt_readl(timer, APBTMR_N_CONTROL); in apbt_disable_int()
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| D | timer-rockchip.c | 44 struct rk_timer timer; member
52 return &container_of(ce, struct rk_clkevt, ce)->timer; in rk_timer()
55 static inline void rk_timer_disable(struct rk_timer *timer) in rk_timer_disable() argument
57 writel_relaxed(TIMER_DISABLE, timer->ctrl); in rk_timer_disable()
60 static inline void rk_timer_enable(struct rk_timer *timer, u32 flags) in rk_timer_enable() argument
62 writel_relaxed(TIMER_ENABLE | flags, timer->ctrl); in rk_timer_enable()
66 struct rk_timer *timer) in rk_timer_update_counter() argument
68 writel_relaxed(cycles, timer->base + TIMER_LOAD_COUNT0); in rk_timer_update_counter()
69 writel_relaxed(0, timer->base + TIMER_LOAD_COUNT1); in rk_timer_update_counter()
72 static void rk_timer_interrupt_clear(struct rk_timer *timer) in rk_timer_interrupt_clear() argument
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| D | ingenic-timer.c | 68 to_ingenic_tcu(struct ingenic_tcu_timer *timer) in to_ingenic_tcu() argument
70 return container_of(timer, struct ingenic_tcu, timers[timer->cpu]); in to_ingenic_tcu()
81 struct ingenic_tcu_timer *timer = to_ingenic_tcu_timer(evt); in ingenic_tcu_cevt_set_state_shutdown() local
82 struct ingenic_tcu *tcu = to_ingenic_tcu(timer); in ingenic_tcu_cevt_set_state_shutdown()
84 regmap_write(tcu->map, TCU_REG_TECR, BIT(timer->channel)); in ingenic_tcu_cevt_set_state_shutdown()
92 struct ingenic_tcu_timer *timer = to_ingenic_tcu_timer(evt); in ingenic_tcu_cevt_set_next() local
93 struct ingenic_tcu *tcu = to_ingenic_tcu(timer); in ingenic_tcu_cevt_set_next()
98 regmap_write(tcu->map, TCU_REG_TDFRc(timer->channel), next); in ingenic_tcu_cevt_set_next()
99 regmap_write(tcu->map, TCU_REG_TCNTc(timer->channel), 0); in ingenic_tcu_cevt_set_next()
100 regmap_write(tcu->map, TCU_REG_TESR, BIT(timer->channel)); in ingenic_tcu_cevt_set_next()
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| D | bcm2835_timer.c | 46 struct bcm2835_timer *timer = container_of(evt_dev, in bcm2835_time_set_next_event() local
49 timer->compare); in bcm2835_time_set_next_event()
55 struct bcm2835_timer *timer = dev_id; in bcm2835_time_interrupt() local
57 if (readl_relaxed(timer->control) & timer->match_mask) { in bcm2835_time_interrupt()
58 writel_relaxed(timer->match_mask, timer->control); in bcm2835_time_interrupt()
60 event_handler = READ_ONCE(timer->evt.event_handler); in bcm2835_time_interrupt()
62 event_handler(&timer->evt); in bcm2835_time_interrupt()
74 struct bcm2835_timer *timer; in bcm2835_timer_init() local
101 timer = kzalloc(sizeof(*timer), GFP_KERNEL); in bcm2835_timer_init()
102 if (!timer) { in bcm2835_timer_init()
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| D | timer-sun5i.c | 52 struct sun5i_timer timer; member
60 struct sun5i_timer timer; member
75 u32 old = readl(ce->timer.base + TIMER_CNTVAL_LO_REG(1)); in sun5i_clkevt_sync()
77 while ((old - readl(ce->timer.base + TIMER_CNTVAL_LO_REG(1))) < TIMER_SYNC_TICKS) in sun5i_clkevt_sync()
81 static void sun5i_clkevt_time_stop(struct sun5i_timer_clkevt *ce, u8 timer) in sun5i_clkevt_time_stop() argument
83 u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_stop()
84 writel(val & ~TIMER_CTL_ENABLE, ce->timer.base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_stop()
89 static void sun5i_clkevt_time_setup(struct sun5i_timer_clkevt *ce, u8 timer, u32 delay) in sun5i_clkevt_time_setup() argument
91 writel(delay, ce->timer.base + TIMER_INTVAL_LO_REG(timer)); in sun5i_clkevt_time_setup()
94 static void sun5i_clkevt_time_start(struct sun5i_timer_clkevt *ce, u8 timer, bool periodic) in sun5i_clkevt_time_start() argument
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| D | Kconfig | 36 bool "BCM2835 timer driver" if COMPILE_TEST
39 Enables the support for the BCM2835 timer driver.
42 bool "BCM mobile timer driver" if COMPILE_TEST
45 Enables the support for the BCM Kona mobile timer driver.
48 bool "Texas Instruments DaVinci timer driver" if COMPILE_TEST
50 Enables the support for the TI DaVinci timer driver.
53 bool "Digicolor timer driver" if COMPILE_TEST
57 Enables the support for the digicolor timer driver.
60 bool "DW APB timer driver" if COMPILE_TEST
62 Enables the support for the dw_apb timer.
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| D | timer-cadence-ttc.c | 109 static void ttc_set_interval(struct ttc_timer *timer, in ttc_set_interval() argument
115 ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_set_interval()
117 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_set_interval()
119 writel_relaxed(cycles, timer->base_addr + TTC_INTR_VAL_OFFSET); in ttc_set_interval()
127 writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_set_interval()
141 struct ttc_timer *timer = &ttce->ttc; in ttc_clock_event_interrupt() local
144 readl_relaxed(timer->base_addr + TTC_ISR_OFFSET); in ttc_clock_event_interrupt()
158 struct ttc_timer *timer = &to_ttc_timer_clksrc(cs)->ttc; in __ttc_clocksource_read() local
160 return (u64)readl_relaxed(timer->base_addr + in __ttc_clocksource_read()
181 struct ttc_timer *timer = &ttce->ttc; in ttc_set_next_event() local
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| D | timer-cs5535.c | 59 static void disable_timer(struct cs5535_mfgpt_timer *timer) in disable_timer() argument
62 cs5535_mfgpt_write(timer, MFGPT_REG_SETUP, in disable_timer()
67 static void start_timer(struct cs5535_mfgpt_timer *timer, uint16_t delta) in start_timer() argument
69 cs5535_mfgpt_write(timer, MFGPT_REG_CMP2, delta); in start_timer()
70 cs5535_mfgpt_write(timer, MFGPT_REG_COUNTER, 0); in start_timer()
72 cs5535_mfgpt_write(timer, MFGPT_REG_SETUP, in start_timer()
137 struct cs5535_mfgpt_timer *timer; in cs5535_mfgpt_init() local
141 timer = cs5535_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING); in cs5535_mfgpt_init()
142 if (!timer) { in cs5535_mfgpt_init()
146 cs5535_event_clock = timer; in cs5535_mfgpt_init()
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| D | timer-mediatek.c | 139 static void mtk_gpt_clkevt_time_stop(struct timer_of *to, u8 timer) in mtk_gpt_clkevt_time_stop() argument
143 val = readl(timer_of_base(to) + GPT_CTRL_REG(timer)); in mtk_gpt_clkevt_time_stop()
145 GPT_CTRL_REG(timer)); in mtk_gpt_clkevt_time_stop()
149 unsigned long delay, u8 timer) in mtk_gpt_clkevt_time_setup() argument
151 writel(delay, timer_of_base(to) + GPT_CMP_REG(timer)); in mtk_gpt_clkevt_time_setup()
155 bool periodic, u8 timer) in mtk_gpt_clkevt_time_start() argument
160 writel(GPT_IRQ_ACK(timer), timer_of_base(to) + GPT_IRQ_ACK_REG); in mtk_gpt_clkevt_time_start()
162 val = readl(timer_of_base(to) + GPT_CTRL_REG(timer)); in mtk_gpt_clkevt_time_start()
173 timer_of_base(to) + GPT_CTRL_REG(timer)); in mtk_gpt_clkevt_time_start()
219 __init mtk_gpt_setup(struct timer_of *to, u8 timer, u8 option) in mtk_gpt_setup() argument
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| D | timer-keystone.c | 46 } timer; variable
50 return readl_relaxed(timer.base + rg); in keystone_timer_readl()
55 writel_relaxed(val, timer.base + rg); in keystone_timer_writel()
139 keystone_timer_config(timer.hz_period, TCR_ENAMODE_PERIODIC_MASK); in keystone_set_periodic()
145 struct clock_event_device *event_dev = &timer.event_dev; in keystone_timer_init()
156 timer.base = of_iomap(np, 0); in keystone_timer_init()
157 if (!timer.base) { in keystone_timer_init()
165 iounmap(timer.base); in keystone_timer_init()
192 timer.hz_period = DIV_ROUND_UP(rate, HZ); in keystone_timer_init()
221 iounmap(timer.base); in keystone_timer_init()
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| D | timer-sp804.c | 230 static void __init sp804_clkevt_init(struct sp804_timer *timer, void __iomem *base) in sp804_clkevt_init() argument
238 timer_base = base + timer->timer_base[i]; in sp804_clkevt_init()
241 clkevt->load = timer_base + timer->load; in sp804_clkevt_init()
242 clkevt->load_h = timer_base + timer->load_h; in sp804_clkevt_init()
243 clkevt->value = timer_base + timer->value; in sp804_clkevt_init()
244 clkevt->value_h = timer_base + timer->value_h; in sp804_clkevt_init()
245 clkevt->ctrl = timer_base + timer->ctrl; in sp804_clkevt_init()
246 clkevt->intclr = timer_base + timer->intclr; in sp804_clkevt_init()
247 clkevt->width = timer->width; in sp804_clkevt_init()
251 static int __init sp804_of_init(struct device_node *np, struct sp804_timer *timer) in sp804_of_init() argument
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| /drivers/rtc/ |
| D | rtc-brcmstb-waketimer.c | 44 static inline void brcmstb_waketmr_clear_alarm(struct brcmstb_waketmr *timer) in brcmstb_waketmr_clear_alarm() argument
46 writel_relaxed(1, timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_clear_alarm()
47 (void)readl_relaxed(timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_clear_alarm()
50 static void brcmstb_waketmr_set_alarm(struct brcmstb_waketmr *timer, in brcmstb_waketmr_set_alarm() argument
53 brcmstb_waketmr_clear_alarm(timer); in brcmstb_waketmr_set_alarm()
56 writel_relaxed(timer->rate, timer->base + BRCMSTB_WKTMR_PRESCALER); in brcmstb_waketmr_set_alarm()
58 writel_relaxed(secs + 1, timer->base + BRCMSTB_WKTMR_ALARM); in brcmstb_waketmr_set_alarm()
63 struct brcmstb_waketmr *timer = data; in brcmstb_waketmr_irq() local
65 pm_wakeup_event(timer->dev, 0); in brcmstb_waketmr_irq()
75 static void wktmr_read(struct brcmstb_waketmr *timer, in wktmr_read() argument
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| D | interface.c | 20 static int rtc_timer_enqueue(struct rtc_device *rtc, struct rtc_timer *timer);
21 static void rtc_timer_remove(struct rtc_device *rtc, struct rtc_timer *timer);
649 enum hrtimer_restart rtc_pie_update_irq(struct hrtimer *timer) in rtc_pie_update_irq() argument
655 rtc = container_of(timer, struct rtc_device, pie_timer); in rtc_pie_update_irq()
658 count = hrtimer_forward_now(timer, period); in rtc_pie_update_irq()
791 static int rtc_timer_enqueue(struct rtc_device *rtc, struct rtc_timer *timer) in rtc_timer_enqueue() argument
802 timer->enabled = 1; in rtc_timer_enqueue()
812 timerqueue_add(&rtc->timerqueue, &timer->node); in rtc_timer_enqueue()
813 trace_rtc_timer_enqueue(timer); in rtc_timer_enqueue()
814 if (!next || ktime_before(timer->node.expires, next->expires)) { in rtc_timer_enqueue()
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| /drivers/isdn/mISDN/ |
| D | timerdev.c | 68 struct mISDNtimer *timer, *next; in mISDN_close() local
75 timer = list_first_entry(list, struct mISDNtimer, list); in mISDN_close()
77 del_timer_sync(&timer->tl); in mISDN_close()
80 list_del(&timer->list); in mISDN_close()
81 kfree(timer); in mISDN_close()
85 list_for_each_entry_safe(timer, next, &dev->expired, list) { in mISDN_close()
86 kfree(timer); in mISDN_close()
97 struct mISDNtimer *timer; in mISDN_read() local
121 timer = list_first_entry(list, struct mISDNtimer, list); in mISDN_read()
122 list_del(&timer->list); in mISDN_read()
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| /drivers/misc/ |
| D | cs5535-mfgpt.c | 44 int cs5535_mfgpt_toggle_event(struct cs5535_mfgpt_timer *timer, int cmp, in cs5535_mfgpt_toggle_event() argument
50 if (!timer) { in cs5535_mfgpt_toggle_event()
67 mask = 1 << (timer->nr + 24); in cs5535_mfgpt_toggle_event()
72 mask = 1 << (timer->nr + shift); in cs5535_mfgpt_toggle_event()
77 mask = 1 << (timer->nr + shift); in cs5535_mfgpt_toggle_event()
96 int cs5535_mfgpt_set_irq(struct cs5535_mfgpt_timer *timer, int cmp, int *irq, in cs5535_mfgpt_set_irq() argument
102 if (!timer) { in cs5535_mfgpt_set_irq()
116 shift = ((cmp == MFGPT_CMP1 ? 0 : 4) + timer->nr % 4) * 4; in cs5535_mfgpt_set_irq()
134 if (cs5535_mfgpt_toggle_event(timer, cmp, MFGPT_EVENT_IRQ, enable)) in cs5535_mfgpt_set_irq()
148 struct cs5535_mfgpt_timer *timer = NULL; in cs5535_mfgpt_alloc_timer() local
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| /drivers/gpu/drm/msm/ |
| D | msm_atomic.c | 106 struct msm_pending_timer *timer = container_of(t, in msm_atomic_pending_timer() local
107 struct msm_pending_timer, timer); in msm_atomic_pending_timer()
109 kthread_queue_work(timer->worker, &timer->work); in msm_atomic_pending_timer()
116 struct msm_pending_timer *timer = container_of(work, in msm_atomic_pending_work() local
119 msm_atomic_async_commit(timer->kms, timer->crtc_idx); in msm_atomic_pending_work()
122 int msm_atomic_init_pending_timer(struct msm_pending_timer *timer, in msm_atomic_init_pending_timer() argument
125 timer->kms = kms; in msm_atomic_init_pending_timer()
126 timer->crtc_idx = crtc_idx; in msm_atomic_init_pending_timer()
127 hrtimer_init(&timer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); in msm_atomic_init_pending_timer()
128 timer->timer.function = msm_atomic_pending_timer; in msm_atomic_init_pending_timer()
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| /drivers/net/ethernet/mellanox/mlx5/core/lib/ |
| D | clock.c | 119 struct mlx5_timer *timer = container_of(cc, struct mlx5_timer, cycles); in read_internal_timer() local
120 struct mlx5_clock *clock = container_of(timer, struct mlx5_clock, timer); in read_internal_timer()
131 struct mlx5_timer *timer; in mlx5_update_clock_info_page() local
141 timer = &clock->timer; in mlx5_update_clock_info_page()
142 clock_info->cycles = timer->tc.cycle_last; in mlx5_update_clock_info_page()
143 clock_info->mult = timer->cycles.mult; in mlx5_update_clock_info_page()
144 clock_info->nsec = timer->tc.nsec; in mlx5_update_clock_info_page()
145 clock_info->frac = timer->tc.frac; in mlx5_update_clock_info_page()
184 struct mlx5_timer *timer; in mlx5_timestamp_overflow() local
188 timer = container_of(dwork, struct mlx5_timer, overflow_work); in mlx5_timestamp_overflow()
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| /drivers/net/fddi/skfp/ |
| D | smttimer.c | 31 void smt_timer_stop(struct s_smc *smc, struct smt_timer *timer) in smt_timer_stop() argument
39 timer->tm_active = FALSE ; in smt_timer_stop()
40 if (smc->t.st_queue == timer && !timer->tm_next) { in smt_timer_stop()
44 if (tm == timer) { in smt_timer_stop()
54 void smt_timer_start(struct s_smc *smc, struct smt_timer *timer, u_long time, in smt_timer_start() argument
64 smt_timer_stop(smc,timer) ; in smt_timer_start()
65 timer->tm_smc = smc ; in smt_timer_start()
66 timer->tm_token = token ; in smt_timer_start()
67 timer->tm_active = TRUE ; in smt_timer_start()
69 smc->t.st_queue = timer ; in smt_timer_start()
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| /drivers/char/ |
| D | hpet.c | 202 struct hpet_timer __iomem *timer; in hpet_timer_set_irq() local
210 timer = devp->hd_timer; in hpet_timer_set_irq()
213 v = readl(&timer->hpet_config); in hpet_timer_set_irq()
216 writel(v, &timer->hpet_config); in hpet_timer_set_irq()
220 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> in hpet_timer_set_irq()
248 v = readl(&timer->hpet_config); in hpet_timer_set_irq()
250 writel(v, &timer->hpet_config); in hpet_timer_set_irq()
418 struct hpet_timer __iomem *timer; in hpet_release() local
422 timer = devp->hd_timer; in hpet_release()
426 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), in hpet_release()
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| /drivers/staging/media/atomisp/pci/ |
| D | gp_timer_defs.h | 23 #define HIVE_GP_TIMER_ENABLE_REG_IDX(timer) (HIVE_GP_TIMER_OVERALL_ENABLE_REG_I… argument
24 #define HIVE_GP_TIMER_VALUE_REG_IDX(timer, timers) (HIVE_GP_TIMER_ENABLE_REG_IDX(time… argument
25 …fine HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer, timers) (HIVE_GP_TIMER_VALUE_REG_IDX(timers,… argument
26 … HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer, timers) (HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timers… argument
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| /drivers/net/wireguard/ |
| D | timers.c | 31 struct timer_list *timer, in mod_peer_timer() argument
37 mod_timer(timer, expires); in mod_peer_timer()
41 static void wg_expired_retransmit_handshake(struct timer_list *timer) in wg_expired_retransmit_handshake() argument
43 struct wg_peer *peer = from_timer(peer, timer, in wg_expired_retransmit_handshake()
79 static void wg_expired_send_keepalive(struct timer_list *timer) in wg_expired_send_keepalive() argument
81 struct wg_peer *peer = from_timer(peer, timer, timer_send_keepalive); in wg_expired_send_keepalive()
91 static void wg_expired_new_handshake(struct timer_list *timer) in wg_expired_new_handshake() argument
93 struct wg_peer *peer = from_timer(peer, timer, timer_new_handshake); in wg_expired_new_handshake()
105 static void wg_expired_zero_key_material(struct timer_list *timer) in wg_expired_zero_key_material() argument
107 struct wg_peer *peer = from_timer(peer, timer, timer_zero_key_material); in wg_expired_zero_key_material()
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