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Searched refs:val1 (Results 1 – 25 of 81) sorted by relevance

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/drivers/iio/common/hid-sensors/
Dhid-sensor-attributes.c93 static void split_micro_fraction(unsigned int no, int exp, int *val1, int *val2) in split_micro_fraction() argument
97 *val1 = no / divisor; in split_micro_fraction()
110 int *val1, int *val2) in convert_from_vtf_format() argument
120 *val1 = sign * value * int_pow(10, exp); in convert_from_vtf_format()
123 split_micro_fraction(value, -exp, val1, val2); in convert_from_vtf_format()
124 if (*val1) in convert_from_vtf_format()
125 *val1 = sign * (*val1); in convert_from_vtf_format()
131 static u32 convert_to_vtf_format(int size, int exp, int val1, int val2) in convert_to_vtf_format() argument
137 if (val1 < 0 || val2 < 0) in convert_to_vtf_format()
142 value = abs(val1) * int_pow(10, -exp); in convert_to_vtf_format()
[all …]
/drivers/power/supply/
Daxp20x_battery.c189 int ret = 0, reg, val1; in axp20x_battery_get_prop() local
214 &val1); in axp20x_battery_get_prop()
218 if (val1) { in axp20x_battery_get_prop()
223 ret = regmap_read(axp20x_batt->regmap, AXP20X_FG_RES, &val1); in axp20x_battery_get_prop()
231 if ((val1 & AXP209_FG_PERCENT) == 100) in axp20x_battery_get_prop()
239 &val1); in axp20x_battery_get_prop()
243 if (val1 & AXP20X_PWR_OP_BATT_ACTIVATED) { in axp20x_battery_get_prop()
271 ret = iio_read_channel_processed(axp20x_batt->batt_dischrg_i, &val1); in axp20x_battery_get_prop()
272 val->intval = -val1; in axp20x_battery_get_prop()
443 int val1 = (min_voltage - 2600000) / 100000; in axp20x_set_voltage_min_design() local
[all …]
/drivers/iio/pressure/
Dicp10100.c282 int64_t val1, val2; in icp10100_get_pressure() local
294 val1 = (int64_t)st->cal[0] * (int64_t)t_square; in icp10100_get_pressure()
295 p_lut[0] = lut_lower + (int32_t)div_s64(val1, inv_quadr_factor); in icp10100_get_pressure()
296 val1 = (int64_t)st->cal[1] * (int64_t)t_square; in icp10100_get_pressure()
298 (int32_t)div_s64(val1, inv_quadr_factor); in icp10100_get_pressure()
299 val1 = (int64_t)st->cal[2] * (int64_t)t_square; in icp10100_get_pressure()
300 p_lut[2] = lut_upper + (int32_t)div_s64(val1, inv_quadr_factor); in icp10100_get_pressure()
305 val1 = (int64_t)p_lut[0] * (int64_t)p_lut[1] * in icp10100_get_pressure()
314 c = div64_s64(val1, val2); in icp10100_get_pressure()
316 val1, val2, c); in icp10100_get_pressure()
[all …]
/drivers/iio/adc/
Dmcp3422.c161 struct iio_chan_spec const *channel, int *val1, in mcp3422_read_raw() argument
172 err = mcp3422_read_channel(adc, channel, val1); in mcp3422_read_raw()
179 *val1 = 0; in mcp3422_read_raw()
184 *val1 = mcp3422_sample_rates[MCP3422_SAMPLE_RATE(adc->config)]; in mcp3422_read_raw()
195 struct iio_chan_spec const *channel, int val1, in mcp3422_write_raw() argument
207 if (val1 != 0) in mcp3422_write_raw()
225 switch (val1) { in mcp3422_write_raw()
/drivers/scsi/fnic/
Dfnic_trace.c220 struct timespec64 val1, val2; in fnic_get_stats_data() local
222 ktime_get_real_ts64(&val1); in fnic_get_stats_data()
234 (s64)val1.tv_sec, val1.tv_nsec, in fnic_get_stats_data()
239 (s64)timespec64_sub(val1, stats->stats_timestamps.last_reset_time).tv_sec, in fnic_get_stats_data()
240 timespec64_sub(val1, stats->stats_timestamps.last_reset_time).tv_nsec, in fnic_get_stats_data()
241 (s64)timespec64_sub(val1, stats->stats_timestamps.last_read_time).tv_sec, in fnic_get_stats_data()
242 timespec64_sub(val1, stats->stats_timestamps.last_read_time).tv_nsec); in fnic_get_stats_data()
244 stats->stats_timestamps.last_read_time = val1; in fnic_get_stats_data()
406 jiffies_to_timespec64(stats->misc_stats.last_isr_time, &val1); in fnic_get_stats_data()
431 (s64)val1.tv_sec, val1.tv_nsec, in fnic_get_stats_data()
/drivers/hwtracing/coresight/
Dcoresight-etm4x-sysfs.c949 unsigned long val1, val2; in addr_range_show() local
967 val1 = (unsigned long)config->addr_val[idx]; in addr_range_show()
970 return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2); in addr_range_show()
978 unsigned long val1, val2; in addr_range_store() local
983 elements = sscanf(buf, "%lx %lx %x", &val1, &val2, &exclude); in addr_range_store()
989 if (val1 > val2) in addr_range_store()
1007 config->addr_val[idx] = (u64)val1; in addr_range_store()
1950 unsigned long val1, val2; in ctxid_masks_show() local
1962 val1 = config->ctxid_mask0; in ctxid_masks_show()
1965 return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2); in ctxid_masks_show()
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/drivers/gpu/drm/i915/
Dintel_sideband.c397 u32 mbox, u32 *val, u32 *val1, in __sandybridge_pcode_rw() argument
416 intel_uncore_write_fw(uncore, GEN6_PCODE_DATA1, val1 ? *val1 : 0); in __sandybridge_pcode_rw()
430 if (is_read && val1) in __sandybridge_pcode_rw()
431 *val1 = intel_uncore_read_fw(uncore, GEN6_PCODE_DATA1); in __sandybridge_pcode_rw()
440 u32 *val, u32 *val1) in sandybridge_pcode_read() argument
445 err = __sandybridge_pcode_rw(i915, mbox, val, val1, in sandybridge_pcode_read()
/drivers/platform/x86/
Damilo-rfkill.c56 u8 val1 = blocked ? M7440_RADIO_OFF1 : M7440_RADIO_ON1; in amilo_m7440_rfkill_set_block() local
59 outb(val1, M7440_PORT1); in amilo_m7440_rfkill_set_block()
63 if (inb(M7440_PORT1) != val1 || inb(M7440_PORT2) != val2) in amilo_m7440_rfkill_set_block()
/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_timing_generator.c51 #define CRTC_REG_UPDATE_2(reg, field1, val1, field2, val2) \ argument
52 CRTC_REG_UPDATE_N(reg, 2, FD(reg##__##field1), val1, FD(reg##__##field2), val2)
54 #define CRTC_REG_UPDATE_3(reg, field1, val1, field2, val2, field3, val3) \ argument
55 …CRTC_REG_UPDATE_N(reg, 3, FD(reg##__##field1), val1, FD(reg##__##field2), val2, FD(reg##__##field3…
57 #define CRTC_REG_UPDATE_4(reg, field1, val1, field2, val2, field3, val3, field4, val4) \ argument
58 …CRTC_REG_UPDATE_N(reg, 3, FD(reg##__##field1), val1, FD(reg##__##field2), val2, FD(reg##__##field3…
60 #define CRTC_REG_UPDATE_5(reg, field1, val1, field2, val2, field3, val3, field4, val4, field5, val5… argument
61 …CRTC_REG_UPDATE_N(reg, 3, FD(reg##__##field1), val1, FD(reg##__##field2), val2, FD(reg##__##field3…
66 #define CRTC_REG_SET_2(reg, field1, val1, field2, val2) \ argument
67 CRTC_REG_SET_N(reg, 2, FD(reg##__##field1), val1, FD(reg##__##field2), val2)
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/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_self_test.c28 u32 val1; /* value read from first register */ member
54 return (args->val1 == args->imm1); in peq()
59 return (args->val1 != args->imm1); in pneq()
64 return ((args->val1 & args->imm1) != args->imm2); in pand_neq()
69 return (((args->val1 & args->imm1) != args->imm2) && in pand_neq_x2()
70 ((args->val1 & args->imm3) != args->imm4)); in pand_neq_x2()
75 return ((args->val1 != args->imm1) && (idle_chk_errors > args->imm2)); in pneq_err()
80 return (args->val1 > args->imm1); in pgt()
85 return (args->val1 != args->val2); in pneq_r2()
90 return (args->val1 < (args->val2 - args->imm1)); in plt_sub_r2()
[all …]
/drivers/extcon/
Dextcon-fsa9480.c222 int val1, val2; in fsa9480_detect_dev() local
225 val1 = fsa9480_read_reg(usbsw, FSA9480_REG_DEV_T1); in fsa9480_detect_dev()
227 if (val1 < 0 || val2 < 0) { in fsa9480_detect_dev()
231 val = val2 << 8 | val1; in fsa9480_detect_dev()
233 dev_info(usbsw->dev, "dev1: 0x%x, dev2: 0x%x\n", val1, val2); in fsa9480_detect_dev()
/drivers/spi/
Dspi-uniphier.c131 u32 val1, val2; in uniphier_spi_set_mode() local
148 val1 = SSI_CKS_CKPHS | SSI_CKS_CKDLY; in uniphier_spi_set_mode()
153 val1 = 0; in uniphier_spi_set_mode()
158 val1 = SSI_CKS_CKINIT | SSI_CKS_CKDLY; in uniphier_spi_set_mode()
163 val1 = SSI_CKS_CKPHS | SSI_CKS_CKINIT; in uniphier_spi_set_mode()
171 writel(val1, priv->base + SSI_CKS); in uniphier_spi_set_mode()
174 val1 = 0; in uniphier_spi_set_mode()
176 val1 |= FIELD_PREP(SSI_TXWDS_TDTF_MASK, 1); in uniphier_spi_set_mode()
177 writel(val1, priv->base + SSI_TXWDS); in uniphier_spi_set_mode()
178 writel(val1, priv->base + SSI_RXWDS); in uniphier_spi_set_mode()
/drivers/input/joystick/
Dwalkera0701.c65 int val1, val2, val3, val4, val5, val6, val7, val8; in walkera0701_parse_frame() local
85 val1 = ((w->buf[0] & 7) * 256 + w->buf[1] * 16 + w->buf[2]) >> 2; in walkera0701_parse_frame()
86 val1 *= ((w->buf[0] >> 2) & 2) - 1; /* sign */ in walkera0701_parse_frame()
105 val1, val2, val3, val4, val5, val6, val7, val8, in walkera0701_parse_frame()
109 input_report_abs(w->input_dev, ABS_Y, val1); in walkera0701_parse_frame()
/drivers/media/usb/dvb-usb-v2/
Dmxl111sf-demod.c377 u8 val1, val2, val3; in mxl111sf_demod_read_ber() local
382 ret = mxl111sf_demod_read_reg(state, V6_RS_AVG_ERRORS_LSB_REG, &val1); in mxl111sf_demod_read_ber()
392 *ber = CALCULATE_BER((val1 | (val2 << 8)), val3); in mxl111sf_demod_read_ber()
400 u8 val1, val2; in mxl111sf_demod_calc_snr() local
405 ret = mxl111sf_demod_read_reg(state, V6_SNR_RB_LSB_REG, &val1); in mxl111sf_demod_calc_snr()
412 *snr = CALCULATE_SNR(val1 | ((val2 & 0x03) << 8)); in mxl111sf_demod_calc_snr()
/drivers/iio/light/
Dlm3533-als.c490 u8 val1; member
511 ret = lm3533_als_get_hysteresis(indio_dev, als_attr->val1, in show_als_attr()
515 ret = lm3533_als_get_target(indio_dev, als_attr->val1, in show_als_attr()
519 ret = lm3533_als_get_threshold(indio_dev, als_attr->val1, in show_als_attr()
523 ret = lm3533_als_get_threshold(indio_dev, als_attr->val1, in show_als_attr()
550 ret = lm3533_als_set_target(indio_dev, als_attr->val1, in store_als_attr()
554 ret = lm3533_als_set_threshold(indio_dev, als_attr->val1, in store_als_attr()
558 ret = lm3533_als_set_threshold(indio_dev, als_attr->val1, in store_als_attr()
574 .val1 = _val1, \
/drivers/hwmon/
Dw83792d.c238 #define TEMP_ADD_FROM_REG(val1, val2) \ argument
239 ((((val1) & 0x80 ? (val1)-0x100 \
240 : (val1)) * 1000) + ((val2 & 0x80) ? 500 : 0))
1313 int val1, val2; in w83792d_detect() local
1322 val1 = w83792d_read_value(client, W83792D_REG_BANK); in w83792d_detect()
1325 if (!(val1 & 0x07)) { /* is Bank0 */ in w83792d_detect()
1326 if ((!(val1 & 0x80) && val2 != 0xa3) || in w83792d_detect()
1327 ((val1 & 0x80) && val2 != 0x5c)) in w83792d_detect()
1344 val1 = w83792d_read_value(client, W83792D_REG_WCHIPID); in w83792d_detect()
1346 if (val1 != 0x7a || val2 != 0x5c) in w83792d_detect()
[all …]
Dw83781d.c848 int i, val1 = 0, id; in w83781d_detect_subclients() local
875 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR); in w83781d_detect_subclients()
876 sc_addr[0] = 0x48 + (val1 & 0x07); in w83781d_detect_subclients()
885 sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07); in w83781d_detect_subclients()
1086 int val1, val2; in w83781d_detect() local
1110 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK); in w83781d_detect()
1113 if (!(val1 & 0x07) && in w83781d_detect()
1114 ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) || in w83781d_detect()
1115 ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) { in w83781d_detect()
1124 if ((!(val1 & 0x80) && val2 == 0xa3) || in w83781d_detect()
[all …]
Dw83791d.c1301 int val1, val2; in w83791d_detect() local
1310 val1 = w83791d_read(client, W83791D_REG_BANK); in w83791d_detect()
1313 if (!(val1 & 0x07)) { in w83791d_detect()
1314 if ((!(val1 & 0x80) && val2 != 0xa3) || in w83791d_detect()
1315 ((val1 & 0x80) && val2 != 0x5c)) { in w83791d_detect()
1327 val1 = w83791d_read(client, W83791D_REG_BANK) & 0x78; in w83791d_detect()
1328 w83791d_write(client, W83791D_REG_BANK, val1 | 0x80); in w83791d_detect()
1331 val1 = w83791d_read(client, W83791D_REG_WCHIPID); in w83791d_detect()
1333 if (val1 != 0x71 || val2 != 0x5c) in w83791d_detect()
1349 int val1; in w83791d_probe() local
[all …]
/drivers/net/ethernet/intel/i40e/
Di40e_hmc.h100 u32 val1, val2, val3; \
101 val1 = (u32)(upper_32_bits(pa)); \
108 wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \
/drivers/soc/rockchip/
Dio-domain.c86 u32 val0, val1; in rk3568_iodomain_write() local
96 val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0); in rk3568_iodomain_write()
99 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL2, val1); in rk3568_iodomain_write()
111 val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0); in rk3568_iodomain_write()
114 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL1, val1); in rk3568_iodomain_write()
/drivers/media/tuners/
Dqt1010.c218 u8 i, val1, val2; in qt1010_init_meas1() local
238 val1 = val2; in qt1010_init_meas1()
244 __func__, reg, val1, val2); in qt1010_init_meas1()
245 } while (val1 != val2); in qt1010_init_meas1()
246 *retval = val1; in qt1010_init_meas1()
/drivers/misc/sgi-gru/
Dgrufault.c863 gru_dbg(grudev, "op %d, gseg 0x%lx, value1 0x%lx\n", req.op, req.gseg, req.val1); in gru_set_context_option()
876 req.val1 < -1 || req.val1 >= GRU_MAX_BLADES || in gru_set_context_option()
877 (req.val1 >= 0 && !gru_base[req.val1])) { in gru_set_context_option()
880 gts->ts_user_blade_id = req.val1; in gru_set_context_option()
895 gts->ts_cch_req_slice = req.val1 & 3; in gru_set_context_option()
/drivers/crypto/hisilicon/hpre/
Dhpre_main.c300 u32 val1, val2; in hpre_config_pasid() local
305 val1 = readl_relaxed(qm->io_base + HPRE_DATA_RUSER_CFG); in hpre_config_pasid()
308 val1 |= BIT(HPRE_PASID_EN_BIT); in hpre_config_pasid()
311 val1 &= ~BIT(HPRE_PASID_EN_BIT); in hpre_config_pasid()
314 writel_relaxed(val1, qm->io_base + HPRE_DATA_RUSER_CFG); in hpre_config_pasid()
563 u32 val1, val2; in hpre_master_ooo_ctrl() local
565 val1 = readl(qm->io_base + HPRE_AM_OOO_SHUTDOWN_ENB); in hpre_master_ooo_ctrl()
567 val1 |= HPRE_AM_OOO_SHUTDOWN_ENABLE; in hpre_master_ooo_ctrl()
570 val1 &= ~HPRE_AM_OOO_SHUTDOWN_ENABLE; in hpre_master_ooo_ctrl()
577 writel(val1, qm->io_base + HPRE_AM_OOO_SHUTDOWN_ENB); in hpre_master_ooo_ctrl()
/drivers/watchdog/
Di6300esb.c250 u8 val1; in esb_initdevice() local
268 pci_read_config_byte(edev->pdev, ESB_LOCK_REG, &val1); in esb_initdevice()
269 if (val1 & ESB_WDT_LOCK) in esb_initdevice()
/drivers/gpu/drm/msm/adreno/
Da6xx_gpu_state.h169 u32 val1; member
173 { .val0 = _base, .val1 = _type, .registers = _array, \
281 .val0 = _sel_reg, .val1 = _sel_val }

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