/drivers/gpu/drm/i915/display/ |
D | intel_crtc.c | 370 int vblank_start = mode->crtc_vblank_start; in intel_mode_vblank_start() local 373 vblank_start = DIV_ROUND_UP(vblank_start, 2); in intel_mode_vblank_start() 375 return vblank_start; in intel_mode_vblank_start() 396 int scanline, min, max, vblank_start; in intel_pipe_update_start() local 406 vblank_start = intel_vrr_vmax_vblank_start(new_crtc_state); in intel_pipe_update_start() 408 vblank_start = intel_mode_vblank_start(adjusted_mode); in intel_pipe_update_start() 411 min = vblank_start - intel_usecs_to_scanlines(adjusted_mode, in intel_pipe_update_start() 413 max = vblank_start - 1; in intel_pipe_update_start() 479 while (need_vlv_dsi_wa && scanline == vblank_start) in intel_pipe_update_start()
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D | intel_crt.c | 688 u32 vblank, vblank_start, vblank_end; in intel_crt_load_detect() local 711 vblank_start = (vblank & 0xfff) + 1; in intel_crt_load_detect() 740 if (vblank_start <= vactive && vblank_end >= vtotal) { in intel_crt_load_detect() 744 vblank_start = vsync_start; in intel_crt_load_detect() 747 (vblank_start - 1) | in intel_crt_load_detect() 752 if (vblank_start - vactive >= vtotal - vblank_end) in intel_crt_load_detect() 753 vsample = (vblank_start + vactive) >> 1; in intel_crt_load_detect()
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/drivers/media/platform/xilinx/ |
D | xilinx-vtc.h | 26 unsigned int vblank_start; member
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D | xilinx-vtc.c | 204 (config->vblank_start << XVTC_ACTIVE_VSIZE_SHIFT) | in xvtc_generator_start()
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D | xilinx-tpg.c | 191 .vblank_start = height, in xtpg_s_stream()
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/drivers/video/fbdev/ |
D | gbefb.c | 518 timing->vblank_start = var->yres; in compute_gbe_timing() 560 SET_GBE_FIELD(VT_VBLANK, VBLANK_ON, val, timing->vblank_start); in gbe_set_timing_info() 572 SET_GBE_FIELD(VT_VCMAP, VCMAP_ON, val, timing->vblank_start); in gbe_set_timing_info() 581 temp = timing->vblank_start - timing->vblank_end - 1; in gbe_set_timing_info() 626 SET_GBE_FIELD(VT_VPIXEN, VPIXEN_OFF, val, timing->vblank_start); in gbe_set_timing_info()
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/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
D | display_rq_dlg_calc_20.c | 809 unsigned int vblank_start = dst->vblank_start; in dml20_rq_dlg_get_dlg_params() local 943 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml20_rq_dlg_get_dlg_params() 1061 vblank_start, in dml20_rq_dlg_get_dlg_params()
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D | display_rq_dlg_calc_20v2.c | 809 unsigned int vblank_start = dst->vblank_start; in dml20v2_rq_dlg_get_dlg_params() local 943 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml20v2_rq_dlg_get_dlg_params() 1062 vblank_start, in dml20v2_rq_dlg_get_dlg_params()
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/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
D | display_rq_dlg_calc_21.c | 855 unsigned int vblank_start = dst->vblank_start; in dml_rq_dlg_get_dlg_params() local 989 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml_rq_dlg_get_dlg_params() 1102 vblank_start, in dml_rq_dlg_get_dlg_params()
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/drivers/gpu/drm/amd/display/dc/dml/ |
D | dml1_display_rq_dlg_calc.c | 1012 unsigned int vblank_start = e2e_pipe_param.pipe.dest.vblank_start; in dml1_rq_dlg_get_dlg_params() local 1173 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml1_rq_dlg_get_dlg_params() 1261 vblank_start, in dml1_rq_dlg_get_dlg_params()
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D | display_mode_structs.h | 344 unsigned int vblank_start; member
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D | display_mode_lib.c | 202 dml_print("DML PARAMS: vblank_start = %d\n", pipe_dest->vblank_start); in dml_log_pipe_params()
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/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
D | display_rq_dlg_calc_30.c | 1009 unsigned int vblank_start = dst->vblank_start; in dml_rq_dlg_get_dlg_params() local 1145 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml_rq_dlg_get_dlg_params() 1250 vblank_start, in dml_rq_dlg_get_dlg_params()
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/drivers/video/fbdev/intelfb/ |
D | intelfbhw.c | 1048 u32 vsync_start, vsync_end, vblank_start, vblank_end, vtotal, vactive; in intelfbhw_mode_to_hw() local 1190 vblank_start = vactive; in intelfbhw_mode_to_hw() 1194 vactive, vsync_start, vsync_end, vtotal, vblank_start, in intelfbhw_mode_to_hw() 1229 vblank_start--; in intelfbhw_mode_to_hw() 1230 if (check_overflow(vblank_start, VBLANKSTART_MASK, "CRTC vblank_start")) in intelfbhw_mode_to_hw() 1242 *vb = (vblank_start << VBLANKSTART_SHIFT) | in intelfbhw_mode_to_hw()
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/drivers/video/fbdev/vermilion/ |
D | vermilion.c | 770 u32 vtotal, vactive, vblank_start, vblank_end, vsync_start, vsync_end; in vmlfb_set_par_locked() local 792 vblank_start = var->yres; in vmlfb_set_par_locked() 838 ((vblank_end - 1) << 16) | (vblank_start - 1)); in vmlfb_set_par_locked()
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/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
D | display_rq_dlg_calc_31.c | 968 unsigned int vblank_start = dst->vblank_start; in dml_rq_dlg_get_dlg_params() local 1080 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml_rq_dlg_get_dlg_params()
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/drivers/gpu/drm/amd/display/dc/calcs/ |
D | dcn_calcs.c | 439 input->dest.vblank_start = input->dest.vtotal - pipe->stream->timing.v_front_porch; in pipe_ctx_to_e2e_pipe_params() 440 input->dest.vblank_end = input->dest.vblank_start in pipe_ctx_to_e2e_pipe_params() 1247 pipe->pipe_dlg_param.vblank_start = asic_blank_start; in dcn_validate_bandwidth() 1273 hsplit_pipe->pipe_dlg_param.vblank_start = pipe->pipe_dlg_param.vblank_start; in dcn_validate_bandwidth()
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/drivers/gpu/drm/i915/ |
D | i915_irq.c | 772 u32 vblank_start = mode->crtc_vblank_start; in __intel_get_crtc_scanline_from_timestamp() local 778 scanline = (scanline + vblank_start) % vtotal; in __intel_get_crtc_scanline_from_timestamp()
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/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_resource.c | 2056 pipes[pipe_cnt].pipe.dest.vblank_start = v_total - front_porch; in dcn20_populate_dml_pipes_from_context() 2057 pipes[pipe_cnt].pipe.dest.vblank_end = pipes[pipe_cnt].pipe.dest.vblank_start in dcn20_populate_dml_pipes_from_context()
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