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/drivers/crypto/hisilicon/
Dqm.c69 #define QM_SQ_TAIL_IDX(sqc) ((le16_to_cpu((sqc)->w11) >> 6) & 0x1)
81 #define QM_CQ_TAIL_IDX(cqc) ((le16_to_cpu((cqc)->w11) >> 6) & 0x1)
307 (qc)->w11 = 0; \
367 __le16 w11; member
382 __le16 w11; member
2590 sqc->w11 = cpu_to_le16(QM_QC_PASID_ENABLE << in qm_sq_ctx_cfg()
2632 cqc->w11 = cpu_to_le16(QM_QC_PASID_ENABLE); in qm_cq_ctx_cfg()