1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Host communication command constants for ChromeOS EC 4 * 5 * Copyright (C) 2012 Google, Inc 6 * 7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from 8 * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h 9 */ 10 11 /* Host communication command constants for Chrome EC */ 12 13 #ifndef __CROS_EC_COMMANDS_H 14 #define __CROS_EC_COMMANDS_H 15 16 17 18 19 #define BUILD_ASSERT(_cond) 20 21 /* 22 * Current version of this protocol 23 * 24 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is 25 * determined in other ways. Remove this once the kernel code no longer 26 * depends on it. 27 */ 28 #define EC_PROTO_VERSION 0x00000002 29 30 /* Command version mask */ 31 #define EC_VER_MASK(version) BIT(version) 32 33 /* I/O addresses for ACPI commands */ 34 #define EC_LPC_ADDR_ACPI_DATA 0x62 35 #define EC_LPC_ADDR_ACPI_CMD 0x66 36 37 /* I/O addresses for host command */ 38 #define EC_LPC_ADDR_HOST_DATA 0x200 39 #define EC_LPC_ADDR_HOST_CMD 0x204 40 41 /* I/O addresses for host command args and params */ 42 /* Protocol version 2 */ 43 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ 44 #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is 45 * EC_PROTO2_MAX_PARAM_SIZE 46 */ 47 /* Protocol version 3 */ 48 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ 49 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ 50 51 /* 52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff 53 * and they tell the kernel that so we have to think of it as two parts. 54 */ 55 #define EC_HOST_CMD_REGION0 0x800 56 #define EC_HOST_CMD_REGION1 0x880 57 #define EC_HOST_CMD_REGION_SIZE 0x80 58 59 /* EC command register bit functions */ 60 #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ 61 #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ 62 #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ 63 #define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */ 64 #define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */ 65 #define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */ 66 #define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */ 67 68 #define EC_LPC_ADDR_MEMMAP 0x900 69 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ 70 #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ 71 72 /* The offset address of each type of data in mapped memory. */ 73 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ 74 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ 75 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ 76 #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ 77 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ 78 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ 79 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ 80 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ 81 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ 82 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ 83 /* Unused 0x28 - 0x2f */ 84 #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ 85 /* Unused 0x31 - 0x33 */ 86 #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */ 87 /* Battery values are all 32 bits, unless otherwise noted. */ 88 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ 89 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ 90 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ 91 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */ 92 #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */ 93 #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */ 94 /* Unused 0x4f */ 95 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ 96 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ 97 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ 98 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ 99 /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ 100 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ 101 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ 102 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ 103 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ 104 #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ 105 /* Unused 0x84 - 0x8f */ 106 #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ 107 /* Unused 0x91 */ 108 #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ 109 /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ 110 /* 0x94 - 0x99: 1st Accelerometer */ 111 /* 0x9a - 0x9f: 2nd Accelerometer */ 112 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ 113 /* Unused 0xa6 - 0xdf */ 114 115 /* 116 * ACPI is unable to access memory mapped data at or above this offset due to 117 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe 118 * which might be needed by ACPI. 119 */ 120 #define EC_MEMMAP_NO_ACPI 0xe0 121 122 /* Define the format of the accelerometer mapped memory status byte. */ 123 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f 124 #define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4) 125 #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7) 126 127 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ 128 #define EC_TEMP_SENSOR_ENTRIES 16 129 /* 130 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. 131 * 132 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. 133 */ 134 #define EC_TEMP_SENSOR_B_ENTRIES 8 135 136 /* Special values for mapped temperature sensors */ 137 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff 138 #define EC_TEMP_SENSOR_ERROR 0xfe 139 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd 140 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc 141 /* 142 * The offset of temperature value stored in mapped memory. This allows 143 * reporting a temperature range of 200K to 454K = -73C to 181C. 144 */ 145 #define EC_TEMP_SENSOR_OFFSET 200 146 147 /* 148 * Number of ALS readings at EC_MEMMAP_ALS 149 */ 150 #define EC_ALS_ENTRIES 2 151 152 /* 153 * The default value a temperature sensor will return when it is present but 154 * has not been read this boot. This is a reasonable number to avoid 155 * triggering alarms on the host. 156 */ 157 #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET) 158 159 #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ 160 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ 161 #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ 162 163 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ 164 #define EC_BATT_FLAG_AC_PRESENT 0x01 165 #define EC_BATT_FLAG_BATT_PRESENT 0x02 166 #define EC_BATT_FLAG_DISCHARGING 0x04 167 #define EC_BATT_FLAG_CHARGING 0x08 168 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 169 /* Set if some of the static/dynamic data is invalid (or outdated). */ 170 #define EC_BATT_FLAG_INVALID_DATA 0x20 171 172 /* Switch flags at EC_MEMMAP_SWITCHES */ 173 #define EC_SWITCH_LID_OPEN 0x01 174 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 175 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 176 /* Was recovery requested via keyboard; now unused. */ 177 #define EC_SWITCH_IGNORE1 0x08 178 /* Recovery requested via dedicated signal (from servo board) */ 179 #define EC_SWITCH_DEDICATED_RECOVERY 0x10 180 /* Was fake developer mode switch; now unused. Remove in next refactor. */ 181 #define EC_SWITCH_IGNORE0 0x20 182 183 /* Host command interface flags */ 184 /* Host command interface supports LPC args (LPC interface only) */ 185 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 186 /* Host command interface supports version 3 protocol */ 187 #define EC_HOST_CMD_FLAG_VERSION_3 0x02 188 189 /* Wireless switch flags */ 190 #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ 191 #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ 192 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ 193 #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ 194 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ 195 196 /*****************************************************************************/ 197 /* 198 * ACPI commands 199 * 200 * These are valid ONLY on the ACPI command/data port. 201 */ 202 203 /* 204 * ACPI Read Embedded Controller 205 * 206 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 207 * 208 * Use the following sequence: 209 * 210 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD 211 * - Wait for EC_LPC_CMDR_PENDING bit to clear 212 * - Write address to EC_LPC_ADDR_ACPI_DATA 213 * - Wait for EC_LPC_CMDR_DATA bit to set 214 * - Read value from EC_LPC_ADDR_ACPI_DATA 215 */ 216 #define EC_CMD_ACPI_READ 0x0080 217 218 /* 219 * ACPI Write Embedded Controller 220 * 221 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 222 * 223 * Use the following sequence: 224 * 225 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD 226 * - Wait for EC_LPC_CMDR_PENDING bit to clear 227 * - Write address to EC_LPC_ADDR_ACPI_DATA 228 * - Wait for EC_LPC_CMDR_PENDING bit to clear 229 * - Write value to EC_LPC_ADDR_ACPI_DATA 230 */ 231 #define EC_CMD_ACPI_WRITE 0x0081 232 233 /* 234 * ACPI Burst Enable Embedded Controller 235 * 236 * This enables burst mode on the EC to allow the host to issue several 237 * commands back-to-back. While in this mode, writes to mapped multi-byte 238 * data are locked out to ensure data consistency. 239 */ 240 #define EC_CMD_ACPI_BURST_ENABLE 0x0082 241 242 /* 243 * ACPI Burst Disable Embedded Controller 244 * 245 * This disables burst mode on the EC and stops preventing EC writes to mapped 246 * multi-byte data. 247 */ 248 #define EC_CMD_ACPI_BURST_DISABLE 0x0083 249 250 /* 251 * ACPI Query Embedded Controller 252 * 253 * This clears the lowest-order bit in the currently pending host events, and 254 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, 255 * event 0x80000000 = 32), or 0 if no event was pending. 256 */ 257 #define EC_CMD_ACPI_QUERY_EVENT 0x0084 258 259 /* Valid addresses in ACPI memory space, for read/write commands */ 260 261 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ 262 #define EC_ACPI_MEM_VERSION 0x00 263 /* 264 * Test location; writing value here updates test compliment byte to (0xff - 265 * value). 266 */ 267 #define EC_ACPI_MEM_TEST 0x01 268 /* Test compliment; writes here are ignored. */ 269 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 270 271 /* Keyboard backlight brightness percent (0 - 100) */ 272 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 273 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ 274 #define EC_ACPI_MEM_FAN_DUTY 0x04 275 276 /* 277 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two 278 * independent thresholds attached to them. The current value of the ID 279 * register determines which sensor is affected by the THRESHOLD and COMMIT 280 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme 281 * as the memory-mapped sensors. The COMMIT register applies those settings. 282 * 283 * The spec does not mandate any way to read back the threshold settings 284 * themselves, but when a threshold is crossed the AP needs a way to determine 285 * which sensor(s) are responsible. Each reading of the ID register clears and 286 * returns one sensor ID that has crossed one of its threshold (in either 287 * direction) since the last read. A value of 0xFF means "no new thresholds 288 * have tripped". Setting or enabling the thresholds for a sensor will clear 289 * the unread event count for that sensor. 290 */ 291 #define EC_ACPI_MEM_TEMP_ID 0x05 292 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 293 #define EC_ACPI_MEM_TEMP_COMMIT 0x07 294 /* 295 * Here are the bits for the COMMIT register: 296 * bit 0 selects the threshold index for the chosen sensor (0/1) 297 * bit 1 enables/disables the selected threshold (0 = off, 1 = on) 298 * Each write to the commit register affects one threshold. 299 */ 300 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0) 301 #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1) 302 /* 303 * Example: 304 * 305 * Set the thresholds for sensor 2 to 50 C and 60 C: 306 * write 2 to [0x05] -- select temp sensor 2 307 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET 308 * write 0x2 to [0x07] -- enable threshold 0 with this value 309 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET 310 * write 0x3 to [0x07] -- enable threshold 1 with this value 311 * 312 * Disable the 60 C threshold, leaving the 50 C threshold unchanged: 313 * write 2 to [0x05] -- select temp sensor 2 314 * write 0x1 to [0x07] -- disable threshold 1 315 */ 316 317 /* DPTF battery charging current limit */ 318 #define EC_ACPI_MEM_CHARGING_LIMIT 0x08 319 320 /* Charging limit is specified in 64 mA steps */ 321 #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 322 /* Value to disable DPTF battery charging limit */ 323 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff 324 325 /* 326 * Report device orientation 327 * Bits Definition 328 * 3:1 Device DPTF Profile Number (DDPN) 329 * 0 = Reserved for backward compatibility (indicates no valid 330 * profile number. Host should fall back to using TBMD). 331 * 1..7 = DPTF Profile number to indicate to host which table needs 332 * to be loaded. 333 * 0 Tablet Mode Device Indicator (TBMD) 334 */ 335 #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 336 #define EC_ACPI_MEM_TBMD_SHIFT 0 337 #define EC_ACPI_MEM_TBMD_MASK 0x1 338 #define EC_ACPI_MEM_DDPN_SHIFT 1 339 #define EC_ACPI_MEM_DDPN_MASK 0x7 340 341 /* 342 * Report device features. Uses the same format as the host command, except: 343 * 344 * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set 345 * of features", which is of limited interest when the system is already 346 * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since 347 * these are supported, it defaults to 0. 348 * This allows detecting the presence of this field since older versions of 349 * the EC codebase would simply return 0xff to that unknown address. Check 350 * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits 351 * are valid. 352 */ 353 #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a 354 #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b 355 #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c 356 #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d 357 #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e 358 #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f 359 #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10 360 #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11 361 362 #define EC_ACPI_MEM_BATTERY_INDEX 0x12 363 364 /* 365 * USB Port Power. Each bit indicates whether the corresponding USB ports' power 366 * is enabled (1) or disabled (0). 367 * bit 0 USB port ID 0 368 * ... 369 * bit 7 USB port ID 7 370 */ 371 #define EC_ACPI_MEM_USB_PORT_POWER 0x13 372 373 /* 374 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data 375 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. 376 */ 377 #define EC_ACPI_MEM_MAPPED_BEGIN 0x20 378 #define EC_ACPI_MEM_MAPPED_SIZE 0xe0 379 380 /* Current version of ACPI memory address space */ 381 #define EC_ACPI_MEM_VERSION_CURRENT 2 382 383 384 /* 385 * This header file is used in coreboot both in C and ACPI code. The ACPI code 386 * is pre-processed to handle constants but the ASL compiler is unable to 387 * handle actual C code so keep it separate. 388 */ 389 390 391 /* 392 * Attributes for EC request and response packets. Just defining __packed 393 * results in inefficient assembly code on ARM, if the structure is actually 394 * 32-bit aligned, as it should be for all buffers. 395 * 396 * Be very careful when adding these to existing structures. They will round 397 * up the structure size to the specified boundary. 398 * 399 * Also be very careful to make that if a structure is included in some other 400 * parent structure that the alignment will still be true given the packing of 401 * the parent structure. This is particularly important if the sub-structure 402 * will be passed as a pointer to another function, since that function will 403 * not know about the misaligment caused by the parent structure's packing. 404 * 405 * Also be very careful using __packed - particularly when nesting non-packed 406 * structures inside packed ones. In fact, DO NOT use __packed directly; 407 * always use one of these attributes. 408 * 409 * Once everything is annotated properly, the following search strings should 410 * not return ANY matches in this file other than right here: 411 * 412 * "__packed" - generates inefficient code; all sub-structs must also be packed 413 * 414 * "struct [^_]" - all structs should be annotated, except for structs that are 415 * members of other structs/unions (and their original declarations should be 416 * annotated). 417 */ 418 419 /* 420 * Packed structures make no assumption about alignment, so they do inefficient 421 * byte-wise reads. 422 */ 423 #define __ec_align1 __packed 424 #define __ec_align2 __packed 425 #define __ec_align4 __packed 426 #define __ec_align_size1 __packed 427 #define __ec_align_offset1 __packed 428 #define __ec_align_offset2 __packed 429 #define __ec_todo_packed __packed 430 #define __ec_todo_unpacked 431 432 433 /* LPC command status byte masks */ 434 /* EC has written a byte in the data register and host hasn't read it yet */ 435 #define EC_LPC_STATUS_TO_HOST 0x01 436 /* Host has written a command/data byte and the EC hasn't read it yet */ 437 #define EC_LPC_STATUS_FROM_HOST 0x02 438 /* EC is processing a command */ 439 #define EC_LPC_STATUS_PROCESSING 0x04 440 /* Last write to EC was a command, not data */ 441 #define EC_LPC_STATUS_LAST_CMD 0x08 442 /* EC is in burst mode */ 443 #define EC_LPC_STATUS_BURST_MODE 0x10 444 /* SCI event is pending (requesting SCI query) */ 445 #define EC_LPC_STATUS_SCI_PENDING 0x20 446 /* SMI event is pending (requesting SMI query) */ 447 #define EC_LPC_STATUS_SMI_PENDING 0x40 448 /* (reserved) */ 449 #define EC_LPC_STATUS_RESERVED 0x80 450 451 /* 452 * EC is busy. This covers both the EC processing a command, and the host has 453 * written a new command but the EC hasn't picked it up yet. 454 */ 455 #define EC_LPC_STATUS_BUSY_MASK \ 456 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) 457 458 /* 459 * Host command response codes (16-bit). Note that response codes should be 460 * stored in a uint16_t rather than directly in a value of this type. 461 */ 462 enum ec_status { 463 EC_RES_SUCCESS = 0, 464 EC_RES_INVALID_COMMAND = 1, 465 EC_RES_ERROR = 2, 466 EC_RES_INVALID_PARAM = 3, 467 EC_RES_ACCESS_DENIED = 4, 468 EC_RES_INVALID_RESPONSE = 5, 469 EC_RES_INVALID_VERSION = 6, 470 EC_RES_INVALID_CHECKSUM = 7, 471 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ 472 EC_RES_UNAVAILABLE = 9, /* No response available */ 473 EC_RES_TIMEOUT = 10, /* We got a timeout */ 474 EC_RES_OVERFLOW = 11, /* Table / data overflow */ 475 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ 476 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ 477 EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ 478 EC_RES_BUS_ERROR = 15, /* Communications bus error */ 479 EC_RES_BUSY = 16, /* Up but too busy. Should retry */ 480 EC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */ 481 EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */ 482 EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */ 483 EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */ 484 }; 485 486 /* 487 * Host event codes. Note these are 1-based, not 0-based, because ACPI query 488 * EC command uses code 0 to mean "no event pending". We explicitly specify 489 * each value in the enum listing so they won't change if we delete/insert an 490 * item or rearrange the list (it needs to be stable across platforms, not 491 * just within a single compiled instance). 492 */ 493 enum host_event_code { 494 EC_HOST_EVENT_LID_CLOSED = 1, 495 EC_HOST_EVENT_LID_OPEN = 2, 496 EC_HOST_EVENT_POWER_BUTTON = 3, 497 EC_HOST_EVENT_AC_CONNECTED = 4, 498 EC_HOST_EVENT_AC_DISCONNECTED = 5, 499 EC_HOST_EVENT_BATTERY_LOW = 6, 500 EC_HOST_EVENT_BATTERY_CRITICAL = 7, 501 EC_HOST_EVENT_BATTERY = 8, 502 EC_HOST_EVENT_THERMAL_THRESHOLD = 9, 503 /* Event generated by a device attached to the EC */ 504 EC_HOST_EVENT_DEVICE = 10, 505 EC_HOST_EVENT_THERMAL = 11, 506 EC_HOST_EVENT_USB_CHARGER = 12, 507 EC_HOST_EVENT_KEY_PRESSED = 13, 508 /* 509 * EC has finished initializing the host interface. The host can check 510 * for this event following sending a EC_CMD_REBOOT_EC command to 511 * determine when the EC is ready to accept subsequent commands. 512 */ 513 EC_HOST_EVENT_INTERFACE_READY = 14, 514 /* Keyboard recovery combo has been pressed */ 515 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, 516 517 /* Shutdown due to thermal overload */ 518 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, 519 /* Shutdown due to battery level too low */ 520 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, 521 522 /* Suggest that the AP throttle itself */ 523 EC_HOST_EVENT_THROTTLE_START = 18, 524 /* Suggest that the AP resume normal speed */ 525 EC_HOST_EVENT_THROTTLE_STOP = 19, 526 527 /* Hang detect logic detected a hang and host event timeout expired */ 528 EC_HOST_EVENT_HANG_DETECT = 20, 529 /* Hang detect logic detected a hang and warm rebooted the AP */ 530 EC_HOST_EVENT_HANG_REBOOT = 21, 531 532 /* PD MCU triggering host event */ 533 EC_HOST_EVENT_PD_MCU = 22, 534 535 /* Battery Status flags have changed */ 536 EC_HOST_EVENT_BATTERY_STATUS = 23, 537 538 /* EC encountered a panic, triggering a reset */ 539 EC_HOST_EVENT_PANIC = 24, 540 541 /* Keyboard fastboot combo has been pressed */ 542 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, 543 544 /* EC RTC event occurred */ 545 EC_HOST_EVENT_RTC = 26, 546 547 /* Emulate MKBP event */ 548 EC_HOST_EVENT_MKBP = 27, 549 550 /* EC desires to change state of host-controlled USB mux */ 551 EC_HOST_EVENT_USB_MUX = 28, 552 553 /* TABLET/LAPTOP mode or detachable base attach/detach event */ 554 EC_HOST_EVENT_MODE_CHANGE = 29, 555 556 /* Keyboard recovery combo with hardware reinitialization */ 557 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, 558 559 /* WoV */ 560 EC_HOST_EVENT_WOV = 31, 561 562 /* 563 * The high bit of the event mask is not used as a host event code. If 564 * it reads back as set, then the entire event mask should be 565 * considered invalid by the host. This can happen when reading the 566 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is 567 * not initialized on the EC, or improperly configured on the host. 568 */ 569 EC_HOST_EVENT_INVALID = 32 570 }; 571 /* Host event mask */ 572 #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1) 573 574 /** 575 * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS 576 * @flags: The host argument flags. 577 * @command_version: Command version. 578 * @data_size: The length of data. 579 * @checksum: Checksum; sum of command + flags + command_version + data_size + 580 * all params/response data bytes. 581 */ 582 struct ec_lpc_host_args { 583 uint8_t flags; 584 uint8_t command_version; 585 uint8_t data_size; 586 uint8_t checksum; 587 } __ec_align4; 588 589 /* Flags for ec_lpc_host_args.flags */ 590 /* 591 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command 592 * params. 593 * 594 * If EC gets a command and this flag is not set, this is an old-style command. 595 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with 596 * unknown length. EC must respond with an old-style response (that is, 597 * without setting EC_HOST_ARGS_FLAG_TO_HOST). 598 */ 599 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 600 /* 601 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. 602 * 603 * If EC responds to a command and this flag is not set, this is an old-style 604 * response. Command version is 0 and response data from EC is at 605 * EC_LPC_ADDR_OLD_PARAM with unknown length. 606 */ 607 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 608 609 /*****************************************************************************/ 610 /* 611 * Byte codes returned by EC over SPI interface. 612 * 613 * These can be used by the AP to debug the EC interface, and to determine 614 * when the EC is not in a state where it will ever get around to responding 615 * to the AP. 616 * 617 * Example of sequence of bytes read from EC for a current good transfer: 618 * 1. - - AP asserts chip select (CS#) 619 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request 620 * 3. - - EC starts handling CS# interrupt 621 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request 622 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in 623 * bytes looking for EC_SPI_FRAME_START 624 * 6. - - EC finishes processing and sets up response 625 * 7. EC_SPI_FRAME_START - AP reads frame byte 626 * 8. (response packet) - AP reads response packet 627 * 9. EC_SPI_PAST_END - Any additional bytes read by AP 628 * 10 - - AP deasserts chip select 629 * 11 - - EC processes CS# interrupt and sets up DMA for 630 * next request 631 * 632 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than 633 * the following byte values: 634 * EC_SPI_OLD_READY 635 * EC_SPI_RX_READY 636 * EC_SPI_RECEIVING 637 * EC_SPI_PROCESSING 638 * 639 * Then the EC found an error in the request, or was not ready for the request 640 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, 641 * because the EC is unable to tell when the AP is done sending its request. 642 */ 643 644 /* 645 * Framing byte which precedes a response packet from the EC. After sending a 646 * request, the AP will clock in bytes until it sees the framing byte, then 647 * clock in the response packet. 648 */ 649 #define EC_SPI_FRAME_START 0xec 650 651 /* 652 * Padding bytes which are clocked out after the end of a response packet. 653 */ 654 #define EC_SPI_PAST_END 0xed 655 656 /* 657 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects 658 * that the AP will send a valid packet header (starting with 659 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes. 660 */ 661 #define EC_SPI_RX_READY 0xf8 662 663 /* 664 * EC has started receiving the request from the AP, but hasn't started 665 * processing it yet. 666 */ 667 #define EC_SPI_RECEIVING 0xf9 668 669 /* EC has received the entire request from the AP and is processing it. */ 670 #define EC_SPI_PROCESSING 0xfa 671 672 /* 673 * EC received bad data from the AP, such as a packet header with an invalid 674 * length. EC will ignore all data until chip select deasserts. 675 */ 676 #define EC_SPI_RX_BAD_DATA 0xfb 677 678 /* 679 * EC received data from the AP before it was ready. That is, the AP asserted 680 * chip select and started clocking data before the EC was ready to receive it. 681 * EC will ignore all data until chip select deasserts. 682 */ 683 #define EC_SPI_NOT_READY 0xfc 684 685 /* 686 * EC was ready to receive a request from the AP. EC has treated the byte sent 687 * by the AP as part of a request packet, or (for old-style ECs) is processing 688 * a fully received packet but is not ready to respond yet. 689 */ 690 #define EC_SPI_OLD_READY 0xfd 691 692 /*****************************************************************************/ 693 694 /* 695 * Protocol version 2 for I2C and SPI send a request this way: 696 * 697 * 0 EC_CMD_VERSION0 + (command version) 698 * 1 Command number 699 * 2 Length of params = N 700 * 3..N+2 Params, if any 701 * N+3 8-bit checksum of bytes 0..N+2 702 * 703 * The corresponding response is: 704 * 705 * 0 Result code (EC_RES_*) 706 * 1 Length of params = M 707 * 2..M+1 Params, if any 708 * M+2 8-bit checksum of bytes 0..M+1 709 */ 710 #define EC_PROTO2_REQUEST_HEADER_BYTES 3 711 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1 712 #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \ 713 EC_PROTO2_REQUEST_TRAILER_BYTES) 714 715 #define EC_PROTO2_RESPONSE_HEADER_BYTES 2 716 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1 717 #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \ 718 EC_PROTO2_RESPONSE_TRAILER_BYTES) 719 720 /* Parameter length was limited by the LPC interface */ 721 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc 722 723 /* Maximum request and response packet sizes for protocol version 2 */ 724 #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \ 725 EC_PROTO2_MAX_PARAM_SIZE) 726 #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \ 727 EC_PROTO2_MAX_PARAM_SIZE) 728 729 /*****************************************************************************/ 730 731 /* 732 * Value written to legacy command port / prefix byte to indicate protocol 733 * 3+ structs are being used. Usage is bus-dependent. 734 */ 735 #define EC_COMMAND_PROTOCOL_3 0xda 736 737 #define EC_HOST_REQUEST_VERSION 3 738 739 /** 740 * struct ec_host_request - Version 3 request from host. 741 * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it 742 * receives a header with a version it doesn't know how to 743 * parse. 744 * @checksum: Checksum of request and data; sum of all bytes including checksum 745 * should total to 0. 746 * @command: Command to send (EC_CMD_...) 747 * @command_version: Command version. 748 * @reserved: Unused byte in current protocol version; set to 0. 749 * @data_len: Length of data which follows this header. 750 */ 751 struct ec_host_request { 752 uint8_t struct_version; 753 uint8_t checksum; 754 uint16_t command; 755 uint8_t command_version; 756 uint8_t reserved; 757 uint16_t data_len; 758 } __ec_align4; 759 760 #define EC_HOST_RESPONSE_VERSION 3 761 762 /** 763 * struct ec_host_response - Version 3 response from EC. 764 * @struct_version: Struct version (=3). 765 * @checksum: Checksum of response and data; sum of all bytes including 766 * checksum should total to 0. 767 * @result: EC's response to the command (separate from communication failure) 768 * @data_len: Length of data which follows this header. 769 * @reserved: Unused bytes in current protocol version; set to 0. 770 */ 771 struct ec_host_response { 772 uint8_t struct_version; 773 uint8_t checksum; 774 uint16_t result; 775 uint16_t data_len; 776 uint16_t reserved; 777 } __ec_align4; 778 779 /*****************************************************************************/ 780 781 /* 782 * Host command protocol V4. 783 * 784 * Packets always start with a request or response header. They are followed 785 * by data_len bytes of data. If the data_crc_present flag is set, the data 786 * bytes are followed by a CRC-8 of that data, using using x^8 + x^2 + x + 1 787 * polynomial. 788 * 789 * Host algorithm when sending a request q: 790 * 791 * 101) tries_left=(some value, e.g. 3); 792 * 102) q.seq_num++ 793 * 103) q.seq_dup=0 794 * 104) Calculate q.header_crc. 795 * 105) Send request q to EC. 796 * 106) Wait for response r. Go to 201 if received or 301 if timeout. 797 * 798 * 201) If r.struct_version != 4, go to 301. 799 * 202) If r.header_crc mismatches calculated CRC for r header, go to 301. 800 * 203) If r.data_crc_present and r.data_crc mismatches, go to 301. 801 * 204) If r.seq_num != q.seq_num, go to 301. 802 * 205) If r.seq_dup == q.seq_dup, return success. 803 * 207) If r.seq_dup == 1, go to 301. 804 * 208) Return error. 805 * 806 * 301) If --tries_left <= 0, return error. 807 * 302) If q.seq_dup == 1, go to 105. 808 * 303) q.seq_dup = 1 809 * 304) Go to 104. 810 * 811 * EC algorithm when receiving a request q. 812 * EC has response buffer r, error buffer e. 813 * 814 * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION 815 * and go to 301 816 * 102) If q.header_crc mismatches calculated CRC, set e.result = 817 * EC_RES_INVALID_HEADER_CRC and go to 301 818 * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC 819 * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC 820 * and go to 301. 821 * 104) If q.seq_dup == 0, go to 201. 822 * 105) If q.seq_num != r.seq_num, go to 201. 823 * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203. 824 * 825 * 201) Process request q into response r. 826 * 202) r.seq_num = q.seq_num 827 * 203) r.seq_dup = q.seq_dup 828 * 204) Calculate r.header_crc 829 * 205) If r.data_len > 0 and data is no longer available, set e.result = 830 * EC_RES_DUP_UNAVAILABLE and go to 301. 831 * 206) Send response r. 832 * 833 * 301) e.seq_num = q.seq_num 834 * 302) e.seq_dup = q.seq_dup 835 * 303) Calculate e.header_crc. 836 * 304) Send error response e. 837 */ 838 839 /* Version 4 request from host */ 840 struct ec_host_request4 { 841 /* 842 * bits 0-3: struct_version: Structure version (=4) 843 * bit 4: is_response: Is response (=0) 844 * bits 5-6: seq_num: Sequence number 845 * bit 7: seq_dup: Sequence duplicate flag 846 */ 847 uint8_t fields0; 848 849 /* 850 * bits 0-4: command_version: Command version 851 * bits 5-6: Reserved (set 0, ignore on read) 852 * bit 7: data_crc_present: Is data CRC present after data 853 */ 854 uint8_t fields1; 855 856 /* Command code (EC_CMD_*) */ 857 uint16_t command; 858 859 /* Length of data which follows this header (not including data CRC) */ 860 uint16_t data_len; 861 862 /* Reserved (set 0, ignore on read) */ 863 uint8_t reserved; 864 865 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 866 uint8_t header_crc; 867 } __ec_align4; 868 869 /* Version 4 response from EC */ 870 struct ec_host_response4 { 871 /* 872 * bits 0-3: struct_version: Structure version (=4) 873 * bit 4: is_response: Is response (=1) 874 * bits 5-6: seq_num: Sequence number 875 * bit 7: seq_dup: Sequence duplicate flag 876 */ 877 uint8_t fields0; 878 879 /* 880 * bits 0-6: Reserved (set 0, ignore on read) 881 * bit 7: data_crc_present: Is data CRC present after data 882 */ 883 uint8_t fields1; 884 885 /* Result code (EC_RES_*) */ 886 uint16_t result; 887 888 /* Length of data which follows this header (not including data CRC) */ 889 uint16_t data_len; 890 891 /* Reserved (set 0, ignore on read) */ 892 uint8_t reserved; 893 894 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 895 uint8_t header_crc; 896 } __ec_align4; 897 898 /* Fields in fields0 byte */ 899 #define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f 900 #define EC_PACKET4_0_IS_RESPONSE_MASK 0x10 901 #define EC_PACKET4_0_SEQ_NUM_SHIFT 5 902 #define EC_PACKET4_0_SEQ_NUM_MASK 0x60 903 #define EC_PACKET4_0_SEQ_DUP_MASK 0x80 904 905 /* Fields in fields1 byte */ 906 #define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */ 907 #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80 908 909 /*****************************************************************************/ 910 /* 911 * Notes on commands: 912 * 913 * Each command is an 16-bit command value. Commands which take params or 914 * return response data specify structures for that data. If no structure is 915 * specified, the command does not input or output data, respectively. 916 * Parameter/response length is implicit in the structs. Some underlying 917 * communication protocols (I2C, SPI) may add length or checksum headers, but 918 * those are implementation-dependent and not defined here. 919 * 920 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 921 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 922 */ 923 924 /*****************************************************************************/ 925 /* General / test commands */ 926 927 /* 928 * Get protocol version, used to deal with non-backward compatible protocol 929 * changes. 930 */ 931 #define EC_CMD_PROTO_VERSION 0x0000 932 933 /** 934 * struct ec_response_proto_version - Response to the proto version command. 935 * @version: The protocol version. 936 */ 937 struct ec_response_proto_version { 938 uint32_t version; 939 } __ec_align4; 940 941 /* 942 * Hello. This is a simple command to test the EC is responsive to 943 * commands. 944 */ 945 #define EC_CMD_HELLO 0x0001 946 947 /** 948 * struct ec_params_hello - Parameters to the hello command. 949 * @in_data: Pass anything here. 950 */ 951 struct ec_params_hello { 952 uint32_t in_data; 953 } __ec_align4; 954 955 /** 956 * struct ec_response_hello - Response to the hello command. 957 * @out_data: Output will be in_data + 0x01020304. 958 */ 959 struct ec_response_hello { 960 uint32_t out_data; 961 } __ec_align4; 962 963 /* Get version number */ 964 #define EC_CMD_GET_VERSION 0x0002 965 966 enum ec_current_image { 967 EC_IMAGE_UNKNOWN = 0, 968 EC_IMAGE_RO, 969 EC_IMAGE_RW 970 }; 971 972 /** 973 * struct ec_response_get_version - Response to the get version command. 974 * @version_string_ro: Null-terminated RO firmware version string. 975 * @version_string_rw: Null-terminated RW firmware version string. 976 * @reserved: Unused bytes; was previously RW-B firmware version string. 977 * @current_image: One of ec_current_image. 978 */ 979 struct ec_response_get_version { 980 char version_string_ro[32]; 981 char version_string_rw[32]; 982 char reserved[32]; 983 uint32_t current_image; 984 } __ec_align4; 985 986 /* Read test */ 987 #define EC_CMD_READ_TEST 0x0003 988 989 /** 990 * struct ec_params_read_test - Parameters for the read test command. 991 * @offset: Starting value for read buffer. 992 * @size: Size to read in bytes. 993 */ 994 struct ec_params_read_test { 995 uint32_t offset; 996 uint32_t size; 997 } __ec_align4; 998 999 /** 1000 * struct ec_response_read_test - Response to the read test command. 1001 * @data: Data returned by the read test command. 1002 */ 1003 struct ec_response_read_test { 1004 uint32_t data[32]; 1005 } __ec_align4; 1006 1007 /* 1008 * Get build information 1009 * 1010 * Response is null-terminated string. 1011 */ 1012 #define EC_CMD_GET_BUILD_INFO 0x0004 1013 1014 /* Get chip info */ 1015 #define EC_CMD_GET_CHIP_INFO 0x0005 1016 1017 /** 1018 * struct ec_response_get_chip_info - Response to the get chip info command. 1019 * @vendor: Null-terminated string for chip vendor. 1020 * @name: Null-terminated string for chip name. 1021 * @revision: Null-terminated string for chip mask version. 1022 */ 1023 struct ec_response_get_chip_info { 1024 char vendor[32]; 1025 char name[32]; 1026 char revision[32]; 1027 } __ec_align4; 1028 1029 /* Get board HW version */ 1030 #define EC_CMD_GET_BOARD_VERSION 0x0006 1031 1032 /** 1033 * struct ec_response_board_version - Response to the board version command. 1034 * @board_version: A monotonously incrementing number. 1035 */ 1036 struct ec_response_board_version { 1037 uint16_t board_version; 1038 } __ec_align2; 1039 1040 /* 1041 * Read memory-mapped data. 1042 * 1043 * This is an alternate interface to memory-mapped data for bus protocols 1044 * which don't support direct-mapped memory - I2C, SPI, etc. 1045 * 1046 * Response is params.size bytes of data. 1047 */ 1048 #define EC_CMD_READ_MEMMAP 0x0007 1049 1050 /** 1051 * struct ec_params_read_memmap - Parameters for the read memory map command. 1052 * @offset: Offset in memmap (EC_MEMMAP_*). 1053 * @size: Size to read in bytes. 1054 */ 1055 struct ec_params_read_memmap { 1056 uint8_t offset; 1057 uint8_t size; 1058 } __ec_align1; 1059 1060 /* Read versions supported for a command */ 1061 #define EC_CMD_GET_CMD_VERSIONS 0x0008 1062 1063 /** 1064 * struct ec_params_get_cmd_versions - Parameters for the get command versions. 1065 * @cmd: Command to check. 1066 */ 1067 struct ec_params_get_cmd_versions { 1068 uint8_t cmd; 1069 } __ec_align1; 1070 1071 /** 1072 * struct ec_params_get_cmd_versions_v1 - Parameters for the get command 1073 * versions (v1) 1074 * @cmd: Command to check. 1075 */ 1076 struct ec_params_get_cmd_versions_v1 { 1077 uint16_t cmd; 1078 } __ec_align2; 1079 1080 /** 1081 * struct ec_response_get_cmd_version - Response to the get command versions. 1082 * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with 1083 * a desired version. 1084 */ 1085 struct ec_response_get_cmd_versions { 1086 uint32_t version_mask; 1087 } __ec_align4; 1088 1089 /* 1090 * Check EC communications status (busy). This is needed on i2c/spi but not 1091 * on lpc since it has its own out-of-band busy indicator. 1092 * 1093 * lpc must read the status from the command register. Attempting this on 1094 * lpc will overwrite the args/parameter space and corrupt its data. 1095 */ 1096 #define EC_CMD_GET_COMMS_STATUS 0x0009 1097 1098 /* Avoid using ec_status which is for return values */ 1099 enum ec_comms_status { 1100 EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */ 1101 }; 1102 1103 /** 1104 * struct ec_response_get_comms_status - Response to the get comms status 1105 * command. 1106 * @flags: Mask of enum ec_comms_status. 1107 */ 1108 struct ec_response_get_comms_status { 1109 uint32_t flags; /* Mask of enum ec_comms_status */ 1110 } __ec_align4; 1111 1112 /* Fake a variety of responses, purely for testing purposes. */ 1113 #define EC_CMD_TEST_PROTOCOL 0x000A 1114 1115 /* Tell the EC what to send back to us. */ 1116 struct ec_params_test_protocol { 1117 uint32_t ec_result; 1118 uint32_t ret_len; 1119 uint8_t buf[32]; 1120 } __ec_align4; 1121 1122 /* Here it comes... */ 1123 struct ec_response_test_protocol { 1124 uint8_t buf[32]; 1125 } __ec_align4; 1126 1127 /* Get protocol information */ 1128 #define EC_CMD_GET_PROTOCOL_INFO 0x000B 1129 1130 /* Flags for ec_response_get_protocol_info.flags */ 1131 /* EC_RES_IN_PROGRESS may be returned if a command is slow */ 1132 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0) 1133 1134 /** 1135 * struct ec_response_get_protocol_info - Response to the get protocol info. 1136 * @protocol_versions: Bitmask of protocol versions supported (1 << n means 1137 * version n). 1138 * @max_request_packet_size: Maximum request packet size in bytes. 1139 * @max_response_packet_size: Maximum response packet size in bytes. 1140 * @flags: see EC_PROTOCOL_INFO_* 1141 */ 1142 struct ec_response_get_protocol_info { 1143 /* Fields which exist if at least protocol version 3 supported */ 1144 uint32_t protocol_versions; 1145 uint16_t max_request_packet_size; 1146 uint16_t max_response_packet_size; 1147 uint32_t flags; 1148 } __ec_align4; 1149 1150 1151 /*****************************************************************************/ 1152 /* Get/Set miscellaneous values */ 1153 1154 /* The upper byte of .flags tells what to do (nothing means "get") */ 1155 #define EC_GSV_SET 0x80000000 1156 1157 /* 1158 * The lower three bytes of .flags identifies the parameter, if that has 1159 * meaning for an individual command. 1160 */ 1161 #define EC_GSV_PARAM_MASK 0x00ffffff 1162 1163 struct ec_params_get_set_value { 1164 uint32_t flags; 1165 uint32_t value; 1166 } __ec_align4; 1167 1168 struct ec_response_get_set_value { 1169 uint32_t flags; 1170 uint32_t value; 1171 } __ec_align4; 1172 1173 /* More than one command can use these structs to get/set parameters. */ 1174 #define EC_CMD_GSV_PAUSE_IN_S5 0x000C 1175 1176 /*****************************************************************************/ 1177 /* List the features supported by the firmware */ 1178 #define EC_CMD_GET_FEATURES 0x000D 1179 1180 /* Supported features */ 1181 enum ec_feature_code { 1182 /* 1183 * This image contains a limited set of features. Another image 1184 * in RW partition may support more features. 1185 */ 1186 EC_FEATURE_LIMITED = 0, 1187 /* 1188 * Commands for probing/reading/writing/erasing the flash in the 1189 * EC are present. 1190 */ 1191 EC_FEATURE_FLASH = 1, 1192 /* 1193 * Can control the fan speed directly. 1194 */ 1195 EC_FEATURE_PWM_FAN = 2, 1196 /* 1197 * Can control the intensity of the keyboard backlight. 1198 */ 1199 EC_FEATURE_PWM_KEYB = 3, 1200 /* 1201 * Support Google lightbar, introduced on Pixel. 1202 */ 1203 EC_FEATURE_LIGHTBAR = 4, 1204 /* Control of LEDs */ 1205 EC_FEATURE_LED = 5, 1206 /* Exposes an interface to control gyro and sensors. 1207 * The host goes through the EC to access these sensors. 1208 * In addition, the EC may provide composite sensors, like lid angle. 1209 */ 1210 EC_FEATURE_MOTION_SENSE = 6, 1211 /* The keyboard is controlled by the EC */ 1212 EC_FEATURE_KEYB = 7, 1213 /* The AP can use part of the EC flash as persistent storage. */ 1214 EC_FEATURE_PSTORE = 8, 1215 /* The EC monitors BIOS port 80h, and can return POST codes. */ 1216 EC_FEATURE_PORT80 = 9, 1217 /* 1218 * Thermal management: include TMP specific commands. 1219 * Higher level than direct fan control. 1220 */ 1221 EC_FEATURE_THERMAL = 10, 1222 /* Can switch the screen backlight on/off */ 1223 EC_FEATURE_BKLIGHT_SWITCH = 11, 1224 /* Can switch the wifi module on/off */ 1225 EC_FEATURE_WIFI_SWITCH = 12, 1226 /* Monitor host events, through for example SMI or SCI */ 1227 EC_FEATURE_HOST_EVENTS = 13, 1228 /* The EC exposes GPIO commands to control/monitor connected devices. */ 1229 EC_FEATURE_GPIO = 14, 1230 /* The EC can send i2c messages to downstream devices. */ 1231 EC_FEATURE_I2C = 15, 1232 /* Command to control charger are included */ 1233 EC_FEATURE_CHARGER = 16, 1234 /* Simple battery support. */ 1235 EC_FEATURE_BATTERY = 17, 1236 /* 1237 * Support Smart battery protocol 1238 * (Common Smart Battery System Interface Specification) 1239 */ 1240 EC_FEATURE_SMART_BATTERY = 18, 1241 /* EC can detect when the host hangs. */ 1242 EC_FEATURE_HANG_DETECT = 19, 1243 /* Report power information, for pit only */ 1244 EC_FEATURE_PMU = 20, 1245 /* Another Cros EC device is present downstream of this one */ 1246 EC_FEATURE_SUB_MCU = 21, 1247 /* Support USB Power delivery (PD) commands */ 1248 EC_FEATURE_USB_PD = 22, 1249 /* Control USB multiplexer, for audio through USB port for instance. */ 1250 EC_FEATURE_USB_MUX = 23, 1251 /* Motion Sensor code has an internal software FIFO */ 1252 EC_FEATURE_MOTION_SENSE_FIFO = 24, 1253 /* Support temporary secure vstore */ 1254 EC_FEATURE_VSTORE = 25, 1255 /* EC decides on USB-C SS mux state, muxes configured by host */ 1256 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, 1257 /* EC has RTC feature that can be controlled by host commands */ 1258 EC_FEATURE_RTC = 27, 1259 /* The MCU exposes a Fingerprint sensor */ 1260 EC_FEATURE_FINGERPRINT = 28, 1261 /* The MCU exposes a Touchpad */ 1262 EC_FEATURE_TOUCHPAD = 29, 1263 /* The MCU has RWSIG task enabled */ 1264 EC_FEATURE_RWSIG = 30, 1265 /* EC has device events support */ 1266 EC_FEATURE_DEVICE_EVENT = 31, 1267 /* EC supports the unified wake masks for LPC/eSPI systems */ 1268 EC_FEATURE_UNIFIED_WAKE_MASKS = 32, 1269 /* EC supports 64-bit host events */ 1270 EC_FEATURE_HOST_EVENT64 = 33, 1271 /* EC runs code in RAM (not in place, a.k.a. XIP) */ 1272 EC_FEATURE_EXEC_IN_RAM = 34, 1273 /* EC supports CEC commands */ 1274 EC_FEATURE_CEC = 35, 1275 /* EC supports tight sensor timestamping. */ 1276 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36, 1277 /* 1278 * EC supports tablet mode detection aligned to Chrome and allows 1279 * setting of threshold by host command using 1280 * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. 1281 */ 1282 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, 1283 /* The MCU is a System Companion Processor (SCP). */ 1284 EC_FEATURE_SCP = 39, 1285 /* The MCU is an Integrated Sensor Hub */ 1286 EC_FEATURE_ISH = 40, 1287 /* New TCPMv2 TYPEC_ prefaced commands supported */ 1288 EC_FEATURE_TYPEC_CMD = 41, 1289 /* 1290 * The EC will wait for direction from the AP to enter Type-C alternate 1291 * modes or USB4. 1292 */ 1293 EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42, 1294 /* 1295 * The EC will wait for an acknowledge from the AP after setting the 1296 * mux. 1297 */ 1298 EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43, 1299 }; 1300 1301 #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) 1302 #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32) 1303 1304 struct ec_response_get_features { 1305 uint32_t flags[2]; 1306 } __ec_align4; 1307 1308 /*****************************************************************************/ 1309 /* Get the board's SKU ID from EC */ 1310 #define EC_CMD_GET_SKU_ID 0x000E 1311 1312 /* Set SKU ID from AP */ 1313 #define EC_CMD_SET_SKU_ID 0x000F 1314 1315 struct ec_sku_id_info { 1316 uint32_t sku_id; 1317 } __ec_align4; 1318 1319 /*****************************************************************************/ 1320 /* Flash commands */ 1321 1322 /* Get flash info */ 1323 #define EC_CMD_FLASH_INFO 0x0010 1324 #define EC_VER_FLASH_INFO 2 1325 1326 /** 1327 * struct ec_response_flash_info - Response to the flash info command. 1328 * @flash_size: Usable flash size in bytes. 1329 * @write_block_size: Write block size. Write offset and size must be a 1330 * multiple of this. 1331 * @erase_block_size: Erase block size. Erase offset and size must be a 1332 * multiple of this. 1333 * @protect_block_size: Protection block size. Protection offset and size 1334 * must be a multiple of this. 1335 * 1336 * Version 0 returns these fields. 1337 */ 1338 struct ec_response_flash_info { 1339 uint32_t flash_size; 1340 uint32_t write_block_size; 1341 uint32_t erase_block_size; 1342 uint32_t protect_block_size; 1343 } __ec_align4; 1344 1345 /* 1346 * Flags for version 1+ flash info command 1347 * EC flash erases bits to 0 instead of 1. 1348 */ 1349 #define EC_FLASH_INFO_ERASE_TO_0 BIT(0) 1350 1351 /* 1352 * Flash must be selected for read/write/erase operations to succeed. This may 1353 * be necessary on a chip where write/erase can be corrupted by other board 1354 * activity, or where the chip needs to enable some sort of programming voltage, 1355 * or where the read/write/erase operations require cleanly suspending other 1356 * chip functionality. 1357 */ 1358 #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1) 1359 1360 /** 1361 * struct ec_response_flash_info_1 - Response to the flash info v1 command. 1362 * @flash_size: Usable flash size in bytes. 1363 * @write_block_size: Write block size. Write offset and size must be a 1364 * multiple of this. 1365 * @erase_block_size: Erase block size. Erase offset and size must be a 1366 * multiple of this. 1367 * @protect_block_size: Protection block size. Protection offset and size 1368 * must be a multiple of this. 1369 * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if 1370 * size is exactly this and offset is a multiple of this. 1371 * For example, an EC may have a write buffer which can do 1372 * half-page operations if data is aligned, and a slower 1373 * word-at-a-time write mode. 1374 * @flags: Flags; see EC_FLASH_INFO_* 1375 * 1376 * Version 1 returns the same initial fields as version 0, with additional 1377 * fields following. 1378 * 1379 * gcc anonymous structs don't seem to get along with the __packed directive; 1380 * if they did we'd define the version 0 structure as a sub-structure of this 1381 * one. 1382 * 1383 * Version 2 supports flash banks of different sizes: 1384 * The caller specified the number of banks it has preallocated 1385 * (num_banks_desc) 1386 * The EC returns the number of banks describing the flash memory. 1387 * It adds banks descriptions up to num_banks_desc. 1388 */ 1389 struct ec_response_flash_info_1 { 1390 /* Version 0 fields; see above for description */ 1391 uint32_t flash_size; 1392 uint32_t write_block_size; 1393 uint32_t erase_block_size; 1394 uint32_t protect_block_size; 1395 1396 /* Version 1 adds these fields: */ 1397 uint32_t write_ideal_size; 1398 uint32_t flags; 1399 } __ec_align4; 1400 1401 struct ec_params_flash_info_2 { 1402 /* Number of banks to describe */ 1403 uint16_t num_banks_desc; 1404 /* Reserved; set 0; ignore on read */ 1405 uint8_t reserved[2]; 1406 } __ec_align4; 1407 1408 struct ec_flash_bank { 1409 /* Number of sector is in this bank. */ 1410 uint16_t count; 1411 /* Size in power of 2 of each sector (8 --> 256 bytes) */ 1412 uint8_t size_exp; 1413 /* Minimal write size for the sectors in this bank */ 1414 uint8_t write_size_exp; 1415 /* Erase size for the sectors in this bank */ 1416 uint8_t erase_size_exp; 1417 /* Size for write protection, usually identical to erase size. */ 1418 uint8_t protect_size_exp; 1419 /* Reserved; set 0; ignore on read */ 1420 uint8_t reserved[2]; 1421 }; 1422 1423 struct ec_response_flash_info_2 { 1424 /* Total flash in the EC. */ 1425 uint32_t flash_size; 1426 /* Flags; see EC_FLASH_INFO_* */ 1427 uint32_t flags; 1428 /* Maximum size to use to send data to write to the EC. */ 1429 uint32_t write_ideal_size; 1430 /* Number of banks present in the EC. */ 1431 uint16_t num_banks_total; 1432 /* Number of banks described in banks array. */ 1433 uint16_t num_banks_desc; 1434 struct ec_flash_bank banks[]; 1435 } __ec_align4; 1436 1437 /* 1438 * Read flash 1439 * 1440 * Response is params.size bytes of data. 1441 */ 1442 #define EC_CMD_FLASH_READ 0x0011 1443 1444 /** 1445 * struct ec_params_flash_read - Parameters for the flash read command. 1446 * @offset: Byte offset to read. 1447 * @size: Size to read in bytes. 1448 */ 1449 struct ec_params_flash_read { 1450 uint32_t offset; 1451 uint32_t size; 1452 } __ec_align4; 1453 1454 /* Write flash */ 1455 #define EC_CMD_FLASH_WRITE 0x0012 1456 #define EC_VER_FLASH_WRITE 1 1457 1458 /* Version 0 of the flash command supported only 64 bytes of data */ 1459 #define EC_FLASH_WRITE_VER0_SIZE 64 1460 1461 /** 1462 * struct ec_params_flash_write - Parameters for the flash write command. 1463 * @offset: Byte offset to write. 1464 * @size: Size to write in bytes. 1465 */ 1466 struct ec_params_flash_write { 1467 uint32_t offset; 1468 uint32_t size; 1469 /* Followed by data to write */ 1470 } __ec_align4; 1471 1472 /* Erase flash */ 1473 #define EC_CMD_FLASH_ERASE 0x0013 1474 1475 /** 1476 * struct ec_params_flash_erase - Parameters for the flash erase command, v0. 1477 * @offset: Byte offset to erase. 1478 * @size: Size to erase in bytes. 1479 */ 1480 struct ec_params_flash_erase { 1481 uint32_t offset; 1482 uint32_t size; 1483 } __ec_align4; 1484 1485 /* 1486 * v1 add async erase: 1487 * subcommands can returns: 1488 * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). 1489 * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. 1490 * EC_RES_ERROR : other errors. 1491 * EC_RES_BUSY : an existing erase operation is in progress. 1492 * EC_RES_ACCESS_DENIED: Trying to erase running image. 1493 * 1494 * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just 1495 * properly queued. The user must call ERASE_GET_RESULT subcommand to get 1496 * the proper result. 1497 * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send 1498 * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. 1499 * ERASE_GET_RESULT command may timeout on EC where flash access is not 1500 * permitted while erasing. (For instance, STM32F4). 1501 */ 1502 enum ec_flash_erase_cmd { 1503 FLASH_ERASE_SECTOR, /* Erase and wait for result */ 1504 FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ 1505 FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ 1506 }; 1507 1508 /** 1509 * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1. 1510 * @cmd: One of ec_flash_erase_cmd. 1511 * @reserved: Pad byte; currently always contains 0. 1512 * @flag: No flags defined yet; set to 0. 1513 * @params: Same as v0 parameters. 1514 */ 1515 struct ec_params_flash_erase_v1 { 1516 uint8_t cmd; 1517 uint8_t reserved; 1518 uint16_t flag; 1519 struct ec_params_flash_erase params; 1520 } __ec_align4; 1521 1522 /* 1523 * Get/set flash protection. 1524 * 1525 * If mask!=0, sets/clear the requested bits of flags. Depending on the 1526 * firmware write protect GPIO, not all flags will take effect immediately; 1527 * some flags require a subsequent hard reset to take effect. Check the 1528 * returned flags bits to see what actually happened. 1529 * 1530 * If mask=0, simply returns the current flags state. 1531 */ 1532 #define EC_CMD_FLASH_PROTECT 0x0015 1533 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ 1534 1535 /* Flags for flash protection */ 1536 /* RO flash code protected when the EC boots */ 1537 #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0) 1538 /* 1539 * RO flash code protected now. If this bit is set, at-boot status cannot 1540 * be changed. 1541 */ 1542 #define EC_FLASH_PROTECT_RO_NOW BIT(1) 1543 /* Entire flash code protected now, until reboot. */ 1544 #define EC_FLASH_PROTECT_ALL_NOW BIT(2) 1545 /* Flash write protect GPIO is asserted now */ 1546 #define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3) 1547 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ 1548 #define EC_FLASH_PROTECT_ERROR_STUCK BIT(4) 1549 /* 1550 * Error - flash protection is in inconsistent state. At least one bank of 1551 * flash which should be protected is not protected. Usually fixed by 1552 * re-requesting the desired flags, or by a hard reset if that fails. 1553 */ 1554 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5) 1555 /* Entire flash code protected when the EC boots */ 1556 #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6) 1557 /* RW flash code protected when the EC boots */ 1558 #define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7) 1559 /* RW flash code protected now. */ 1560 #define EC_FLASH_PROTECT_RW_NOW BIT(8) 1561 /* Rollback information flash region protected when the EC boots */ 1562 #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9) 1563 /* Rollback information flash region protected now */ 1564 #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10) 1565 1566 1567 /** 1568 * struct ec_params_flash_protect - Parameters for the flash protect command. 1569 * @mask: Bits in flags to apply. 1570 * @flags: New flags to apply. 1571 */ 1572 struct ec_params_flash_protect { 1573 uint32_t mask; 1574 uint32_t flags; 1575 } __ec_align4; 1576 1577 /** 1578 * struct ec_response_flash_protect - Response to the flash protect command. 1579 * @flags: Current value of flash protect flags. 1580 * @valid_flags: Flags which are valid on this platform. This allows the 1581 * caller to distinguish between flags which aren't set vs. flags 1582 * which can't be set on this platform. 1583 * @writable_flags: Flags which can be changed given the current protection 1584 * state. 1585 */ 1586 struct ec_response_flash_protect { 1587 uint32_t flags; 1588 uint32_t valid_flags; 1589 uint32_t writable_flags; 1590 } __ec_align4; 1591 1592 /* 1593 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash 1594 * write protect. These commands may be reused with version > 0. 1595 */ 1596 1597 /* Get the region offset/size */ 1598 #define EC_CMD_FLASH_REGION_INFO 0x0016 1599 #define EC_VER_FLASH_REGION_INFO 1 1600 1601 enum ec_flash_region { 1602 /* Region which holds read-only EC image */ 1603 EC_FLASH_REGION_RO = 0, 1604 /* 1605 * Region which holds active RW image. 'Active' is different from 1606 * 'running'. Active means 'scheduled-to-run'. Since RO image always 1607 * scheduled to run, active/non-active applies only to RW images (for 1608 * the same reason 'update' applies only to RW images. It's a state of 1609 * an image on a flash. Running image can be RO, RW_A, RW_B but active 1610 * image can only be RW_A or RW_B. In recovery mode, an active RW image 1611 * doesn't enter 'running' state but it's still active on a flash. 1612 */ 1613 EC_FLASH_REGION_ACTIVE, 1614 /* 1615 * Region which should be write-protected in the factory (a superset of 1616 * EC_FLASH_REGION_RO) 1617 */ 1618 EC_FLASH_REGION_WP_RO, 1619 /* Region which holds updatable (non-active) RW image */ 1620 EC_FLASH_REGION_UPDATE, 1621 /* Number of regions */ 1622 EC_FLASH_REGION_COUNT, 1623 }; 1624 /* 1625 * 'RW' is vague if there are multiple RW images; we mean the active one, 1626 * so the old constant is deprecated. 1627 */ 1628 #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE 1629 1630 /** 1631 * struct ec_params_flash_region_info - Parameters for the flash region info 1632 * command. 1633 * @region: Flash region; see EC_FLASH_REGION_* 1634 */ 1635 struct ec_params_flash_region_info { 1636 uint32_t region; 1637 } __ec_align4; 1638 1639 struct ec_response_flash_region_info { 1640 uint32_t offset; 1641 uint32_t size; 1642 } __ec_align4; 1643 1644 /* Read/write VbNvContext */ 1645 #define EC_CMD_VBNV_CONTEXT 0x0017 1646 #define EC_VER_VBNV_CONTEXT 1 1647 #define EC_VBNV_BLOCK_SIZE 16 1648 1649 enum ec_vbnvcontext_op { 1650 EC_VBNV_CONTEXT_OP_READ, 1651 EC_VBNV_CONTEXT_OP_WRITE, 1652 }; 1653 1654 struct ec_params_vbnvcontext { 1655 uint32_t op; 1656 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1657 } __ec_align4; 1658 1659 struct ec_response_vbnvcontext { 1660 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1661 } __ec_align4; 1662 1663 1664 /* Get SPI flash information */ 1665 #define EC_CMD_FLASH_SPI_INFO 0x0018 1666 1667 struct ec_response_flash_spi_info { 1668 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ 1669 uint8_t jedec[3]; 1670 1671 /* Pad byte; currently always contains 0 */ 1672 uint8_t reserved0; 1673 1674 /* Manufacturer / device ID from command 0x90 */ 1675 uint8_t mfr_dev_id[2]; 1676 1677 /* Status registers from command 0x05 and 0x35 */ 1678 uint8_t sr1, sr2; 1679 } __ec_align1; 1680 1681 1682 /* Select flash during flash operations */ 1683 #define EC_CMD_FLASH_SELECT 0x0019 1684 1685 /** 1686 * struct ec_params_flash_select - Parameters for the flash select command. 1687 * @select: 1 to select flash, 0 to deselect flash 1688 */ 1689 struct ec_params_flash_select { 1690 uint8_t select; 1691 } __ec_align4; 1692 1693 1694 /*****************************************************************************/ 1695 /* PWM commands */ 1696 1697 /* Get fan target RPM */ 1698 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 1699 1700 struct ec_response_pwm_get_fan_rpm { 1701 uint32_t rpm; 1702 } __ec_align4; 1703 1704 /* Set target fan RPM */ 1705 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 1706 1707 /* Version 0 of input params */ 1708 struct ec_params_pwm_set_fan_target_rpm_v0 { 1709 uint32_t rpm; 1710 } __ec_align4; 1711 1712 /* Version 1 of input params */ 1713 struct ec_params_pwm_set_fan_target_rpm_v1 { 1714 uint32_t rpm; 1715 uint8_t fan_idx; 1716 } __ec_align_size1; 1717 1718 /* Get keyboard backlight */ 1719 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1720 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 1721 1722 struct ec_response_pwm_get_keyboard_backlight { 1723 uint8_t percent; 1724 uint8_t enabled; 1725 } __ec_align1; 1726 1727 /* Set keyboard backlight */ 1728 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1729 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 1730 1731 struct ec_params_pwm_set_keyboard_backlight { 1732 uint8_t percent; 1733 } __ec_align1; 1734 1735 /* Set target fan PWM duty cycle */ 1736 #define EC_CMD_PWM_SET_FAN_DUTY 0x0024 1737 1738 /* Version 0 of input params */ 1739 struct ec_params_pwm_set_fan_duty_v0 { 1740 uint32_t percent; 1741 } __ec_align4; 1742 1743 /* Version 1 of input params */ 1744 struct ec_params_pwm_set_fan_duty_v1 { 1745 uint32_t percent; 1746 uint8_t fan_idx; 1747 } __ec_align_size1; 1748 1749 #define EC_CMD_PWM_SET_DUTY 0x0025 1750 /* 16 bit duty cycle, 0xffff = 100% */ 1751 #define EC_PWM_MAX_DUTY 0xffff 1752 1753 enum ec_pwm_type { 1754 /* All types, indexed by board-specific enum pwm_channel */ 1755 EC_PWM_TYPE_GENERIC = 0, 1756 /* Keyboard backlight */ 1757 EC_PWM_TYPE_KB_LIGHT, 1758 /* Display backlight */ 1759 EC_PWM_TYPE_DISPLAY_LIGHT, 1760 EC_PWM_TYPE_COUNT, 1761 }; 1762 1763 struct ec_params_pwm_set_duty { 1764 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1765 uint8_t pwm_type; /* ec_pwm_type */ 1766 uint8_t index; /* Type-specific index, or 0 if unique */ 1767 } __ec_align4; 1768 1769 #define EC_CMD_PWM_GET_DUTY 0x0026 1770 1771 struct ec_params_pwm_get_duty { 1772 uint8_t pwm_type; /* ec_pwm_type */ 1773 uint8_t index; /* Type-specific index, or 0 if unique */ 1774 } __ec_align1; 1775 1776 struct ec_response_pwm_get_duty { 1777 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1778 } __ec_align2; 1779 1780 /*****************************************************************************/ 1781 /* 1782 * Lightbar commands. This looks worse than it is. Since we only use one HOST 1783 * command to say "talk to the lightbar", we put the "and tell it to do X" part 1784 * into a subcommand. We'll make separate structs for subcommands with 1785 * different input args, so that we know how much to expect. 1786 */ 1787 #define EC_CMD_LIGHTBAR_CMD 0x0028 1788 1789 struct rgb_s { 1790 uint8_t r, g, b; 1791 } __ec_todo_unpacked; 1792 1793 #define LB_BATTERY_LEVELS 4 1794 1795 /* 1796 * List of tweakable parameters. NOTE: It's __packed so it can be sent in a 1797 * host command, but the alignment is the same regardless. Keep it that way. 1798 */ 1799 struct lightbar_params_v0 { 1800 /* Timing */ 1801 int32_t google_ramp_up; 1802 int32_t google_ramp_down; 1803 int32_t s3s0_ramp_up; 1804 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1805 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1806 int32_t s0s3_ramp_down; 1807 int32_t s3_sleep_for; 1808 int32_t s3_ramp_up; 1809 int32_t s3_ramp_down; 1810 1811 /* Oscillation */ 1812 uint8_t new_s0; 1813 uint8_t osc_min[2]; /* AC=0/1 */ 1814 uint8_t osc_max[2]; /* AC=0/1 */ 1815 uint8_t w_ofs[2]; /* AC=0/1 */ 1816 1817 /* Brightness limits based on the backlight and AC. */ 1818 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1819 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1820 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1821 1822 /* Battery level thresholds */ 1823 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1824 1825 /* Map [AC][battery_level] to color index */ 1826 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1827 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1828 1829 /* Color palette */ 1830 struct rgb_s color[8]; /* 0-3 are Google colors */ 1831 } __ec_todo_packed; 1832 1833 struct lightbar_params_v1 { 1834 /* Timing */ 1835 int32_t google_ramp_up; 1836 int32_t google_ramp_down; 1837 int32_t s3s0_ramp_up; 1838 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1839 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1840 int32_t s0s3_ramp_down; 1841 int32_t s3_sleep_for; 1842 int32_t s3_ramp_up; 1843 int32_t s3_ramp_down; 1844 int32_t s5_ramp_up; 1845 int32_t s5_ramp_down; 1846 int32_t tap_tick_delay; 1847 int32_t tap_gate_delay; 1848 int32_t tap_display_time; 1849 1850 /* Tap-for-battery params */ 1851 uint8_t tap_pct_red; 1852 uint8_t tap_pct_green; 1853 uint8_t tap_seg_min_on; 1854 uint8_t tap_seg_max_on; 1855 uint8_t tap_seg_osc; 1856 uint8_t tap_idx[3]; 1857 1858 /* Oscillation */ 1859 uint8_t osc_min[2]; /* AC=0/1 */ 1860 uint8_t osc_max[2]; /* AC=0/1 */ 1861 uint8_t w_ofs[2]; /* AC=0/1 */ 1862 1863 /* Brightness limits based on the backlight and AC. */ 1864 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1865 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1866 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1867 1868 /* Battery level thresholds */ 1869 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1870 1871 /* Map [AC][battery_level] to color index */ 1872 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1873 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1874 1875 /* s5: single color pulse on inhibited power-up */ 1876 uint8_t s5_idx; 1877 1878 /* Color palette */ 1879 struct rgb_s color[8]; /* 0-3 are Google colors */ 1880 } __ec_todo_packed; 1881 1882 /* Lightbar command params v2 1883 * crbug.com/467716 1884 * 1885 * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by 1886 * logical groups to make it more manageable ( < 120 bytes). 1887 * 1888 * NOTE: Each of these groups must be less than 120 bytes. 1889 */ 1890 1891 struct lightbar_params_v2_timing { 1892 /* Timing */ 1893 int32_t google_ramp_up; 1894 int32_t google_ramp_down; 1895 int32_t s3s0_ramp_up; 1896 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1897 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1898 int32_t s0s3_ramp_down; 1899 int32_t s3_sleep_for; 1900 int32_t s3_ramp_up; 1901 int32_t s3_ramp_down; 1902 int32_t s5_ramp_up; 1903 int32_t s5_ramp_down; 1904 int32_t tap_tick_delay; 1905 int32_t tap_gate_delay; 1906 int32_t tap_display_time; 1907 } __ec_todo_packed; 1908 1909 struct lightbar_params_v2_tap { 1910 /* Tap-for-battery params */ 1911 uint8_t tap_pct_red; 1912 uint8_t tap_pct_green; 1913 uint8_t tap_seg_min_on; 1914 uint8_t tap_seg_max_on; 1915 uint8_t tap_seg_osc; 1916 uint8_t tap_idx[3]; 1917 } __ec_todo_packed; 1918 1919 struct lightbar_params_v2_oscillation { 1920 /* Oscillation */ 1921 uint8_t osc_min[2]; /* AC=0/1 */ 1922 uint8_t osc_max[2]; /* AC=0/1 */ 1923 uint8_t w_ofs[2]; /* AC=0/1 */ 1924 } __ec_todo_packed; 1925 1926 struct lightbar_params_v2_brightness { 1927 /* Brightness limits based on the backlight and AC. */ 1928 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1929 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1930 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1931 } __ec_todo_packed; 1932 1933 struct lightbar_params_v2_thresholds { 1934 /* Battery level thresholds */ 1935 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1936 } __ec_todo_packed; 1937 1938 struct lightbar_params_v2_colors { 1939 /* Map [AC][battery_level] to color index */ 1940 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1941 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1942 1943 /* s5: single color pulse on inhibited power-up */ 1944 uint8_t s5_idx; 1945 1946 /* Color palette */ 1947 struct rgb_s color[8]; /* 0-3 are Google colors */ 1948 } __ec_todo_packed; 1949 1950 /* Lightbar program. */ 1951 #define EC_LB_PROG_LEN 192 1952 struct lightbar_program { 1953 uint8_t size; 1954 uint8_t data[EC_LB_PROG_LEN]; 1955 } __ec_todo_unpacked; 1956 1957 struct ec_params_lightbar { 1958 uint8_t cmd; /* Command (see enum lightbar_command) */ 1959 union { 1960 /* 1961 * The following commands have no args: 1962 * 1963 * dump, off, on, init, get_seq, get_params_v0, get_params_v1, 1964 * version, get_brightness, get_demo, suspend, resume, 1965 * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc, 1966 * get_params_v2_bright, get_params_v2_thlds, 1967 * get_params_v2_colors 1968 * 1969 * Don't use an empty struct, because C++ hates that. 1970 */ 1971 1972 struct __ec_todo_unpacked { 1973 uint8_t num; 1974 } set_brightness, seq, demo; 1975 1976 struct __ec_todo_unpacked { 1977 uint8_t ctrl, reg, value; 1978 } reg; 1979 1980 struct __ec_todo_unpacked { 1981 uint8_t led, red, green, blue; 1982 } set_rgb; 1983 1984 struct __ec_todo_unpacked { 1985 uint8_t led; 1986 } get_rgb; 1987 1988 struct __ec_todo_unpacked { 1989 uint8_t enable; 1990 } manual_suspend_ctrl; 1991 1992 struct lightbar_params_v0 set_params_v0; 1993 struct lightbar_params_v1 set_params_v1; 1994 1995 struct lightbar_params_v2_timing set_v2par_timing; 1996 struct lightbar_params_v2_tap set_v2par_tap; 1997 struct lightbar_params_v2_oscillation set_v2par_osc; 1998 struct lightbar_params_v2_brightness set_v2par_bright; 1999 struct lightbar_params_v2_thresholds set_v2par_thlds; 2000 struct lightbar_params_v2_colors set_v2par_colors; 2001 2002 struct lightbar_program set_program; 2003 }; 2004 } __ec_todo_packed; 2005 2006 struct ec_response_lightbar { 2007 union { 2008 struct __ec_todo_unpacked { 2009 struct __ec_todo_unpacked { 2010 uint8_t reg; 2011 uint8_t ic0; 2012 uint8_t ic1; 2013 } vals[23]; 2014 } dump; 2015 2016 struct __ec_todo_unpacked { 2017 uint8_t num; 2018 } get_seq, get_brightness, get_demo; 2019 2020 struct lightbar_params_v0 get_params_v0; 2021 struct lightbar_params_v1 get_params_v1; 2022 2023 2024 struct lightbar_params_v2_timing get_params_v2_timing; 2025 struct lightbar_params_v2_tap get_params_v2_tap; 2026 struct lightbar_params_v2_oscillation get_params_v2_osc; 2027 struct lightbar_params_v2_brightness get_params_v2_bright; 2028 struct lightbar_params_v2_thresholds get_params_v2_thlds; 2029 struct lightbar_params_v2_colors get_params_v2_colors; 2030 2031 struct __ec_todo_unpacked { 2032 uint32_t num; 2033 uint32_t flags; 2034 } version; 2035 2036 struct __ec_todo_unpacked { 2037 uint8_t red, green, blue; 2038 } get_rgb; 2039 2040 /* 2041 * The following commands have no response: 2042 * 2043 * off, on, init, set_brightness, seq, reg, set_rgb, demo, 2044 * set_params_v0, set_params_v1, set_program, 2045 * manual_suspend_ctrl, suspend, resume, set_v2par_timing, 2046 * set_v2par_tap, set_v2par_osc, set_v2par_bright, 2047 * set_v2par_thlds, set_v2par_colors 2048 */ 2049 }; 2050 } __ec_todo_packed; 2051 2052 /* Lightbar commands */ 2053 enum lightbar_command { 2054 LIGHTBAR_CMD_DUMP = 0, 2055 LIGHTBAR_CMD_OFF = 1, 2056 LIGHTBAR_CMD_ON = 2, 2057 LIGHTBAR_CMD_INIT = 3, 2058 LIGHTBAR_CMD_SET_BRIGHTNESS = 4, 2059 LIGHTBAR_CMD_SEQ = 5, 2060 LIGHTBAR_CMD_REG = 6, 2061 LIGHTBAR_CMD_SET_RGB = 7, 2062 LIGHTBAR_CMD_GET_SEQ = 8, 2063 LIGHTBAR_CMD_DEMO = 9, 2064 LIGHTBAR_CMD_GET_PARAMS_V0 = 10, 2065 LIGHTBAR_CMD_SET_PARAMS_V0 = 11, 2066 LIGHTBAR_CMD_VERSION = 12, 2067 LIGHTBAR_CMD_GET_BRIGHTNESS = 13, 2068 LIGHTBAR_CMD_GET_RGB = 14, 2069 LIGHTBAR_CMD_GET_DEMO = 15, 2070 LIGHTBAR_CMD_GET_PARAMS_V1 = 16, 2071 LIGHTBAR_CMD_SET_PARAMS_V1 = 17, 2072 LIGHTBAR_CMD_SET_PROGRAM = 18, 2073 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, 2074 LIGHTBAR_CMD_SUSPEND = 20, 2075 LIGHTBAR_CMD_RESUME = 21, 2076 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, 2077 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, 2078 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, 2079 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, 2080 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, 2081 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, 2082 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, 2083 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, 2084 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, 2085 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, 2086 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, 2087 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, 2088 LIGHTBAR_NUM_CMDS 2089 }; 2090 2091 /*****************************************************************************/ 2092 /* LED control commands */ 2093 2094 #define EC_CMD_LED_CONTROL 0x0029 2095 2096 enum ec_led_id { 2097 /* LED to indicate battery state of charge */ 2098 EC_LED_ID_BATTERY_LED = 0, 2099 /* 2100 * LED to indicate system power state (on or in suspend). 2101 * May be on power button or on C-panel. 2102 */ 2103 EC_LED_ID_POWER_LED, 2104 /* LED on power adapter or its plug */ 2105 EC_LED_ID_ADAPTER_LED, 2106 /* LED to indicate left side */ 2107 EC_LED_ID_LEFT_LED, 2108 /* LED to indicate right side */ 2109 EC_LED_ID_RIGHT_LED, 2110 /* LED to indicate recovery mode with HW_REINIT */ 2111 EC_LED_ID_RECOVERY_HW_REINIT_LED, 2112 /* LED to indicate sysrq debug mode. */ 2113 EC_LED_ID_SYSRQ_DEBUG_LED, 2114 2115 EC_LED_ID_COUNT 2116 }; 2117 2118 /* LED control flags */ 2119 #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */ 2120 #define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */ 2121 2122 enum ec_led_colors { 2123 EC_LED_COLOR_RED = 0, 2124 EC_LED_COLOR_GREEN, 2125 EC_LED_COLOR_BLUE, 2126 EC_LED_COLOR_YELLOW, 2127 EC_LED_COLOR_WHITE, 2128 EC_LED_COLOR_AMBER, 2129 2130 EC_LED_COLOR_COUNT 2131 }; 2132 2133 struct ec_params_led_control { 2134 uint8_t led_id; /* Which LED to control */ 2135 uint8_t flags; /* Control flags */ 2136 2137 uint8_t brightness[EC_LED_COLOR_COUNT]; 2138 } __ec_align1; 2139 2140 struct ec_response_led_control { 2141 /* 2142 * Available brightness value range. 2143 * 2144 * Range 0 means color channel not present. 2145 * Range 1 means on/off control. 2146 * Other values means the LED is control by PWM. 2147 */ 2148 uint8_t brightness_range[EC_LED_COLOR_COUNT]; 2149 } __ec_align1; 2150 2151 /*****************************************************************************/ 2152 /* Verified boot commands */ 2153 2154 /* 2155 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be 2156 * reused for other purposes with version > 0. 2157 */ 2158 2159 /* Verified boot hash command */ 2160 #define EC_CMD_VBOOT_HASH 0x002A 2161 2162 struct ec_params_vboot_hash { 2163 uint8_t cmd; /* enum ec_vboot_hash_cmd */ 2164 uint8_t hash_type; /* enum ec_vboot_hash_type */ 2165 uint8_t nonce_size; /* Nonce size; may be 0 */ 2166 uint8_t reserved0; /* Reserved; set 0 */ 2167 uint32_t offset; /* Offset in flash to hash */ 2168 uint32_t size; /* Number of bytes to hash */ 2169 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ 2170 } __ec_align4; 2171 2172 struct ec_response_vboot_hash { 2173 uint8_t status; /* enum ec_vboot_hash_status */ 2174 uint8_t hash_type; /* enum ec_vboot_hash_type */ 2175 uint8_t digest_size; /* Size of hash digest in bytes */ 2176 uint8_t reserved0; /* Ignore; will be 0 */ 2177 uint32_t offset; /* Offset in flash which was hashed */ 2178 uint32_t size; /* Number of bytes hashed */ 2179 uint8_t hash_digest[64]; /* Hash digest data */ 2180 } __ec_align4; 2181 2182 enum ec_vboot_hash_cmd { 2183 EC_VBOOT_HASH_GET = 0, /* Get current hash status */ 2184 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ 2185 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ 2186 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ 2187 }; 2188 2189 enum ec_vboot_hash_type { 2190 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ 2191 }; 2192 2193 enum ec_vboot_hash_status { 2194 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ 2195 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ 2196 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ 2197 }; 2198 2199 /* 2200 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. 2201 * If one of these is specified, the EC will automatically update offset and 2202 * size to the correct values for the specified image (RO or RW). 2203 */ 2204 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe 2205 #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd 2206 #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc 2207 2208 /* 2209 * 'RW' is vague if there are multiple RW images; we mean the active one, 2210 * so the old constant is deprecated. 2211 */ 2212 #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE 2213 2214 /*****************************************************************************/ 2215 /* 2216 * Motion sense commands. We'll make separate structs for sub-commands with 2217 * different input args, so that we know how much to expect. 2218 */ 2219 #define EC_CMD_MOTION_SENSE_CMD 0x002B 2220 2221 /* Motion sense commands */ 2222 enum motionsense_command { 2223 /* 2224 * Dump command returns all motion sensor data including motion sense 2225 * module flags and individual sensor flags. 2226 */ 2227 MOTIONSENSE_CMD_DUMP = 0, 2228 2229 /* 2230 * Info command returns data describing the details of a given sensor, 2231 * including enum motionsensor_type, enum motionsensor_location, and 2232 * enum motionsensor_chip. 2233 */ 2234 MOTIONSENSE_CMD_INFO = 1, 2235 2236 /* 2237 * EC Rate command is a setter/getter command for the EC sampling rate 2238 * in milliseconds. 2239 * It is per sensor, the EC run sample task at the minimum of all 2240 * sensors EC_RATE. 2241 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR 2242 * to collect all the sensor samples. 2243 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay 2244 * to process of all motion sensors in milliseconds. 2245 */ 2246 MOTIONSENSE_CMD_EC_RATE = 2, 2247 2248 /* 2249 * Sensor ODR command is a setter/getter command for the output data 2250 * rate of a specific motion sensor in millihertz. 2251 */ 2252 MOTIONSENSE_CMD_SENSOR_ODR = 3, 2253 2254 /* 2255 * Sensor range command is a setter/getter command for the range of 2256 * a specified motion sensor in +/-G's or +/- deg/s. 2257 */ 2258 MOTIONSENSE_CMD_SENSOR_RANGE = 4, 2259 2260 /* 2261 * Setter/getter command for the keyboard wake angle. When the lid 2262 * angle is greater than this value, keyboard wake is disabled in S3, 2263 * and when the lid angle goes less than this value, keyboard wake is 2264 * enabled. Note, the lid angle measurement is an approximate, 2265 * un-calibrated value, hence the wake angle isn't exact. 2266 */ 2267 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5, 2268 2269 /* 2270 * Returns a single sensor data. 2271 */ 2272 MOTIONSENSE_CMD_DATA = 6, 2273 2274 /* 2275 * Return sensor fifo info. 2276 */ 2277 MOTIONSENSE_CMD_FIFO_INFO = 7, 2278 2279 /* 2280 * Insert a flush element in the fifo and return sensor fifo info. 2281 * The host can use that element to synchronize its operation. 2282 */ 2283 MOTIONSENSE_CMD_FIFO_FLUSH = 8, 2284 2285 /* 2286 * Return a portion of the fifo. 2287 */ 2288 MOTIONSENSE_CMD_FIFO_READ = 9, 2289 2290 /* 2291 * Perform low level calibration. 2292 * On sensors that support it, ask to do offset calibration. 2293 */ 2294 MOTIONSENSE_CMD_PERFORM_CALIB = 10, 2295 2296 /* 2297 * Sensor Offset command is a setter/getter command for the offset 2298 * used for calibration. 2299 * The offsets can be calculated by the host, or via 2300 * PERFORM_CALIB command. 2301 */ 2302 MOTIONSENSE_CMD_SENSOR_OFFSET = 11, 2303 2304 /* 2305 * List available activities for a MOTION sensor. 2306 * Indicates if they are enabled or disabled. 2307 */ 2308 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, 2309 2310 /* 2311 * Activity management 2312 * Enable/Disable activity recognition. 2313 */ 2314 MOTIONSENSE_CMD_SET_ACTIVITY = 13, 2315 2316 /* 2317 * Lid Angle 2318 */ 2319 MOTIONSENSE_CMD_LID_ANGLE = 14, 2320 2321 /* 2322 * Allow the FIFO to trigger interrupt via MKBP events. 2323 * By default the FIFO does not send interrupt to process the FIFO 2324 * until the AP is ready or it is coming from a wakeup sensor. 2325 */ 2326 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, 2327 2328 /* 2329 * Spoof the readings of the sensors. The spoofed readings can be set 2330 * to arbitrary values, or will lock to the last read actual values. 2331 */ 2332 MOTIONSENSE_CMD_SPOOF = 16, 2333 2334 /* Set lid angle for tablet mode detection. */ 2335 MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17, 2336 2337 /* 2338 * Sensor Scale command is a setter/getter command for the calibration 2339 * scale. 2340 */ 2341 MOTIONSENSE_CMD_SENSOR_SCALE = 18, 2342 2343 /* Number of motionsense sub-commands. */ 2344 MOTIONSENSE_NUM_CMDS 2345 }; 2346 2347 /* List of motion sensor types. */ 2348 enum motionsensor_type { 2349 MOTIONSENSE_TYPE_ACCEL = 0, 2350 MOTIONSENSE_TYPE_GYRO = 1, 2351 MOTIONSENSE_TYPE_MAG = 2, 2352 MOTIONSENSE_TYPE_PROX = 3, 2353 MOTIONSENSE_TYPE_LIGHT = 4, 2354 MOTIONSENSE_TYPE_ACTIVITY = 5, 2355 MOTIONSENSE_TYPE_BARO = 6, 2356 MOTIONSENSE_TYPE_SYNC = 7, 2357 MOTIONSENSE_TYPE_MAX, 2358 }; 2359 2360 /* List of motion sensor locations. */ 2361 enum motionsensor_location { 2362 MOTIONSENSE_LOC_BASE = 0, 2363 MOTIONSENSE_LOC_LID = 1, 2364 MOTIONSENSE_LOC_CAMERA = 2, 2365 MOTIONSENSE_LOC_MAX, 2366 }; 2367 2368 /* List of motion sensor chips. */ 2369 enum motionsensor_chip { 2370 MOTIONSENSE_CHIP_KXCJ9 = 0, 2371 MOTIONSENSE_CHIP_LSM6DS0 = 1, 2372 MOTIONSENSE_CHIP_BMI160 = 2, 2373 MOTIONSENSE_CHIP_SI1141 = 3, 2374 MOTIONSENSE_CHIP_SI1142 = 4, 2375 MOTIONSENSE_CHIP_SI1143 = 5, 2376 MOTIONSENSE_CHIP_KX022 = 6, 2377 MOTIONSENSE_CHIP_L3GD20H = 7, 2378 MOTIONSENSE_CHIP_BMA255 = 8, 2379 MOTIONSENSE_CHIP_BMP280 = 9, 2380 MOTIONSENSE_CHIP_OPT3001 = 10, 2381 MOTIONSENSE_CHIP_BH1730 = 11, 2382 MOTIONSENSE_CHIP_GPIO = 12, 2383 MOTIONSENSE_CHIP_LIS2DH = 13, 2384 MOTIONSENSE_CHIP_LSM6DSM = 14, 2385 MOTIONSENSE_CHIP_LIS2DE = 15, 2386 MOTIONSENSE_CHIP_LIS2MDL = 16, 2387 MOTIONSENSE_CHIP_LSM6DS3 = 17, 2388 MOTIONSENSE_CHIP_LSM6DSO = 18, 2389 MOTIONSENSE_CHIP_LNG2DM = 19, 2390 MOTIONSENSE_CHIP_MAX, 2391 }; 2392 2393 /* List of orientation positions */ 2394 enum motionsensor_orientation { 2395 MOTIONSENSE_ORIENTATION_LANDSCAPE = 0, 2396 MOTIONSENSE_ORIENTATION_PORTRAIT = 1, 2397 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2, 2398 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3, 2399 MOTIONSENSE_ORIENTATION_UNKNOWN = 4, 2400 }; 2401 2402 struct ec_response_motion_sensor_data { 2403 /* Flags for each sensor. */ 2404 uint8_t flags; 2405 /* Sensor number the data comes from. */ 2406 uint8_t sensor_num; 2407 /* Each sensor is up to 3-axis. */ 2408 union { 2409 int16_t data[3]; 2410 struct __ec_todo_packed { 2411 uint16_t reserved; 2412 uint32_t timestamp; 2413 }; 2414 struct __ec_todo_unpacked { 2415 uint8_t activity; /* motionsensor_activity */ 2416 uint8_t state; 2417 int16_t add_info[2]; 2418 }; 2419 }; 2420 } __ec_todo_packed; 2421 2422 /* Note: used in ec_response_get_next_data */ 2423 struct ec_response_motion_sense_fifo_info { 2424 /* Size of the fifo */ 2425 uint16_t size; 2426 /* Amount of space used in the fifo */ 2427 uint16_t count; 2428 /* Timestamp recorded in us. 2429 * aka accurate timestamp when host event was triggered. 2430 */ 2431 uint32_t timestamp; 2432 /* Total amount of vector lost */ 2433 uint16_t total_lost; 2434 /* Lost events since the last fifo_info, per sensors */ 2435 uint16_t lost[]; 2436 } __ec_todo_packed; 2437 2438 struct ec_response_motion_sense_fifo_data { 2439 uint32_t number_data; 2440 struct ec_response_motion_sensor_data data[]; 2441 } __ec_todo_packed; 2442 2443 /* List supported activity recognition */ 2444 enum motionsensor_activity { 2445 MOTIONSENSE_ACTIVITY_RESERVED = 0, 2446 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, 2447 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, 2448 MOTIONSENSE_ACTIVITY_ORIENTATION = 3, 2449 }; 2450 2451 struct ec_motion_sense_activity { 2452 uint8_t sensor_num; 2453 uint8_t activity; /* one of enum motionsensor_activity */ 2454 uint8_t enable; /* 1: enable, 0: disable */ 2455 uint8_t reserved; 2456 uint16_t parameters[3]; /* activity dependent parameters */ 2457 } __ec_todo_unpacked; 2458 2459 /* Module flag masks used for the dump sub-command. */ 2460 #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0) 2461 2462 /* Sensor flag masks used for the dump sub-command. */ 2463 #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0) 2464 2465 /* 2466 * Flush entry for synchronization. 2467 * data contains time stamp 2468 */ 2469 #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0) 2470 #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1) 2471 #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2) 2472 #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3) 2473 #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4) 2474 2475 /* 2476 * Send this value for the data element to only perform a read. If you 2477 * send any other value, the EC will interpret it as data to set and will 2478 * return the actual value set. 2479 */ 2480 #define EC_MOTION_SENSE_NO_VALUE -1 2481 2482 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 2483 2484 /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ 2485 /* Set Calibration information */ 2486 #define MOTION_SENSE_SET_OFFSET BIT(0) 2487 2488 /* Default Scale value, factor 1. */ 2489 #define MOTION_SENSE_DEFAULT_SCALE BIT(15) 2490 2491 #define LID_ANGLE_UNRELIABLE 500 2492 2493 enum motionsense_spoof_mode { 2494 /* Disable spoof mode. */ 2495 MOTIONSENSE_SPOOF_MODE_DISABLE = 0, 2496 2497 /* Enable spoof mode, but use provided component values. */ 2498 MOTIONSENSE_SPOOF_MODE_CUSTOM, 2499 2500 /* Enable spoof mode, but use the current sensor values. */ 2501 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, 2502 2503 /* Query the current spoof mode status for the sensor. */ 2504 MOTIONSENSE_SPOOF_MODE_QUERY, 2505 }; 2506 2507 struct ec_params_motion_sense { 2508 uint8_t cmd; 2509 union { 2510 /* Used for MOTIONSENSE_CMD_DUMP. */ 2511 struct __ec_todo_unpacked { 2512 /* 2513 * Maximal number of sensor the host is expecting. 2514 * 0 means the host is only interested in the number 2515 * of sensors controlled by the EC. 2516 */ 2517 uint8_t max_sensor_count; 2518 } dump; 2519 2520 /* 2521 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. 2522 */ 2523 struct __ec_todo_unpacked { 2524 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. 2525 * kb_wake_angle: angle to wakup AP. 2526 */ 2527 int16_t data; 2528 } kb_wake_angle; 2529 2530 /* 2531 * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA 2532 * and MOTIONSENSE_CMD_PERFORM_CALIB. 2533 */ 2534 struct __ec_todo_unpacked { 2535 uint8_t sensor_num; 2536 } info, info_3, data, fifo_flush, perform_calib, 2537 list_activities; 2538 2539 /* 2540 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR 2541 * and MOTIONSENSE_CMD_SENSOR_RANGE. 2542 */ 2543 struct __ec_todo_unpacked { 2544 uint8_t sensor_num; 2545 2546 /* Rounding flag, true for round-up, false for down. */ 2547 uint8_t roundup; 2548 2549 uint16_t reserved; 2550 2551 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ 2552 int32_t data; 2553 } ec_rate, sensor_odr, sensor_range; 2554 2555 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ 2556 struct __ec_todo_packed { 2557 uint8_t sensor_num; 2558 2559 /* 2560 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2561 * the calibration information in the EC. 2562 * If unset, just retrieve calibration information. 2563 */ 2564 uint16_t flags; 2565 2566 /* 2567 * Temperature at calibration, in units of 0.01 C 2568 * 0x8000: invalid / unknown. 2569 * 0x0: 0C 2570 * 0x7fff: +327.67C 2571 */ 2572 int16_t temp; 2573 2574 /* 2575 * Offset for calibration. 2576 * Unit: 2577 * Accelerometer: 1/1024 g 2578 * Gyro: 1/1024 deg/s 2579 * Compass: 1/16 uT 2580 */ 2581 int16_t offset[3]; 2582 } sensor_offset; 2583 2584 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 2585 struct __ec_todo_packed { 2586 uint8_t sensor_num; 2587 2588 /* 2589 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2590 * the calibration information in the EC. 2591 * If unset, just retrieve calibration information. 2592 */ 2593 uint16_t flags; 2594 2595 /* 2596 * Temperature at calibration, in units of 0.01 C 2597 * 0x8000: invalid / unknown. 2598 * 0x0: 0C 2599 * 0x7fff: +327.67C 2600 */ 2601 int16_t temp; 2602 2603 /* 2604 * Scale for calibration: 2605 * By default scale is 1, it is encoded on 16bits: 2606 * 1 = BIT(15) 2607 * ~2 = 0xFFFF 2608 * ~0 = 0. 2609 */ 2610 uint16_t scale[3]; 2611 } sensor_scale; 2612 2613 2614 /* Used for MOTIONSENSE_CMD_FIFO_INFO */ 2615 /* (no params) */ 2616 2617 /* Used for MOTIONSENSE_CMD_FIFO_READ */ 2618 struct __ec_todo_unpacked { 2619 /* 2620 * Number of expected vector to return. 2621 * EC may return less or 0 if none available. 2622 */ 2623 uint32_t max_data_vector; 2624 } fifo_read; 2625 2626 struct ec_motion_sense_activity set_activity; 2627 2628 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2629 /* (no params) */ 2630 2631 /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ 2632 struct __ec_todo_unpacked { 2633 /* 2634 * 1: enable, 0 disable fifo, 2635 * EC_MOTION_SENSE_NO_VALUE return value. 2636 */ 2637 int8_t enable; 2638 } fifo_int_enable; 2639 2640 /* Used for MOTIONSENSE_CMD_SPOOF */ 2641 struct __ec_todo_packed { 2642 uint8_t sensor_id; 2643 2644 /* See enum motionsense_spoof_mode. */ 2645 uint8_t spoof_enable; 2646 2647 /* Ignored, used for alignment. */ 2648 uint8_t reserved; 2649 2650 /* Individual component values to spoof. */ 2651 int16_t components[3]; 2652 } spoof; 2653 2654 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 2655 struct __ec_todo_unpacked { 2656 /* 2657 * Lid angle threshold for switching between tablet and 2658 * clamshell mode. 2659 */ 2660 int16_t lid_angle; 2661 2662 /* 2663 * Hysteresis degree to prevent fluctuations between 2664 * clamshell and tablet mode if lid angle keeps 2665 * changing around the threshold. Lid motion driver will 2666 * use lid_angle + hys_degree to trigger tablet mode and 2667 * lid_angle - hys_degree to trigger clamshell mode. 2668 */ 2669 int16_t hys_degree; 2670 } tablet_mode_threshold; 2671 }; 2672 } __ec_todo_packed; 2673 2674 struct ec_response_motion_sense { 2675 union { 2676 /* Used for MOTIONSENSE_CMD_DUMP */ 2677 struct __ec_todo_unpacked { 2678 /* Flags representing the motion sensor module. */ 2679 uint8_t module_flags; 2680 2681 /* Number of sensors managed directly by the EC. */ 2682 uint8_t sensor_count; 2683 2684 /* 2685 * Sensor data is truncated if response_max is too small 2686 * for holding all the data. 2687 */ 2688 struct ec_response_motion_sensor_data sensor[0]; 2689 } dump; 2690 2691 /* Used for MOTIONSENSE_CMD_INFO. */ 2692 struct __ec_todo_unpacked { 2693 /* Should be element of enum motionsensor_type. */ 2694 uint8_t type; 2695 2696 /* Should be element of enum motionsensor_location. */ 2697 uint8_t location; 2698 2699 /* Should be element of enum motionsensor_chip. */ 2700 uint8_t chip; 2701 } info; 2702 2703 /* Used for MOTIONSENSE_CMD_INFO version 3 */ 2704 struct __ec_todo_unpacked { 2705 /* Should be element of enum motionsensor_type. */ 2706 uint8_t type; 2707 2708 /* Should be element of enum motionsensor_location. */ 2709 uint8_t location; 2710 2711 /* Should be element of enum motionsensor_chip. */ 2712 uint8_t chip; 2713 2714 /* Minimum sensor sampling frequency */ 2715 uint32_t min_frequency; 2716 2717 /* Maximum sensor sampling frequency */ 2718 uint32_t max_frequency; 2719 2720 /* Max number of sensor events that could be in fifo */ 2721 uint32_t fifo_max_event_count; 2722 } info_3; 2723 2724 /* Used for MOTIONSENSE_CMD_DATA */ 2725 struct ec_response_motion_sensor_data data; 2726 2727 /* 2728 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, 2729 * MOTIONSENSE_CMD_SENSOR_RANGE, 2730 * MOTIONSENSE_CMD_KB_WAKE_ANGLE, 2731 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and 2732 * MOTIONSENSE_CMD_SPOOF. 2733 */ 2734 struct __ec_todo_unpacked { 2735 /* Current value of the parameter queried. */ 2736 int32_t ret; 2737 } ec_rate, sensor_odr, sensor_range, kb_wake_angle, 2738 fifo_int_enable, spoof; 2739 2740 /* 2741 * Used for MOTIONSENSE_CMD_SENSOR_OFFSET, 2742 * PERFORM_CALIB. 2743 */ 2744 struct __ec_todo_unpacked { 2745 int16_t temp; 2746 int16_t offset[3]; 2747 } sensor_offset, perform_calib; 2748 2749 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 2750 struct __ec_todo_unpacked { 2751 int16_t temp; 2752 uint16_t scale[3]; 2753 } sensor_scale; 2754 2755 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; 2756 2757 struct ec_response_motion_sense_fifo_data fifo_read; 2758 2759 struct __ec_todo_packed { 2760 uint16_t reserved; 2761 uint32_t enabled; 2762 uint32_t disabled; 2763 } list_activities; 2764 2765 /* No params for set activity */ 2766 2767 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2768 struct __ec_todo_unpacked { 2769 /* 2770 * Angle between 0 and 360 degree if available, 2771 * LID_ANGLE_UNRELIABLE otherwise. 2772 */ 2773 uint16_t value; 2774 } lid_angle; 2775 2776 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 2777 struct __ec_todo_unpacked { 2778 /* 2779 * Lid angle threshold for switching between tablet and 2780 * clamshell mode. 2781 */ 2782 uint16_t lid_angle; 2783 2784 /* Hysteresis degree. */ 2785 uint16_t hys_degree; 2786 } tablet_mode_threshold; 2787 2788 }; 2789 } __ec_todo_packed; 2790 2791 /*****************************************************************************/ 2792 /* Force lid open command */ 2793 2794 /* Make lid event always open */ 2795 #define EC_CMD_FORCE_LID_OPEN 0x002C 2796 2797 struct ec_params_force_lid_open { 2798 uint8_t enabled; 2799 } __ec_align1; 2800 2801 /*****************************************************************************/ 2802 /* Configure the behavior of the power button */ 2803 #define EC_CMD_CONFIG_POWER_BUTTON 0x002D 2804 2805 enum ec_config_power_button_flags { 2806 /* Enable/Disable power button pulses for x86 devices */ 2807 EC_POWER_BUTTON_ENABLE_PULSE = BIT(0), 2808 }; 2809 2810 struct ec_params_config_power_button { 2811 /* See enum ec_config_power_button_flags */ 2812 uint8_t flags; 2813 } __ec_align1; 2814 2815 /*****************************************************************************/ 2816 /* USB charging control commands */ 2817 2818 /* Set USB port charging mode */ 2819 #define EC_CMD_USB_CHARGE_SET_MODE 0x0030 2820 2821 struct ec_params_usb_charge_set_mode { 2822 uint8_t usb_port_id; 2823 uint8_t mode:7; 2824 uint8_t inhibit_charge:1; 2825 } __ec_align1; 2826 2827 /*****************************************************************************/ 2828 /* Persistent storage for host */ 2829 2830 /* Maximum bytes that can be read/written in a single command */ 2831 #define EC_PSTORE_SIZE_MAX 64 2832 2833 /* Get persistent storage info */ 2834 #define EC_CMD_PSTORE_INFO 0x0040 2835 2836 struct ec_response_pstore_info { 2837 /* Persistent storage size, in bytes */ 2838 uint32_t pstore_size; 2839 /* Access size; read/write offset and size must be a multiple of this */ 2840 uint32_t access_size; 2841 } __ec_align4; 2842 2843 /* 2844 * Read persistent storage 2845 * 2846 * Response is params.size bytes of data. 2847 */ 2848 #define EC_CMD_PSTORE_READ 0x0041 2849 2850 struct ec_params_pstore_read { 2851 uint32_t offset; /* Byte offset to read */ 2852 uint32_t size; /* Size to read in bytes */ 2853 } __ec_align4; 2854 2855 /* Write persistent storage */ 2856 #define EC_CMD_PSTORE_WRITE 0x0042 2857 2858 struct ec_params_pstore_write { 2859 uint32_t offset; /* Byte offset to write */ 2860 uint32_t size; /* Size to write in bytes */ 2861 uint8_t data[EC_PSTORE_SIZE_MAX]; 2862 } __ec_align4; 2863 2864 /*****************************************************************************/ 2865 /* Real-time clock */ 2866 2867 /* RTC params and response structures */ 2868 struct ec_params_rtc { 2869 uint32_t time; 2870 } __ec_align4; 2871 2872 struct ec_response_rtc { 2873 uint32_t time; 2874 } __ec_align4; 2875 2876 /* These use ec_response_rtc */ 2877 #define EC_CMD_RTC_GET_VALUE 0x0044 2878 #define EC_CMD_RTC_GET_ALARM 0x0045 2879 2880 /* These all use ec_params_rtc */ 2881 #define EC_CMD_RTC_SET_VALUE 0x0046 2882 #define EC_CMD_RTC_SET_ALARM 0x0047 2883 2884 /* Pass as time param to SET_ALARM to clear the current alarm */ 2885 #define EC_RTC_ALARM_CLEAR 0 2886 2887 /*****************************************************************************/ 2888 /* Port80 log access */ 2889 2890 /* Maximum entries that can be read/written in a single command */ 2891 #define EC_PORT80_SIZE_MAX 32 2892 2893 /* Get last port80 code from previous boot */ 2894 #define EC_CMD_PORT80_LAST_BOOT 0x0048 2895 #define EC_CMD_PORT80_READ 0x0048 2896 2897 enum ec_port80_subcmd { 2898 EC_PORT80_GET_INFO = 0, 2899 EC_PORT80_READ_BUFFER, 2900 }; 2901 2902 struct ec_params_port80_read { 2903 uint16_t subcmd; 2904 union { 2905 struct __ec_todo_unpacked { 2906 uint32_t offset; 2907 uint32_t num_entries; 2908 } read_buffer; 2909 }; 2910 } __ec_todo_packed; 2911 2912 struct ec_response_port80_read { 2913 union { 2914 struct __ec_todo_unpacked { 2915 uint32_t writes; 2916 uint32_t history_size; 2917 uint32_t last_boot; 2918 } get_info; 2919 struct __ec_todo_unpacked { 2920 uint16_t codes[EC_PORT80_SIZE_MAX]; 2921 } data; 2922 }; 2923 } __ec_todo_packed; 2924 2925 struct ec_response_port80_last_boot { 2926 uint16_t code; 2927 } __ec_align2; 2928 2929 /*****************************************************************************/ 2930 /* Temporary secure storage for host verified boot use */ 2931 2932 /* Number of bytes in a vstore slot */ 2933 #define EC_VSTORE_SLOT_SIZE 64 2934 2935 /* Maximum number of vstore slots */ 2936 #define EC_VSTORE_SLOT_MAX 32 2937 2938 /* Get persistent storage info */ 2939 #define EC_CMD_VSTORE_INFO 0x0049 2940 struct ec_response_vstore_info { 2941 /* Indicates which slots are locked */ 2942 uint32_t slot_locked; 2943 /* Total number of slots available */ 2944 uint8_t slot_count; 2945 } __ec_align_size1; 2946 2947 /* 2948 * Read temporary secure storage 2949 * 2950 * Response is EC_VSTORE_SLOT_SIZE bytes of data. 2951 */ 2952 #define EC_CMD_VSTORE_READ 0x004A 2953 2954 struct ec_params_vstore_read { 2955 uint8_t slot; /* Slot to read from */ 2956 } __ec_align1; 2957 2958 struct ec_response_vstore_read { 2959 uint8_t data[EC_VSTORE_SLOT_SIZE]; 2960 } __ec_align1; 2961 2962 /* 2963 * Write temporary secure storage and lock it. 2964 */ 2965 #define EC_CMD_VSTORE_WRITE 0x004B 2966 2967 struct ec_params_vstore_write { 2968 uint8_t slot; /* Slot to write to */ 2969 uint8_t data[EC_VSTORE_SLOT_SIZE]; 2970 } __ec_align1; 2971 2972 /*****************************************************************************/ 2973 /* Thermal engine commands. Note that there are two implementations. We'll 2974 * reuse the command number, but the data and behavior is incompatible. 2975 * Version 0 is what originally shipped on Link. 2976 * Version 1 separates the CPU thermal limits from the fan control. 2977 */ 2978 2979 #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 2980 #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 2981 2982 /* The version 0 structs are opaque. You have to know what they are for 2983 * the get/set commands to make any sense. 2984 */ 2985 2986 /* Version 0 - set */ 2987 struct ec_params_thermal_set_threshold { 2988 uint8_t sensor_type; 2989 uint8_t threshold_id; 2990 uint16_t value; 2991 } __ec_align2; 2992 2993 /* Version 0 - get */ 2994 struct ec_params_thermal_get_threshold { 2995 uint8_t sensor_type; 2996 uint8_t threshold_id; 2997 } __ec_align1; 2998 2999 struct ec_response_thermal_get_threshold { 3000 uint16_t value; 3001 } __ec_align2; 3002 3003 3004 /* The version 1 structs are visible. */ 3005 enum ec_temp_thresholds { 3006 EC_TEMP_THRESH_WARN = 0, 3007 EC_TEMP_THRESH_HIGH, 3008 EC_TEMP_THRESH_HALT, 3009 3010 EC_TEMP_THRESH_COUNT 3011 }; 3012 3013 /* 3014 * Thermal configuration for one temperature sensor. Temps are in degrees K. 3015 * Zero values will be silently ignored by the thermal task. 3016 * 3017 * Set 'temp_host' value allows thermal task to trigger some event with 1 degree 3018 * hysteresis. 3019 * For example, 3020 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 3021 * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K 3022 * EC will throttle ap when temperature >= 301 K, and release throttling when 3023 * temperature <= 299 K. 3024 * 3025 * Set 'temp_host_release' value allows thermal task has a custom hysteresis. 3026 * For example, 3027 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 3028 * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K 3029 * EC will throttle ap when temperature >= 301 K, and release throttling when 3030 * temperature <= 294 K. 3031 * 3032 * Note that this structure is a sub-structure of 3033 * ec_params_thermal_set_threshold_v1, but maintains its alignment there. 3034 */ 3035 struct ec_thermal_config { 3036 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ 3037 uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */ 3038 uint32_t temp_fan_off; /* no active cooling needed */ 3039 uint32_t temp_fan_max; /* max active cooling needed */ 3040 } __ec_align4; 3041 3042 /* Version 1 - get config for one sensor. */ 3043 struct ec_params_thermal_get_threshold_v1 { 3044 uint32_t sensor_num; 3045 } __ec_align4; 3046 /* This returns a struct ec_thermal_config */ 3047 3048 /* 3049 * Version 1 - set config for one sensor. 3050 * Use read-modify-write for best results! 3051 */ 3052 struct ec_params_thermal_set_threshold_v1 { 3053 uint32_t sensor_num; 3054 struct ec_thermal_config cfg; 3055 } __ec_align4; 3056 /* This returns no data */ 3057 3058 /****************************************************************************/ 3059 3060 /* Toggle automatic fan control */ 3061 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 3062 3063 /* Version 1 of input params */ 3064 struct ec_params_auto_fan_ctrl_v1 { 3065 uint8_t fan_idx; 3066 } __ec_align1; 3067 3068 /* Get/Set TMP006 calibration data */ 3069 #define EC_CMD_TMP006_GET_CALIBRATION 0x0053 3070 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054 3071 3072 /* 3073 * The original TMP006 calibration only needed four params, but now we need 3074 * more. Since the algorithm is nothing but magic numbers anyway, we'll leave 3075 * the params opaque. The v1 "get" response will include the algorithm number 3076 * and how many params it requires. That way we can change the EC code without 3077 * needing to update this file. We can also use a different algorithm on each 3078 * sensor. 3079 */ 3080 3081 /* This is the same struct for both v0 and v1. */ 3082 struct ec_params_tmp006_get_calibration { 3083 uint8_t index; 3084 } __ec_align1; 3085 3086 /* Version 0 */ 3087 struct ec_response_tmp006_get_calibration_v0 { 3088 float s0; 3089 float b0; 3090 float b1; 3091 float b2; 3092 } __ec_align4; 3093 3094 struct ec_params_tmp006_set_calibration_v0 { 3095 uint8_t index; 3096 uint8_t reserved[3]; 3097 float s0; 3098 float b0; 3099 float b1; 3100 float b2; 3101 } __ec_align4; 3102 3103 /* Version 1 */ 3104 struct ec_response_tmp006_get_calibration_v1 { 3105 uint8_t algorithm; 3106 uint8_t num_params; 3107 uint8_t reserved[2]; 3108 float val[]; 3109 } __ec_align4; 3110 3111 struct ec_params_tmp006_set_calibration_v1 { 3112 uint8_t index; 3113 uint8_t algorithm; 3114 uint8_t num_params; 3115 uint8_t reserved; 3116 float val[]; 3117 } __ec_align4; 3118 3119 3120 /* Read raw TMP006 data */ 3121 #define EC_CMD_TMP006_GET_RAW 0x0055 3122 3123 struct ec_params_tmp006_get_raw { 3124 uint8_t index; 3125 } __ec_align1; 3126 3127 struct ec_response_tmp006_get_raw { 3128 int32_t t; /* In 1/100 K */ 3129 int32_t v; /* In nV */ 3130 } __ec_align4; 3131 3132 /*****************************************************************************/ 3133 /* MKBP - Matrix KeyBoard Protocol */ 3134 3135 /* 3136 * Read key state 3137 * 3138 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for 3139 * expected response size. 3140 * 3141 * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish 3142 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type 3143 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. 3144 */ 3145 #define EC_CMD_MKBP_STATE 0x0060 3146 3147 /* 3148 * Provide information about various MKBP things. See enum ec_mkbp_info_type. 3149 */ 3150 #define EC_CMD_MKBP_INFO 0x0061 3151 3152 struct ec_response_mkbp_info { 3153 uint32_t rows; 3154 uint32_t cols; 3155 /* Formerly "switches", which was 0. */ 3156 uint8_t reserved; 3157 } __ec_align_size1; 3158 3159 struct ec_params_mkbp_info { 3160 uint8_t info_type; 3161 uint8_t event_type; 3162 } __ec_align1; 3163 3164 enum ec_mkbp_info_type { 3165 /* 3166 * Info about the keyboard matrix: number of rows and columns. 3167 * 3168 * Returns struct ec_response_mkbp_info. 3169 */ 3170 EC_MKBP_INFO_KBD = 0, 3171 3172 /* 3173 * For buttons and switches, info about which specifically are 3174 * supported. event_type must be set to one of the values in enum 3175 * ec_mkbp_event. 3176 * 3177 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte 3178 * bitmask indicating which buttons or switches are present. See the 3179 * bit inidices below. 3180 */ 3181 EC_MKBP_INFO_SUPPORTED = 1, 3182 3183 /* 3184 * Instantaneous state of buttons and switches. 3185 * 3186 * event_type must be set to one of the values in enum ec_mkbp_event. 3187 * 3188 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13] 3189 * indicating the current state of the keyboard matrix. 3190 * 3191 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw 3192 * event state. 3193 * 3194 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the 3195 * state of supported buttons. 3196 * 3197 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the 3198 * state of supported switches. 3199 */ 3200 EC_MKBP_INFO_CURRENT = 2, 3201 }; 3202 3203 /* Simulate key press */ 3204 #define EC_CMD_MKBP_SIMULATE_KEY 0x0062 3205 3206 struct ec_params_mkbp_simulate_key { 3207 uint8_t col; 3208 uint8_t row; 3209 uint8_t pressed; 3210 } __ec_align1; 3211 3212 #define EC_CMD_GET_KEYBOARD_ID 0x0063 3213 3214 struct ec_response_keyboard_id { 3215 uint32_t keyboard_id; 3216 } __ec_align4; 3217 3218 enum keyboard_id { 3219 KEYBOARD_ID_UNSUPPORTED = 0, 3220 KEYBOARD_ID_UNREADABLE = 0xffffffff, 3221 }; 3222 3223 /* Configure keyboard scanning */ 3224 #define EC_CMD_MKBP_SET_CONFIG 0x0064 3225 #define EC_CMD_MKBP_GET_CONFIG 0x0065 3226 3227 /* flags */ 3228 enum mkbp_config_flags { 3229 EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ 3230 }; 3231 3232 enum mkbp_config_valid { 3233 EC_MKBP_VALID_SCAN_PERIOD = BIT(0), 3234 EC_MKBP_VALID_POLL_TIMEOUT = BIT(1), 3235 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3), 3236 EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4), 3237 EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5), 3238 EC_MKBP_VALID_DEBOUNCE_UP = BIT(6), 3239 EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7), 3240 }; 3241 3242 /* 3243 * Configuration for our key scanning algorithm. 3244 * 3245 * Note that this is used as a sub-structure of 3246 * ec_{params/response}_mkbp_get_config. 3247 */ 3248 struct ec_mkbp_config { 3249 uint32_t valid_mask; /* valid fields */ 3250 uint8_t flags; /* some flags (enum mkbp_config_flags) */ 3251 uint8_t valid_flags; /* which flags are valid */ 3252 uint16_t scan_period_us; /* period between start of scans */ 3253 /* revert to interrupt mode after no activity for this long */ 3254 uint32_t poll_timeout_us; 3255 /* 3256 * minimum post-scan relax time. Once we finish a scan we check 3257 * the time until we are due to start the next one. If this time is 3258 * shorter this field, we use this instead. 3259 */ 3260 uint16_t min_post_scan_delay_us; 3261 /* delay between setting up output and waiting for it to settle */ 3262 uint16_t output_settle_us; 3263 uint16_t debounce_down_us; /* time for debounce on key down */ 3264 uint16_t debounce_up_us; /* time for debounce on key up */ 3265 /* maximum depth to allow for fifo (0 = no keyscan output) */ 3266 uint8_t fifo_max_depth; 3267 } __ec_align_size1; 3268 3269 struct ec_params_mkbp_set_config { 3270 struct ec_mkbp_config config; 3271 } __ec_align_size1; 3272 3273 struct ec_response_mkbp_get_config { 3274 struct ec_mkbp_config config; 3275 } __ec_align_size1; 3276 3277 /* Run the key scan emulation */ 3278 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 3279 3280 enum ec_keyscan_seq_cmd { 3281 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ 3282 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ 3283 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ 3284 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ 3285 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ 3286 }; 3287 3288 enum ec_collect_flags { 3289 /* 3290 * Indicates this scan was processed by the EC. Due to timing, some 3291 * scans may be skipped. 3292 */ 3293 EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0), 3294 }; 3295 3296 struct ec_collect_item { 3297 uint8_t flags; /* some flags (enum ec_collect_flags) */ 3298 } __ec_align1; 3299 3300 struct ec_params_keyscan_seq_ctrl { 3301 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ 3302 union { 3303 struct __ec_align1 { 3304 uint8_t active; /* still active */ 3305 uint8_t num_items; /* number of items */ 3306 /* Current item being presented */ 3307 uint8_t cur_item; 3308 } status; 3309 struct __ec_todo_unpacked { 3310 /* 3311 * Absolute time for this scan, measured from the 3312 * start of the sequence. 3313 */ 3314 uint32_t time_us; 3315 uint8_t scan[0]; /* keyscan data */ 3316 } add; 3317 struct __ec_align1 { 3318 uint8_t start_item; /* First item to return */ 3319 uint8_t num_items; /* Number of items to return */ 3320 } collect; 3321 }; 3322 } __ec_todo_packed; 3323 3324 struct ec_result_keyscan_seq_ctrl { 3325 union { 3326 struct __ec_todo_unpacked { 3327 uint8_t num_items; /* Number of items */ 3328 /* Data for each item */ 3329 struct ec_collect_item item[0]; 3330 } collect; 3331 }; 3332 } __ec_todo_packed; 3333 3334 /* 3335 * Get the next pending MKBP event. 3336 * 3337 * Returns EC_RES_UNAVAILABLE if there is no event pending. 3338 */ 3339 #define EC_CMD_GET_NEXT_EVENT 0x0067 3340 3341 #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7 3342 3343 /* 3344 * We use the most significant bit of the event type to indicate to the host 3345 * that the EC has more MKBP events available to provide. 3346 */ 3347 #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) 3348 3349 /* The mask to apply to get the raw event type */ 3350 #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1) 3351 3352 enum ec_mkbp_event { 3353 /* Keyboard matrix changed. The event data is the new matrix state. */ 3354 EC_MKBP_EVENT_KEY_MATRIX = 0, 3355 3356 /* New host event. The event data is 4 bytes of host event flags. */ 3357 EC_MKBP_EVENT_HOST_EVENT = 1, 3358 3359 /* New Sensor FIFO data. The event data is fifo_info structure. */ 3360 EC_MKBP_EVENT_SENSOR_FIFO = 2, 3361 3362 /* The state of the non-matrixed buttons have changed. */ 3363 EC_MKBP_EVENT_BUTTON = 3, 3364 3365 /* The state of the switches have changed. */ 3366 EC_MKBP_EVENT_SWITCH = 4, 3367 3368 /* New Fingerprint sensor event, the event data is fp_events bitmap. */ 3369 EC_MKBP_EVENT_FINGERPRINT = 5, 3370 3371 /* 3372 * Sysrq event: send emulated sysrq. The event data is sysrq, 3373 * corresponding to the key to be pressed. 3374 */ 3375 EC_MKBP_EVENT_SYSRQ = 6, 3376 3377 /* 3378 * New 64-bit host event. 3379 * The event data is 8 bytes of host event flags. 3380 */ 3381 EC_MKBP_EVENT_HOST_EVENT64 = 7, 3382 3383 /* Notify the AP that something happened on CEC */ 3384 EC_MKBP_EVENT_CEC_EVENT = 8, 3385 3386 /* Send an incoming CEC message to the AP */ 3387 EC_MKBP_EVENT_CEC_MESSAGE = 9, 3388 3389 /* Number of MKBP events */ 3390 EC_MKBP_EVENT_COUNT, 3391 }; 3392 BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK); 3393 3394 union __ec_align_offset1 ec_response_get_next_data { 3395 uint8_t key_matrix[13]; 3396 3397 /* Unaligned */ 3398 uint32_t host_event; 3399 uint64_t host_event64; 3400 3401 struct __ec_todo_unpacked { 3402 /* For aligning the fifo_info */ 3403 uint8_t reserved[3]; 3404 struct ec_response_motion_sense_fifo_info info; 3405 } sensor_fifo; 3406 3407 uint32_t buttons; 3408 3409 uint32_t switches; 3410 3411 uint32_t fp_events; 3412 3413 uint32_t sysrq; 3414 3415 /* CEC events from enum mkbp_cec_event */ 3416 uint32_t cec_events; 3417 }; 3418 3419 union __ec_align_offset1 ec_response_get_next_data_v1 { 3420 uint8_t key_matrix[16]; 3421 3422 /* Unaligned */ 3423 uint32_t host_event; 3424 uint64_t host_event64; 3425 3426 struct __ec_todo_unpacked { 3427 /* For aligning the fifo_info */ 3428 uint8_t reserved[3]; 3429 struct ec_response_motion_sense_fifo_info info; 3430 } sensor_fifo; 3431 3432 uint32_t buttons; 3433 3434 uint32_t switches; 3435 3436 uint32_t fp_events; 3437 3438 uint32_t sysrq; 3439 3440 /* CEC events from enum mkbp_cec_event */ 3441 uint32_t cec_events; 3442 3443 uint8_t cec_message[16]; 3444 }; 3445 BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16); 3446 3447 struct ec_response_get_next_event { 3448 uint8_t event_type; 3449 /* Followed by event data if any */ 3450 union ec_response_get_next_data data; 3451 } __ec_align1; 3452 3453 struct ec_response_get_next_event_v1 { 3454 uint8_t event_type; 3455 /* Followed by event data if any */ 3456 union ec_response_get_next_data_v1 data; 3457 } __ec_align1; 3458 3459 /* Bit indices for buttons and switches.*/ 3460 /* Buttons */ 3461 #define EC_MKBP_POWER_BUTTON 0 3462 #define EC_MKBP_VOL_UP 1 3463 #define EC_MKBP_VOL_DOWN 2 3464 #define EC_MKBP_RECOVERY 3 3465 3466 /* Switches */ 3467 #define EC_MKBP_LID_OPEN 0 3468 #define EC_MKBP_TABLET_MODE 1 3469 #define EC_MKBP_BASE_ATTACHED 2 3470 #define EC_MKBP_FRONT_PROXIMITY 3 3471 3472 /* Run keyboard factory test scanning */ 3473 #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 3474 3475 struct ec_response_keyboard_factory_test { 3476 uint16_t shorted; /* Keyboard pins are shorted */ 3477 } __ec_align2; 3478 3479 /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ 3480 #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) 3481 #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F) 3482 #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4 3483 #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \ 3484 >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET) 3485 #define EC_MKBP_FP_MATCH_IDX_OFFSET 12 3486 #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000 3487 #define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \ 3488 >> EC_MKBP_FP_MATCH_IDX_OFFSET) 3489 #define EC_MKBP_FP_ENROLL BIT(27) 3490 #define EC_MKBP_FP_MATCH BIT(28) 3491 #define EC_MKBP_FP_FINGER_DOWN BIT(29) 3492 #define EC_MKBP_FP_FINGER_UP BIT(30) 3493 #define EC_MKBP_FP_IMAGE_READY BIT(31) 3494 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */ 3495 #define EC_MKBP_FP_ERR_ENROLL_OK 0 3496 #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1 3497 #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2 3498 #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3 3499 #define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5 3500 /* Can be used to detect if image was usable for enrollment or not. */ 3501 #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1 3502 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */ 3503 #define EC_MKBP_FP_ERR_MATCH_NO 0 3504 #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6 3505 #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7 3506 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2 3507 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4 3508 #define EC_MKBP_FP_ERR_MATCH_YES 1 3509 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3 3510 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5 3511 3512 3513 /*****************************************************************************/ 3514 /* Temperature sensor commands */ 3515 3516 /* Read temperature sensor info */ 3517 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 3518 3519 struct ec_params_temp_sensor_get_info { 3520 uint8_t id; 3521 } __ec_align1; 3522 3523 struct ec_response_temp_sensor_get_info { 3524 char sensor_name[32]; 3525 uint8_t sensor_type; 3526 } __ec_align1; 3527 3528 /*****************************************************************************/ 3529 3530 /* 3531 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI 3532 * commands accidentally sent to the wrong interface. See the ACPI section 3533 * below. 3534 */ 3535 3536 /*****************************************************************************/ 3537 /* Host event commands */ 3538 3539 3540 /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */ 3541 /* 3542 * Host event mask params and response structures, shared by all of the host 3543 * event commands below. 3544 */ 3545 struct ec_params_host_event_mask { 3546 uint32_t mask; 3547 } __ec_align4; 3548 3549 struct ec_response_host_event_mask { 3550 uint32_t mask; 3551 } __ec_align4; 3552 3553 /* These all use ec_response_host_event_mask */ 3554 #define EC_CMD_HOST_EVENT_GET_B 0x0087 3555 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 3556 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 3557 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D 3558 3559 /* These all use ec_params_host_event_mask */ 3560 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A 3561 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B 3562 #define EC_CMD_HOST_EVENT_CLEAR 0x008C 3563 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E 3564 #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F 3565 3566 /* 3567 * Unified host event programming interface - Should be used by newer versions 3568 * of BIOS/OS to program host events and masks 3569 */ 3570 3571 struct ec_params_host_event { 3572 3573 /* Action requested by host - one of enum ec_host_event_action. */ 3574 uint8_t action; 3575 3576 /* 3577 * Mask type that the host requested the action on - one of 3578 * enum ec_host_event_mask_type. 3579 */ 3580 uint8_t mask_type; 3581 3582 /* Set to 0, ignore on read */ 3583 uint16_t reserved; 3584 3585 /* Value to be used in case of set operations. */ 3586 uint64_t value; 3587 } __ec_align4; 3588 3589 /* 3590 * Response structure returned by EC_CMD_HOST_EVENT. 3591 * Update the value on a GET request. Set to 0 on GET/CLEAR 3592 */ 3593 3594 struct ec_response_host_event { 3595 3596 /* Mask value in case of get operation */ 3597 uint64_t value; 3598 } __ec_align4; 3599 3600 enum ec_host_event_action { 3601 /* 3602 * params.value is ignored. Value of mask_type populated 3603 * in response.value 3604 */ 3605 EC_HOST_EVENT_GET, 3606 3607 /* Bits in params.value are set */ 3608 EC_HOST_EVENT_SET, 3609 3610 /* Bits in params.value are cleared */ 3611 EC_HOST_EVENT_CLEAR, 3612 }; 3613 3614 enum ec_host_event_mask_type { 3615 3616 /* Main host event copy */ 3617 EC_HOST_EVENT_MAIN, 3618 3619 /* Copy B of host events */ 3620 EC_HOST_EVENT_B, 3621 3622 /* SCI Mask */ 3623 EC_HOST_EVENT_SCI_MASK, 3624 3625 /* SMI Mask */ 3626 EC_HOST_EVENT_SMI_MASK, 3627 3628 /* Mask of events that should be always reported in hostevents */ 3629 EC_HOST_EVENT_ALWAYS_REPORT_MASK, 3630 3631 /* Active wake mask */ 3632 EC_HOST_EVENT_ACTIVE_WAKE_MASK, 3633 3634 /* Lazy wake mask for S0ix */ 3635 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, 3636 3637 /* Lazy wake mask for S3 */ 3638 EC_HOST_EVENT_LAZY_WAKE_MASK_S3, 3639 3640 /* Lazy wake mask for S5 */ 3641 EC_HOST_EVENT_LAZY_WAKE_MASK_S5, 3642 }; 3643 3644 #define EC_CMD_HOST_EVENT 0x00A4 3645 3646 /*****************************************************************************/ 3647 /* Switch commands */ 3648 3649 /* Enable/disable LCD backlight */ 3650 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 3651 3652 struct ec_params_switch_enable_backlight { 3653 uint8_t enabled; 3654 } __ec_align1; 3655 3656 /* Enable/disable WLAN/Bluetooth */ 3657 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 3658 #define EC_VER_SWITCH_ENABLE_WIRELESS 1 3659 3660 /* Version 0 params; no response */ 3661 struct ec_params_switch_enable_wireless_v0 { 3662 uint8_t enabled; 3663 } __ec_align1; 3664 3665 /* Version 1 params */ 3666 struct ec_params_switch_enable_wireless_v1 { 3667 /* Flags to enable now */ 3668 uint8_t now_flags; 3669 3670 /* Which flags to copy from now_flags */ 3671 uint8_t now_mask; 3672 3673 /* 3674 * Flags to leave enabled in S3, if they're on at the S0->S3 3675 * transition. (Other flags will be disabled by the S0->S3 3676 * transition.) 3677 */ 3678 uint8_t suspend_flags; 3679 3680 /* Which flags to copy from suspend_flags */ 3681 uint8_t suspend_mask; 3682 } __ec_align1; 3683 3684 /* Version 1 response */ 3685 struct ec_response_switch_enable_wireless_v1 { 3686 /* Flags to enable now */ 3687 uint8_t now_flags; 3688 3689 /* Flags to leave enabled in S3 */ 3690 uint8_t suspend_flags; 3691 } __ec_align1; 3692 3693 /*****************************************************************************/ 3694 /* GPIO commands. Only available on EC if write protect has been disabled. */ 3695 3696 /* Set GPIO output value */ 3697 #define EC_CMD_GPIO_SET 0x0092 3698 3699 struct ec_params_gpio_set { 3700 char name[32]; 3701 uint8_t val; 3702 } __ec_align1; 3703 3704 /* Get GPIO value */ 3705 #define EC_CMD_GPIO_GET 0x0093 3706 3707 /* Version 0 of input params and response */ 3708 struct ec_params_gpio_get { 3709 char name[32]; 3710 } __ec_align1; 3711 3712 struct ec_response_gpio_get { 3713 uint8_t val; 3714 } __ec_align1; 3715 3716 /* Version 1 of input params and response */ 3717 struct ec_params_gpio_get_v1 { 3718 uint8_t subcmd; 3719 union { 3720 struct __ec_align1 { 3721 char name[32]; 3722 } get_value_by_name; 3723 struct __ec_align1 { 3724 uint8_t index; 3725 } get_info; 3726 }; 3727 } __ec_align1; 3728 3729 struct ec_response_gpio_get_v1 { 3730 union { 3731 struct __ec_align1 { 3732 uint8_t val; 3733 } get_value_by_name, get_count; 3734 struct __ec_todo_unpacked { 3735 uint8_t val; 3736 char name[32]; 3737 uint32_t flags; 3738 } get_info; 3739 }; 3740 } __ec_todo_packed; 3741 3742 enum gpio_get_subcmd { 3743 EC_GPIO_GET_BY_NAME = 0, 3744 EC_GPIO_GET_COUNT = 1, 3745 EC_GPIO_GET_INFO = 2, 3746 }; 3747 3748 /*****************************************************************************/ 3749 /* I2C commands. Only available when flash write protect is unlocked. */ 3750 3751 /* 3752 * CAUTION: These commands are deprecated, and are not supported anymore in EC 3753 * builds >= 8398.0.0 (see crosbug.com/p/23570). 3754 * 3755 * Use EC_CMD_I2C_PASSTHRU instead. 3756 */ 3757 3758 /* Read I2C bus */ 3759 #define EC_CMD_I2C_READ 0x0094 3760 3761 struct ec_params_i2c_read { 3762 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3763 uint8_t read_size; /* Either 8 or 16. */ 3764 uint8_t port; 3765 uint8_t offset; 3766 } __ec_align_size1; 3767 3768 struct ec_response_i2c_read { 3769 uint16_t data; 3770 } __ec_align2; 3771 3772 /* Write I2C bus */ 3773 #define EC_CMD_I2C_WRITE 0x0095 3774 3775 struct ec_params_i2c_write { 3776 uint16_t data; 3777 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3778 uint8_t write_size; /* Either 8 or 16. */ 3779 uint8_t port; 3780 uint8_t offset; 3781 } __ec_align_size1; 3782 3783 /*****************************************************************************/ 3784 /* Charge state commands. Only available when flash write protect unlocked. */ 3785 3786 /* Force charge state machine to stop charging the battery or force it to 3787 * discharge the battery. 3788 */ 3789 #define EC_CMD_CHARGE_CONTROL 0x0096 3790 #define EC_VER_CHARGE_CONTROL 1 3791 3792 enum ec_charge_control_mode { 3793 CHARGE_CONTROL_NORMAL = 0, 3794 CHARGE_CONTROL_IDLE, 3795 CHARGE_CONTROL_DISCHARGE, 3796 }; 3797 3798 struct ec_params_charge_control { 3799 uint32_t mode; /* enum charge_control_mode */ 3800 } __ec_align4; 3801 3802 /*****************************************************************************/ 3803 3804 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ 3805 #define EC_CMD_CONSOLE_SNAPSHOT 0x0097 3806 3807 /* 3808 * Read data from the saved snapshot. If the subcmd parameter is 3809 * CONSOLE_READ_NEXT, this will return data starting from the beginning of 3810 * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the 3811 * end of the previous snapshot. 3812 * 3813 * The params are only looked at in version >= 1 of this command. Prior 3814 * versions will just default to CONSOLE_READ_NEXT behavior. 3815 * 3816 * Response is null-terminated string. Empty string, if there is no more 3817 * remaining output. 3818 */ 3819 #define EC_CMD_CONSOLE_READ 0x0098 3820 3821 enum ec_console_read_subcmd { 3822 CONSOLE_READ_NEXT = 0, 3823 CONSOLE_READ_RECENT 3824 }; 3825 3826 struct ec_params_console_read_v1 { 3827 uint8_t subcmd; /* enum ec_console_read_subcmd */ 3828 } __ec_align1; 3829 3830 /*****************************************************************************/ 3831 3832 /* 3833 * Cut off battery power immediately or after the host has shut down. 3834 * 3835 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery. 3836 * EC_RES_SUCCESS if the command was successful. 3837 * EC_RES_ERROR if the cut off command failed. 3838 */ 3839 #define EC_CMD_BATTERY_CUT_OFF 0x0099 3840 3841 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0) 3842 3843 struct ec_params_battery_cutoff { 3844 uint8_t flags; 3845 } __ec_align1; 3846 3847 /*****************************************************************************/ 3848 /* USB port mux control. */ 3849 3850 /* 3851 * Switch USB mux or return to automatic switching. 3852 */ 3853 #define EC_CMD_USB_MUX 0x009A 3854 3855 struct ec_params_usb_mux { 3856 uint8_t mux; 3857 } __ec_align1; 3858 3859 /*****************************************************************************/ 3860 /* LDOs / FETs control. */ 3861 3862 enum ec_ldo_state { 3863 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */ 3864 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */ 3865 }; 3866 3867 /* 3868 * Switch on/off a LDO. 3869 */ 3870 #define EC_CMD_LDO_SET 0x009B 3871 3872 struct ec_params_ldo_set { 3873 uint8_t index; 3874 uint8_t state; 3875 } __ec_align1; 3876 3877 /* 3878 * Get LDO state. 3879 */ 3880 #define EC_CMD_LDO_GET 0x009C 3881 3882 struct ec_params_ldo_get { 3883 uint8_t index; 3884 } __ec_align1; 3885 3886 struct ec_response_ldo_get { 3887 uint8_t state; 3888 } __ec_align1; 3889 3890 /*****************************************************************************/ 3891 /* Power info. */ 3892 3893 /* 3894 * Get power info. 3895 */ 3896 #define EC_CMD_POWER_INFO 0x009D 3897 3898 struct ec_response_power_info { 3899 uint32_t usb_dev_type; 3900 uint16_t voltage_ac; 3901 uint16_t voltage_system; 3902 uint16_t current_system; 3903 uint16_t usb_current_limit; 3904 } __ec_align4; 3905 3906 /*****************************************************************************/ 3907 /* I2C passthru command */ 3908 3909 #define EC_CMD_I2C_PASSTHRU 0x009E 3910 3911 /* Read data; if not present, message is a write */ 3912 #define EC_I2C_FLAG_READ BIT(15) 3913 3914 /* Mask for address */ 3915 #define EC_I2C_ADDR_MASK 0x3ff 3916 3917 #define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */ 3918 #define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */ 3919 3920 /* Any error */ 3921 #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) 3922 3923 struct ec_params_i2c_passthru_msg { 3924 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ 3925 uint16_t len; /* Number of bytes to read or write */ 3926 } __ec_align2; 3927 3928 struct ec_params_i2c_passthru { 3929 uint8_t port; /* I2C port number */ 3930 uint8_t num_msgs; /* Number of messages */ 3931 struct ec_params_i2c_passthru_msg msg[]; 3932 /* Data to write for all messages is concatenated here */ 3933 } __ec_align2; 3934 3935 struct ec_response_i2c_passthru { 3936 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ 3937 uint8_t num_msgs; /* Number of messages processed */ 3938 uint8_t data[]; /* Data read by messages concatenated here */ 3939 } __ec_align1; 3940 3941 /*****************************************************************************/ 3942 /* Power button hang detect */ 3943 3944 #define EC_CMD_HANG_DETECT 0x009F 3945 3946 /* Reasons to start hang detection timer */ 3947 /* Power button pressed */ 3948 #define EC_HANG_START_ON_POWER_PRESS BIT(0) 3949 3950 /* Lid closed */ 3951 #define EC_HANG_START_ON_LID_CLOSE BIT(1) 3952 3953 /* Lid opened */ 3954 #define EC_HANG_START_ON_LID_OPEN BIT(2) 3955 3956 /* Start of AP S3->S0 transition (booting or resuming from suspend) */ 3957 #define EC_HANG_START_ON_RESUME BIT(3) 3958 3959 /* Reasons to cancel hang detection */ 3960 3961 /* Power button released */ 3962 #define EC_HANG_STOP_ON_POWER_RELEASE BIT(8) 3963 3964 /* Any host command from AP received */ 3965 #define EC_HANG_STOP_ON_HOST_COMMAND BIT(9) 3966 3967 /* Stop on end of AP S0->S3 transition (suspending or shutting down) */ 3968 #define EC_HANG_STOP_ON_SUSPEND BIT(10) 3969 3970 /* 3971 * If this flag is set, all the other fields are ignored, and the hang detect 3972 * timer is started. This provides the AP a way to start the hang timer 3973 * without reconfiguring any of the other hang detect settings. Note that 3974 * you must previously have configured the timeouts. 3975 */ 3976 #define EC_HANG_START_NOW BIT(30) 3977 3978 /* 3979 * If this flag is set, all the other fields are ignored (including 3980 * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer 3981 * without reconfiguring any of the other hang detect settings. 3982 */ 3983 #define EC_HANG_STOP_NOW BIT(31) 3984 3985 struct ec_params_hang_detect { 3986 /* Flags; see EC_HANG_* */ 3987 uint32_t flags; 3988 3989 /* Timeout in msec before generating host event, if enabled */ 3990 uint16_t host_event_timeout_msec; 3991 3992 /* Timeout in msec before generating warm reboot, if enabled */ 3993 uint16_t warm_reboot_timeout_msec; 3994 } __ec_align4; 3995 3996 /*****************************************************************************/ 3997 /* Commands for battery charging */ 3998 3999 /* 4000 * This is the single catch-all host command to exchange data regarding the 4001 * charge state machine (v2 and up). 4002 */ 4003 #define EC_CMD_CHARGE_STATE 0x00A0 4004 4005 /* Subcommands for this host command */ 4006 enum charge_state_command { 4007 CHARGE_STATE_CMD_GET_STATE, 4008 CHARGE_STATE_CMD_GET_PARAM, 4009 CHARGE_STATE_CMD_SET_PARAM, 4010 CHARGE_STATE_NUM_CMDS 4011 }; 4012 4013 /* 4014 * Known param numbers are defined here. Ranges are reserved for board-specific 4015 * params, which are handled by the particular implementations. 4016 */ 4017 enum charge_state_params { 4018 CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */ 4019 CS_PARAM_CHG_CURRENT, /* charger current limit */ 4020 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ 4021 CS_PARAM_CHG_STATUS, /* charger-specific status */ 4022 CS_PARAM_CHG_OPTION, /* charger-specific options */ 4023 CS_PARAM_LIMIT_POWER, /* 4024 * Check if power is limited due to 4025 * low battery and / or a weak external 4026 * charger. READ ONLY. 4027 */ 4028 /* How many so far? */ 4029 CS_NUM_BASE_PARAMS, 4030 4031 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */ 4032 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, 4033 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, 4034 4035 /* Range for CONFIG_CHARGE_STATE_DEBUG params */ 4036 CS_PARAM_DEBUG_MIN = 0x20000, 4037 CS_PARAM_DEBUG_CTL_MODE = 0x20000, 4038 CS_PARAM_DEBUG_MANUAL_MODE, 4039 CS_PARAM_DEBUG_SEEMS_DEAD, 4040 CS_PARAM_DEBUG_SEEMS_DISCONNECTED, 4041 CS_PARAM_DEBUG_BATT_REMOVED, 4042 CS_PARAM_DEBUG_MANUAL_CURRENT, 4043 CS_PARAM_DEBUG_MANUAL_VOLTAGE, 4044 CS_PARAM_DEBUG_MAX = 0x2ffff, 4045 4046 /* Other custom param ranges go here... */ 4047 }; 4048 4049 struct ec_params_charge_state { 4050 uint8_t cmd; /* enum charge_state_command */ 4051 union { 4052 /* get_state has no args */ 4053 4054 struct __ec_todo_unpacked { 4055 uint32_t param; /* enum charge_state_param */ 4056 } get_param; 4057 4058 struct __ec_todo_unpacked { 4059 uint32_t param; /* param to set */ 4060 uint32_t value; /* value to set */ 4061 } set_param; 4062 }; 4063 } __ec_todo_packed; 4064 4065 struct ec_response_charge_state { 4066 union { 4067 struct __ec_align4 { 4068 int ac; 4069 int chg_voltage; 4070 int chg_current; 4071 int chg_input_current; 4072 int batt_state_of_charge; 4073 } get_state; 4074 4075 struct __ec_align4 { 4076 uint32_t value; 4077 } get_param; 4078 4079 /* set_param returns no args */ 4080 }; 4081 } __ec_align4; 4082 4083 4084 /* 4085 * Set maximum battery charging current. 4086 */ 4087 #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 4088 4089 struct ec_params_current_limit { 4090 uint32_t limit; /* in mA */ 4091 } __ec_align4; 4092 4093 /* 4094 * Set maximum external voltage / current. 4095 */ 4096 #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2 4097 4098 /* Command v0 is used only on Spring and is obsolete + unsupported */ 4099 struct ec_params_external_power_limit_v1 { 4100 uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ 4101 uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ 4102 } __ec_align2; 4103 4104 #define EC_POWER_LIMIT_NONE 0xffff 4105 4106 /* 4107 * Set maximum voltage & current of a dedicated charge port 4108 */ 4109 #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 4110 4111 struct ec_params_dedicated_charger_limit { 4112 uint16_t current_lim; /* in mA */ 4113 uint16_t voltage_lim; /* in mV */ 4114 } __ec_align2; 4115 4116 /*****************************************************************************/ 4117 /* Hibernate/Deep Sleep Commands */ 4118 4119 /* Set the delay before going into hibernation. */ 4120 #define EC_CMD_HIBERNATION_DELAY 0x00A8 4121 4122 struct ec_params_hibernation_delay { 4123 /* 4124 * Seconds to wait in G3 before hibernate. Pass in 0 to read the 4125 * current settings without changing them. 4126 */ 4127 uint32_t seconds; 4128 } __ec_align4; 4129 4130 struct ec_response_hibernation_delay { 4131 /* 4132 * The current time in seconds in which the system has been in the G3 4133 * state. This value is reset if the EC transitions out of G3. 4134 */ 4135 uint32_t time_g3; 4136 4137 /* 4138 * The current time remaining in seconds until the EC should hibernate. 4139 * This value is also reset if the EC transitions out of G3. 4140 */ 4141 uint32_t time_remaining; 4142 4143 /* 4144 * The current time in seconds that the EC should wait in G3 before 4145 * hibernating. 4146 */ 4147 uint32_t hibernate_delay; 4148 } __ec_align4; 4149 4150 /* Inform the EC when entering a sleep state */ 4151 #define EC_CMD_HOST_SLEEP_EVENT 0x00A9 4152 4153 enum host_sleep_event { 4154 HOST_SLEEP_EVENT_S3_SUSPEND = 1, 4155 HOST_SLEEP_EVENT_S3_RESUME = 2, 4156 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, 4157 HOST_SLEEP_EVENT_S0IX_RESUME = 4, 4158 /* S3 suspend with additional enabled wake sources */ 4159 HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5, 4160 }; 4161 4162 struct ec_params_host_sleep_event { 4163 uint8_t sleep_event; 4164 } __ec_align1; 4165 4166 /* 4167 * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep 4168 * transition failures 4169 */ 4170 #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0 4171 4172 /* Disable timeout detection for this sleep transition */ 4173 #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF 4174 4175 struct ec_params_host_sleep_event_v1 { 4176 /* The type of sleep being entered or exited. */ 4177 uint8_t sleep_event; 4178 4179 /* Padding */ 4180 uint8_t reserved; 4181 union { 4182 /* Parameters that apply for suspend messages. */ 4183 struct { 4184 /* 4185 * The timeout in milliseconds between when this message 4186 * is received and when the EC will declare sleep 4187 * transition failure if the sleep signal is not 4188 * asserted. 4189 */ 4190 uint16_t sleep_timeout_ms; 4191 } suspend_params; 4192 4193 /* No parameters for non-suspend messages. */ 4194 }; 4195 } __ec_align2; 4196 4197 /* A timeout occurred when this bit is set */ 4198 #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000 4199 4200 /* 4201 * The mask defining which bits correspond to the number of sleep transitions, 4202 * as well as the maximum number of suspend line transitions that will be 4203 * reported back to the host. 4204 */ 4205 #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF 4206 4207 struct ec_response_host_sleep_event_v1 { 4208 union { 4209 /* Response fields that apply for resume messages. */ 4210 struct { 4211 /* 4212 * The number of sleep power signal transitions that 4213 * occurred since the suspend message. The high bit 4214 * indicates a timeout occurred. 4215 */ 4216 uint32_t sleep_transitions; 4217 } resume_response; 4218 4219 /* No response fields for non-resume messages. */ 4220 }; 4221 } __ec_align4; 4222 4223 /*****************************************************************************/ 4224 /* Device events */ 4225 #define EC_CMD_DEVICE_EVENT 0x00AA 4226 4227 enum ec_device_event { 4228 EC_DEVICE_EVENT_TRACKPAD, 4229 EC_DEVICE_EVENT_DSP, 4230 EC_DEVICE_EVENT_WIFI, 4231 EC_DEVICE_EVENT_WLC, 4232 }; 4233 4234 enum ec_device_event_param { 4235 /* Get and clear pending device events */ 4236 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, 4237 /* Get device event mask */ 4238 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, 4239 /* Set device event mask */ 4240 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, 4241 }; 4242 4243 #define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32) 4244 4245 struct ec_params_device_event { 4246 uint32_t event_mask; 4247 uint8_t param; 4248 } __ec_align_size1; 4249 4250 struct ec_response_device_event { 4251 uint32_t event_mask; 4252 } __ec_align4; 4253 4254 /*****************************************************************************/ 4255 /* Smart battery pass-through */ 4256 4257 /* Get / Set 16-bit smart battery registers */ 4258 #define EC_CMD_SB_READ_WORD 0x00B0 4259 #define EC_CMD_SB_WRITE_WORD 0x00B1 4260 4261 /* Get / Set string smart battery parameters 4262 * formatted as SMBUS "block". 4263 */ 4264 #define EC_CMD_SB_READ_BLOCK 0x00B2 4265 #define EC_CMD_SB_WRITE_BLOCK 0x00B3 4266 4267 struct ec_params_sb_rd { 4268 uint8_t reg; 4269 } __ec_align1; 4270 4271 struct ec_response_sb_rd_word { 4272 uint16_t value; 4273 } __ec_align2; 4274 4275 struct ec_params_sb_wr_word { 4276 uint8_t reg; 4277 uint16_t value; 4278 } __ec_align1; 4279 4280 struct ec_response_sb_rd_block { 4281 uint8_t data[32]; 4282 } __ec_align1; 4283 4284 struct ec_params_sb_wr_block { 4285 uint8_t reg; 4286 uint16_t data[32]; 4287 } __ec_align1; 4288 4289 /*****************************************************************************/ 4290 /* Battery vendor parameters 4291 * 4292 * Get or set vendor-specific parameters in the battery. Implementations may 4293 * differ between boards or batteries. On a set operation, the response 4294 * contains the actual value set, which may be rounded or clipped from the 4295 * requested value. 4296 */ 4297 4298 #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 4299 4300 enum ec_battery_vendor_param_mode { 4301 BATTERY_VENDOR_PARAM_MODE_GET = 0, 4302 BATTERY_VENDOR_PARAM_MODE_SET, 4303 }; 4304 4305 struct ec_params_battery_vendor_param { 4306 uint32_t param; 4307 uint32_t value; 4308 uint8_t mode; 4309 } __ec_align_size1; 4310 4311 struct ec_response_battery_vendor_param { 4312 uint32_t value; 4313 } __ec_align4; 4314 4315 /*****************************************************************************/ 4316 /* 4317 * Smart Battery Firmware Update Commands 4318 */ 4319 #define EC_CMD_SB_FW_UPDATE 0x00B5 4320 4321 enum ec_sb_fw_update_subcmd { 4322 EC_SB_FW_UPDATE_PREPARE = 0x0, 4323 EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ 4324 EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ 4325 EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ 4326 EC_SB_FW_UPDATE_END = 0x4, 4327 EC_SB_FW_UPDATE_STATUS = 0x5, 4328 EC_SB_FW_UPDATE_PROTECT = 0x6, 4329 EC_SB_FW_UPDATE_MAX = 0x7, 4330 }; 4331 4332 #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 4333 #define SB_FW_UPDATE_CMD_STATUS_SIZE 2 4334 #define SB_FW_UPDATE_CMD_INFO_SIZE 8 4335 4336 struct ec_sb_fw_update_header { 4337 uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */ 4338 uint16_t fw_id; /* firmware id */ 4339 } __ec_align4; 4340 4341 struct ec_params_sb_fw_update { 4342 struct ec_sb_fw_update_header hdr; 4343 union { 4344 /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ 4345 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 4346 /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ 4347 /* EC_SB_FW_UPDATE_END = 0x4 */ 4348 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 4349 /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ 4350 /* Those have no args */ 4351 4352 /* EC_SB_FW_UPDATE_WRITE = 0x3 */ 4353 struct __ec_align4 { 4354 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; 4355 } write; 4356 }; 4357 } __ec_align4; 4358 4359 struct ec_response_sb_fw_update { 4360 union { 4361 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 4362 struct __ec_align1 { 4363 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; 4364 } info; 4365 4366 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 4367 struct __ec_align1 { 4368 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; 4369 } status; 4370 }; 4371 } __ec_align1; 4372 4373 /* 4374 * Entering Verified Boot Mode Command 4375 * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. 4376 * Valid Modes are: normal, developer, and recovery. 4377 */ 4378 #define EC_CMD_ENTERING_MODE 0x00B6 4379 4380 struct ec_params_entering_mode { 4381 int vboot_mode; 4382 } __ec_align4; 4383 4384 #define VBOOT_MODE_NORMAL 0 4385 #define VBOOT_MODE_DEVELOPER 1 4386 #define VBOOT_MODE_RECOVERY 2 4387 4388 /*****************************************************************************/ 4389 /* 4390 * I2C passthru protection command: Protects I2C tunnels against access on 4391 * certain addresses (board-specific). 4392 */ 4393 #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 4394 4395 enum ec_i2c_passthru_protect_subcmd { 4396 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, 4397 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, 4398 }; 4399 4400 struct ec_params_i2c_passthru_protect { 4401 uint8_t subcmd; 4402 uint8_t port; /* I2C port number */ 4403 } __ec_align1; 4404 4405 struct ec_response_i2c_passthru_protect { 4406 uint8_t status; /* Status flags (0: unlocked, 1: locked) */ 4407 } __ec_align1; 4408 4409 4410 /*****************************************************************************/ 4411 /* 4412 * HDMI CEC commands 4413 * 4414 * These commands are for sending and receiving message via HDMI CEC 4415 */ 4416 4417 #define MAX_CEC_MSG_LEN 16 4418 4419 /* CEC message from the AP to be written on the CEC bus */ 4420 #define EC_CMD_CEC_WRITE_MSG 0x00B8 4421 4422 /** 4423 * struct ec_params_cec_write - Message to write to the CEC bus 4424 * @msg: message content to write to the CEC bus 4425 */ 4426 struct ec_params_cec_write { 4427 uint8_t msg[MAX_CEC_MSG_LEN]; 4428 } __ec_align1; 4429 4430 /* Set various CEC parameters */ 4431 #define EC_CMD_CEC_SET 0x00BA 4432 4433 /** 4434 * struct ec_params_cec_set - CEC parameters set 4435 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4436 * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC 4437 * or 1 to enable CEC functionality, in case cmd is 4438 * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical 4439 * address between 0 and 15 or 0xff to unregister 4440 */ 4441 struct ec_params_cec_set { 4442 uint8_t cmd; /* enum cec_command */ 4443 uint8_t val; 4444 } __ec_align1; 4445 4446 /* Read various CEC parameters */ 4447 #define EC_CMD_CEC_GET 0x00BB 4448 4449 /** 4450 * struct ec_params_cec_get - CEC parameters get 4451 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4452 */ 4453 struct ec_params_cec_get { 4454 uint8_t cmd; /* enum cec_command */ 4455 } __ec_align1; 4456 4457 /** 4458 * struct ec_response_cec_get - CEC parameters get response 4459 * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is 4460 * disabled or 1 if CEC functionality is enabled, 4461 * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the 4462 * configured logical address between 0 and 15 or 0xff if unregistered 4463 */ 4464 struct ec_response_cec_get { 4465 uint8_t val; 4466 } __ec_align1; 4467 4468 /* CEC parameters command */ 4469 enum cec_command { 4470 /* CEC reading, writing and events enable */ 4471 CEC_CMD_ENABLE, 4472 /* CEC logical address */ 4473 CEC_CMD_LOGICAL_ADDRESS, 4474 }; 4475 4476 /* Events from CEC to AP */ 4477 enum mkbp_cec_event { 4478 /* Outgoing message was acknowledged by a follower */ 4479 EC_MKBP_CEC_SEND_OK = BIT(0), 4480 /* Outgoing message was not acknowledged */ 4481 EC_MKBP_CEC_SEND_FAILED = BIT(1), 4482 }; 4483 4484 /*****************************************************************************/ 4485 4486 /* Commands for audio codec. */ 4487 #define EC_CMD_EC_CODEC 0x00BC 4488 4489 enum ec_codec_subcmd { 4490 EC_CODEC_GET_CAPABILITIES = 0x0, 4491 EC_CODEC_GET_SHM_ADDR = 0x1, 4492 EC_CODEC_SET_SHM_ADDR = 0x2, 4493 EC_CODEC_SUBCMD_COUNT, 4494 }; 4495 4496 enum ec_codec_cap { 4497 EC_CODEC_CAP_WOV_AUDIO_SHM = 0, 4498 EC_CODEC_CAP_WOV_LANG_SHM = 1, 4499 EC_CODEC_CAP_LAST = 32, 4500 }; 4501 4502 enum ec_codec_shm_id { 4503 EC_CODEC_SHM_ID_WOV_AUDIO = 0x0, 4504 EC_CODEC_SHM_ID_WOV_LANG = 0x1, 4505 EC_CODEC_SHM_ID_LAST, 4506 }; 4507 4508 enum ec_codec_shm_type { 4509 EC_CODEC_SHM_TYPE_EC_RAM = 0x0, 4510 EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1, 4511 }; 4512 4513 struct __ec_align1 ec_param_ec_codec_get_shm_addr { 4514 uint8_t shm_id; 4515 uint8_t reserved[3]; 4516 }; 4517 4518 struct __ec_align4 ec_param_ec_codec_set_shm_addr { 4519 uint64_t phys_addr; 4520 uint32_t len; 4521 uint8_t shm_id; 4522 uint8_t reserved[3]; 4523 }; 4524 4525 struct __ec_align4 ec_param_ec_codec { 4526 uint8_t cmd; /* enum ec_codec_subcmd */ 4527 uint8_t reserved[3]; 4528 4529 union { 4530 struct ec_param_ec_codec_get_shm_addr 4531 get_shm_addr_param; 4532 struct ec_param_ec_codec_set_shm_addr 4533 set_shm_addr_param; 4534 }; 4535 }; 4536 4537 struct __ec_align4 ec_response_ec_codec_get_capabilities { 4538 uint32_t capabilities; 4539 }; 4540 4541 struct __ec_align4 ec_response_ec_codec_get_shm_addr { 4542 uint64_t phys_addr; 4543 uint32_t len; 4544 uint8_t type; 4545 uint8_t reserved[3]; 4546 }; 4547 4548 /*****************************************************************************/ 4549 4550 /* Commands for DMIC on audio codec. */ 4551 #define EC_CMD_EC_CODEC_DMIC 0x00BD 4552 4553 enum ec_codec_dmic_subcmd { 4554 EC_CODEC_DMIC_GET_MAX_GAIN = 0x0, 4555 EC_CODEC_DMIC_SET_GAIN_IDX = 0x1, 4556 EC_CODEC_DMIC_GET_GAIN_IDX = 0x2, 4557 EC_CODEC_DMIC_SUBCMD_COUNT, 4558 }; 4559 4560 enum ec_codec_dmic_channel { 4561 EC_CODEC_DMIC_CHANNEL_0 = 0x0, 4562 EC_CODEC_DMIC_CHANNEL_1 = 0x1, 4563 EC_CODEC_DMIC_CHANNEL_2 = 0x2, 4564 EC_CODEC_DMIC_CHANNEL_3 = 0x3, 4565 EC_CODEC_DMIC_CHANNEL_4 = 0x4, 4566 EC_CODEC_DMIC_CHANNEL_5 = 0x5, 4567 EC_CODEC_DMIC_CHANNEL_6 = 0x6, 4568 EC_CODEC_DMIC_CHANNEL_7 = 0x7, 4569 EC_CODEC_DMIC_CHANNEL_COUNT, 4570 }; 4571 4572 struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx { 4573 uint8_t channel; /* enum ec_codec_dmic_channel */ 4574 uint8_t gain; 4575 uint8_t reserved[2]; 4576 }; 4577 4578 struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx { 4579 uint8_t channel; /* enum ec_codec_dmic_channel */ 4580 uint8_t reserved[3]; 4581 }; 4582 4583 struct __ec_align4 ec_param_ec_codec_dmic { 4584 uint8_t cmd; /* enum ec_codec_dmic_subcmd */ 4585 uint8_t reserved[3]; 4586 4587 union { 4588 struct ec_param_ec_codec_dmic_set_gain_idx 4589 set_gain_idx_param; 4590 struct ec_param_ec_codec_dmic_get_gain_idx 4591 get_gain_idx_param; 4592 }; 4593 }; 4594 4595 struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain { 4596 uint8_t max_gain; 4597 }; 4598 4599 struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx { 4600 uint8_t gain; 4601 }; 4602 4603 /*****************************************************************************/ 4604 4605 /* Commands for I2S RX on audio codec. */ 4606 4607 #define EC_CMD_EC_CODEC_I2S_RX 0x00BE 4608 4609 enum ec_codec_i2s_rx_subcmd { 4610 EC_CODEC_I2S_RX_ENABLE = 0x0, 4611 EC_CODEC_I2S_RX_DISABLE = 0x1, 4612 EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2, 4613 EC_CODEC_I2S_RX_SET_DAIFMT = 0x3, 4614 EC_CODEC_I2S_RX_SET_BCLK = 0x4, 4615 EC_CODEC_I2S_RX_RESET = 0x5, 4616 EC_CODEC_I2S_RX_SUBCMD_COUNT, 4617 }; 4618 4619 enum ec_codec_i2s_rx_sample_depth { 4620 EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0, 4621 EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1, 4622 EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT, 4623 }; 4624 4625 enum ec_codec_i2s_rx_daifmt { 4626 EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0, 4627 EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1, 4628 EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2, 4629 EC_CODEC_I2S_RX_DAIFMT_COUNT, 4630 }; 4631 4632 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth { 4633 uint8_t depth; 4634 uint8_t reserved[3]; 4635 }; 4636 4637 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain { 4638 uint8_t left; 4639 uint8_t right; 4640 uint8_t reserved[2]; 4641 }; 4642 4643 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt { 4644 uint8_t daifmt; 4645 uint8_t reserved[3]; 4646 }; 4647 4648 struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk { 4649 uint32_t bclk; 4650 }; 4651 4652 struct __ec_align4 ec_param_ec_codec_i2s_rx { 4653 uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */ 4654 uint8_t reserved[3]; 4655 4656 union { 4657 struct ec_param_ec_codec_i2s_rx_set_sample_depth 4658 set_sample_depth_param; 4659 struct ec_param_ec_codec_i2s_rx_set_daifmt 4660 set_daifmt_param; 4661 struct ec_param_ec_codec_i2s_rx_set_bclk 4662 set_bclk_param; 4663 }; 4664 }; 4665 4666 /*****************************************************************************/ 4667 /* Commands for WoV on audio codec. */ 4668 4669 #define EC_CMD_EC_CODEC_WOV 0x00BF 4670 4671 enum ec_codec_wov_subcmd { 4672 EC_CODEC_WOV_SET_LANG = 0x0, 4673 EC_CODEC_WOV_SET_LANG_SHM = 0x1, 4674 EC_CODEC_WOV_GET_LANG = 0x2, 4675 EC_CODEC_WOV_ENABLE = 0x3, 4676 EC_CODEC_WOV_DISABLE = 0x4, 4677 EC_CODEC_WOV_READ_AUDIO = 0x5, 4678 EC_CODEC_WOV_READ_AUDIO_SHM = 0x6, 4679 EC_CODEC_WOV_SUBCMD_COUNT, 4680 }; 4681 4682 /* 4683 * @hash is SHA256 of the whole language model. 4684 * @total_len indicates the length of whole language model. 4685 * @offset is the cursor from the beginning of the model. 4686 * @buf is the packet buffer. 4687 * @len denotes how many bytes in the buf. 4688 */ 4689 struct __ec_align4 ec_param_ec_codec_wov_set_lang { 4690 uint8_t hash[32]; 4691 uint32_t total_len; 4692 uint32_t offset; 4693 uint8_t buf[128]; 4694 uint32_t len; 4695 }; 4696 4697 struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm { 4698 uint8_t hash[32]; 4699 uint32_t total_len; 4700 }; 4701 4702 struct __ec_align4 ec_param_ec_codec_wov { 4703 uint8_t cmd; /* enum ec_codec_wov_subcmd */ 4704 uint8_t reserved[3]; 4705 4706 union { 4707 struct ec_param_ec_codec_wov_set_lang 4708 set_lang_param; 4709 struct ec_param_ec_codec_wov_set_lang_shm 4710 set_lang_shm_param; 4711 }; 4712 }; 4713 4714 struct __ec_align4 ec_response_ec_codec_wov_get_lang { 4715 uint8_t hash[32]; 4716 }; 4717 4718 struct __ec_align4 ec_response_ec_codec_wov_read_audio { 4719 uint8_t buf[128]; 4720 uint32_t len; 4721 }; 4722 4723 struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm { 4724 uint32_t offset; 4725 uint32_t len; 4726 }; 4727 4728 /*****************************************************************************/ 4729 /* System commands */ 4730 4731 /* 4732 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't 4733 * necessarily reboot the EC. Rename to "image" or something similar? 4734 */ 4735 #define EC_CMD_REBOOT_EC 0x00D2 4736 4737 /* Command */ 4738 enum ec_reboot_cmd { 4739 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ 4740 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ 4741 EC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */ 4742 /* (command 3 was jump to RW-B) */ 4743 EC_REBOOT_COLD = 4, /* Cold-reboot */ 4744 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ 4745 EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ 4746 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ 4747 EC_REBOOT_COLD_AP_OFF = 8, /* Cold-reboot and don't boot AP */ 4748 }; 4749 4750 /* Flags for ec_params_reboot_ec.reboot_flags */ 4751 #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */ 4752 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */ 4753 #define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */ 4754 4755 struct ec_params_reboot_ec { 4756 uint8_t cmd; /* enum ec_reboot_cmd */ 4757 uint8_t flags; /* See EC_REBOOT_FLAG_* */ 4758 } __ec_align1; 4759 4760 /* 4761 * Get information on last EC panic. 4762 * 4763 * Returns variable-length platform-dependent panic information. See panic.h 4764 * for details. 4765 */ 4766 #define EC_CMD_GET_PANIC_INFO 0x00D3 4767 4768 /*****************************************************************************/ 4769 /* 4770 * Special commands 4771 * 4772 * These do not follow the normal rules for commands. See each command for 4773 * details. 4774 */ 4775 4776 /* 4777 * Reboot NOW 4778 * 4779 * This command will work even when the EC LPC interface is busy, because the 4780 * reboot command is processed at interrupt level. Note that when the EC 4781 * reboots, the host will reboot too, so there is no response to this command. 4782 * 4783 * Use EC_CMD_REBOOT_EC to reboot the EC more politely. 4784 */ 4785 #define EC_CMD_REBOOT 0x00D1 /* Think "die" */ 4786 4787 /* 4788 * Resend last response (not supported on LPC). 4789 * 4790 * Returns EC_RES_UNAVAILABLE if there is no response available - for example, 4791 * there was no previous command, or the previous command's response was too 4792 * big to save. 4793 */ 4794 #define EC_CMD_RESEND_RESPONSE 0x00DB 4795 4796 /* 4797 * This header byte on a command indicate version 0. Any header byte less 4798 * than this means that we are talking to an old EC which doesn't support 4799 * versioning. In that case, we assume version 0. 4800 * 4801 * Header bytes greater than this indicate a later version. For example, 4802 * EC_CMD_VERSION0 + 1 means we are using version 1. 4803 * 4804 * The old EC interface must not use commands 0xdc or higher. 4805 */ 4806 #define EC_CMD_VERSION0 0x00DC 4807 4808 /*****************************************************************************/ 4809 /* 4810 * PD commands 4811 * 4812 * These commands are for PD MCU communication. 4813 */ 4814 4815 /* EC to PD MCU exchange status command */ 4816 #define EC_CMD_PD_EXCHANGE_STATUS 0x0100 4817 #define EC_VER_PD_EXCHANGE_STATUS 2 4818 4819 enum pd_charge_state { 4820 PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ 4821 PD_CHARGE_NONE, /* No charging allowed */ 4822 PD_CHARGE_5V, /* 5V charging only */ 4823 PD_CHARGE_MAX /* Charge at max voltage */ 4824 }; 4825 4826 /* Status of EC being sent to PD */ 4827 #define EC_STATUS_HIBERNATING BIT(0) 4828 4829 struct ec_params_pd_status { 4830 uint8_t status; /* EC status */ 4831 int8_t batt_soc; /* battery state of charge */ 4832 uint8_t charge_state; /* charging state (from enum pd_charge_state) */ 4833 } __ec_align1; 4834 4835 /* Status of PD being sent back to EC */ 4836 #define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */ 4837 #define PD_STATUS_IN_RW BIT(1) /* Running RW image */ 4838 #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */ 4839 #define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */ 4840 #define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */ 4841 #define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */ 4842 #define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */ 4843 #define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ 4844 PD_STATUS_TCPC_ALERT_1 | \ 4845 PD_STATUS_HOST_EVENT) 4846 struct ec_response_pd_status { 4847 uint32_t curr_lim_ma; /* input current limit */ 4848 uint16_t status; /* PD MCU status */ 4849 int8_t active_charge_port; /* active charging port */ 4850 } __ec_align_size1; 4851 4852 /* AP to PD MCU host event status command, cleared on read */ 4853 #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 4854 4855 /* PD MCU host event status bits */ 4856 #define PD_EVENT_UPDATE_DEVICE BIT(0) 4857 #define PD_EVENT_POWER_CHANGE BIT(1) 4858 #define PD_EVENT_IDENTITY_RECEIVED BIT(2) 4859 #define PD_EVENT_DATA_SWAP BIT(3) 4860 struct ec_response_host_event_status { 4861 uint32_t status; /* PD MCU host event status */ 4862 } __ec_align4; 4863 4864 /* Set USB type-C port role and muxes */ 4865 #define EC_CMD_USB_PD_CONTROL 0x0101 4866 4867 enum usb_pd_control_role { 4868 USB_PD_CTRL_ROLE_NO_CHANGE = 0, 4869 USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */ 4870 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, 4871 USB_PD_CTRL_ROLE_FORCE_SINK = 3, 4872 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, 4873 USB_PD_CTRL_ROLE_FREEZE = 5, 4874 USB_PD_CTRL_ROLE_COUNT 4875 }; 4876 4877 enum usb_pd_control_mux { 4878 USB_PD_CTRL_MUX_NO_CHANGE = 0, 4879 USB_PD_CTRL_MUX_NONE = 1, 4880 USB_PD_CTRL_MUX_USB = 2, 4881 USB_PD_CTRL_MUX_DP = 3, 4882 USB_PD_CTRL_MUX_DOCK = 4, 4883 USB_PD_CTRL_MUX_AUTO = 5, 4884 USB_PD_CTRL_MUX_COUNT 4885 }; 4886 4887 enum usb_pd_control_swap { 4888 USB_PD_CTRL_SWAP_NONE = 0, 4889 USB_PD_CTRL_SWAP_DATA = 1, 4890 USB_PD_CTRL_SWAP_POWER = 2, 4891 USB_PD_CTRL_SWAP_VCONN = 3, 4892 USB_PD_CTRL_SWAP_COUNT 4893 }; 4894 4895 struct ec_params_usb_pd_control { 4896 uint8_t port; 4897 uint8_t role; 4898 uint8_t mux; 4899 uint8_t swap; 4900 } __ec_align1; 4901 4902 #define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */ 4903 #define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */ 4904 #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */ 4905 4906 #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */ 4907 #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */ 4908 #define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */ 4909 #define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */ 4910 #define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */ 4911 #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */ 4912 #define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */ 4913 4914 struct ec_response_usb_pd_control { 4915 uint8_t enabled; 4916 uint8_t role; 4917 uint8_t polarity; 4918 uint8_t state; 4919 } __ec_align1; 4920 4921 struct ec_response_usb_pd_control_v1 { 4922 uint8_t enabled; 4923 uint8_t role; 4924 uint8_t polarity; 4925 char state[32]; 4926 } __ec_align1; 4927 4928 /* Values representing usbc PD CC state */ 4929 #define USBC_PD_CC_NONE 0 /* No accessory connected */ 4930 #define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */ 4931 #define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */ 4932 #define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */ 4933 #define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */ 4934 #define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */ 4935 4936 /* Active/Passive Cable */ 4937 #define USB_PD_CTRL_ACTIVE_CABLE BIT(0) 4938 /* Optical/Non-optical cable */ 4939 #define USB_PD_CTRL_OPTICAL_CABLE BIT(1) 4940 /* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */ 4941 #define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2) 4942 /* Active Link Uni-Direction */ 4943 #define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3) 4944 4945 struct ec_response_usb_pd_control_v2 { 4946 uint8_t enabled; 4947 uint8_t role; 4948 uint8_t polarity; 4949 char state[32]; 4950 uint8_t cc_state; /* enum pd_cc_states representing cc state */ 4951 uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */ 4952 uint8_t reserved; /* Reserved for future use */ 4953 uint8_t control_flags; /* USB_PD_CTRL_*flags */ 4954 uint8_t cable_speed; /* TBT_SS_* cable speed */ 4955 uint8_t cable_gen; /* TBT_GEN3_* cable rounded support */ 4956 } __ec_align1; 4957 4958 #define EC_CMD_USB_PD_PORTS 0x0102 4959 4960 /* Maximum number of PD ports on a device, num_ports will be <= this */ 4961 #define EC_USB_PD_MAX_PORTS 8 4962 4963 struct ec_response_usb_pd_ports { 4964 uint8_t num_ports; 4965 } __ec_align1; 4966 4967 #define EC_CMD_USB_PD_POWER_INFO 0x0103 4968 4969 #define PD_POWER_CHARGING_PORT 0xff 4970 struct ec_params_usb_pd_power_info { 4971 uint8_t port; 4972 } __ec_align1; 4973 4974 enum usb_chg_type { 4975 USB_CHG_TYPE_NONE, 4976 USB_CHG_TYPE_PD, 4977 USB_CHG_TYPE_C, 4978 USB_CHG_TYPE_PROPRIETARY, 4979 USB_CHG_TYPE_BC12_DCP, 4980 USB_CHG_TYPE_BC12_CDP, 4981 USB_CHG_TYPE_BC12_SDP, 4982 USB_CHG_TYPE_OTHER, 4983 USB_CHG_TYPE_VBUS, 4984 USB_CHG_TYPE_UNKNOWN, 4985 USB_CHG_TYPE_DEDICATED, 4986 }; 4987 enum usb_power_roles { 4988 USB_PD_PORT_POWER_DISCONNECTED, 4989 USB_PD_PORT_POWER_SOURCE, 4990 USB_PD_PORT_POWER_SINK, 4991 USB_PD_PORT_POWER_SINK_NOT_CHARGING, 4992 }; 4993 4994 struct usb_chg_measures { 4995 uint16_t voltage_max; 4996 uint16_t voltage_now; 4997 uint16_t current_max; 4998 uint16_t current_lim; 4999 } __ec_align2; 5000 5001 struct ec_response_usb_pd_power_info { 5002 uint8_t role; 5003 uint8_t type; 5004 uint8_t dualrole; 5005 uint8_t reserved1; 5006 struct usb_chg_measures meas; 5007 uint32_t max_power; 5008 } __ec_align4; 5009 5010 5011 /* 5012 * This command will return the number of USB PD charge port + the number 5013 * of dedicated port present. 5014 * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports 5015 */ 5016 #define EC_CMD_CHARGE_PORT_COUNT 0x0105 5017 struct ec_response_charge_port_count { 5018 uint8_t port_count; 5019 } __ec_align1; 5020 5021 /* Write USB-PD device FW */ 5022 #define EC_CMD_USB_PD_FW_UPDATE 0x0110 5023 5024 enum usb_pd_fw_update_cmds { 5025 USB_PD_FW_REBOOT, 5026 USB_PD_FW_FLASH_ERASE, 5027 USB_PD_FW_FLASH_WRITE, 5028 USB_PD_FW_ERASE_SIG, 5029 }; 5030 5031 struct ec_params_usb_pd_fw_update { 5032 uint16_t dev_id; 5033 uint8_t cmd; 5034 uint8_t port; 5035 uint32_t size; /* Size to write in bytes */ 5036 /* Followed by data to write */ 5037 } __ec_align4; 5038 5039 /* Write USB-PD Accessory RW_HASH table entry */ 5040 #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 5041 /* RW hash is first 20 bytes of SHA-256 of RW section */ 5042 #define PD_RW_HASH_SIZE 20 5043 struct ec_params_usb_pd_rw_hash_entry { 5044 uint16_t dev_id; 5045 uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; 5046 uint8_t reserved; /* 5047 * For alignment of current_image 5048 * TODO(rspangler) but it's not aligned! 5049 * Should have been reserved[2]. 5050 */ 5051 uint32_t current_image; /* One of ec_current_image */ 5052 } __ec_align1; 5053 5054 /* Read USB-PD Accessory info */ 5055 #define EC_CMD_USB_PD_DEV_INFO 0x0112 5056 5057 struct ec_params_usb_pd_info_request { 5058 uint8_t port; 5059 } __ec_align1; 5060 5061 /* Read USB-PD Device discovery info */ 5062 #define EC_CMD_USB_PD_DISCOVERY 0x0113 5063 struct ec_params_usb_pd_discovery_entry { 5064 uint16_t vid; /* USB-IF VID */ 5065 uint16_t pid; /* USB-IF PID */ 5066 uint8_t ptype; /* product type (hub,periph,cable,ama) */ 5067 } __ec_align_size1; 5068 5069 /* Override default charge behavior */ 5070 #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 5071 5072 /* Negative port parameters have special meaning */ 5073 enum usb_pd_override_ports { 5074 OVERRIDE_DONT_CHARGE = -2, 5075 OVERRIDE_OFF = -1, 5076 /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ 5077 }; 5078 5079 struct ec_params_charge_port_override { 5080 int16_t override_port; /* Override port# */ 5081 } __ec_align2; 5082 5083 /* 5084 * Read (and delete) one entry of PD event log. 5085 * TODO(crbug.com/751742): Make this host command more generic to accommodate 5086 * future non-PD logs that use the same internal EC event_log. 5087 */ 5088 #define EC_CMD_PD_GET_LOG_ENTRY 0x0115 5089 5090 struct ec_response_pd_log { 5091 uint32_t timestamp; /* relative timestamp in milliseconds */ 5092 uint8_t type; /* event type : see PD_EVENT_xx below */ 5093 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ 5094 uint16_t data; /* type-defined data payload */ 5095 uint8_t payload[]; /* optional additional data payload: 0..16 bytes */ 5096 } __ec_align4; 5097 5098 /* The timestamp is the microsecond counter shifted to get about a ms. */ 5099 #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ 5100 5101 #define PD_LOG_SIZE_MASK 0x1f 5102 #define PD_LOG_PORT_MASK 0xe0 5103 #define PD_LOG_PORT_SHIFT 5 5104 #define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \ 5105 ((size) & PD_LOG_SIZE_MASK)) 5106 #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT) 5107 #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK) 5108 5109 /* PD event log : entry types */ 5110 /* PD MCU events */ 5111 #define PD_EVENT_MCU_BASE 0x00 5112 #define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0) 5113 #define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1) 5114 /* Reserved for custom board event */ 5115 #define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2) 5116 /* PD generic accessory events */ 5117 #define PD_EVENT_ACC_BASE 0x20 5118 #define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0) 5119 #define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1) 5120 /* PD power supply events */ 5121 #define PD_EVENT_PS_BASE 0x40 5122 #define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0) 5123 /* PD video dongles events */ 5124 #define PD_EVENT_VIDEO_BASE 0x60 5125 #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0) 5126 #define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1) 5127 /* Returned in the "type" field, when there is no entry available */ 5128 #define PD_EVENT_NO_ENTRY 0xff 5129 5130 /* 5131 * PD_EVENT_MCU_CHARGE event definition : 5132 * the payload is "struct usb_chg_measures" 5133 * the data field contains the port state flags as defined below : 5134 */ 5135 /* Port partner is a dual role device */ 5136 #define CHARGE_FLAGS_DUAL_ROLE BIT(15) 5137 /* Port is the pending override port */ 5138 #define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14) 5139 /* Port is the override port */ 5140 #define CHARGE_FLAGS_OVERRIDE BIT(13) 5141 /* Charger type */ 5142 #define CHARGE_FLAGS_TYPE_SHIFT 3 5143 #define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT) 5144 /* Power delivery role */ 5145 #define CHARGE_FLAGS_ROLE_MASK (7 << 0) 5146 5147 /* 5148 * PD_EVENT_PS_FAULT data field flags definition : 5149 */ 5150 #define PS_FAULT_OCP 1 5151 #define PS_FAULT_FAST_OCP 2 5152 #define PS_FAULT_OVP 3 5153 #define PS_FAULT_DISCH 4 5154 5155 /* 5156 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info". 5157 */ 5158 struct mcdp_version { 5159 uint8_t major; 5160 uint8_t minor; 5161 uint16_t build; 5162 } __ec_align4; 5163 5164 struct mcdp_info { 5165 uint8_t family[2]; 5166 uint8_t chipid[2]; 5167 struct mcdp_version irom; 5168 struct mcdp_version fw; 5169 } __ec_align4; 5170 5171 /* struct mcdp_info field decoding */ 5172 #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) 5173 #define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) 5174 5175 /* Get/Set USB-PD Alternate mode info */ 5176 #define EC_CMD_USB_PD_GET_AMODE 0x0116 5177 struct ec_params_usb_pd_get_mode_request { 5178 uint16_t svid_idx; /* SVID index to get */ 5179 uint8_t port; /* port */ 5180 } __ec_align_size1; 5181 5182 struct ec_params_usb_pd_get_mode_response { 5183 uint16_t svid; /* SVID */ 5184 uint16_t opos; /* Object Position */ 5185 uint32_t vdo[6]; /* Mode VDOs */ 5186 } __ec_align4; 5187 5188 #define EC_CMD_USB_PD_SET_AMODE 0x0117 5189 5190 enum pd_mode_cmd { 5191 PD_EXIT_MODE = 0, 5192 PD_ENTER_MODE = 1, 5193 /* Not a command. Do NOT remove. */ 5194 PD_MODE_CMD_COUNT, 5195 }; 5196 5197 struct ec_params_usb_pd_set_mode_request { 5198 uint32_t cmd; /* enum pd_mode_cmd */ 5199 uint16_t svid; /* SVID to set */ 5200 uint8_t opos; /* Object Position */ 5201 uint8_t port; /* port */ 5202 } __ec_align4; 5203 5204 /* Ask the PD MCU to record a log of a requested type */ 5205 #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 5206 5207 struct ec_params_pd_write_log_entry { 5208 uint8_t type; /* event type : see PD_EVENT_xx above */ 5209 uint8_t port; /* port#, or 0 for events unrelated to a given port */ 5210 } __ec_align1; 5211 5212 5213 /* Control USB-PD chip */ 5214 #define EC_CMD_PD_CONTROL 0x0119 5215 5216 enum ec_pd_control_cmd { 5217 PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ 5218 PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ 5219 PD_RESET, /* Force reset the PD chip */ 5220 PD_CONTROL_DISABLE, /* Disable further calls to this command */ 5221 PD_CHIP_ON, /* Power on the PD chip */ 5222 }; 5223 5224 struct ec_params_pd_control { 5225 uint8_t chip; /* chip id */ 5226 uint8_t subcmd; 5227 } __ec_align1; 5228 5229 /* Get info about USB-C SS muxes */ 5230 #define EC_CMD_USB_PD_MUX_INFO 0x011A 5231 5232 struct ec_params_usb_pd_mux_info { 5233 uint8_t port; /* USB-C port number */ 5234 } __ec_align1; 5235 5236 /* Flags representing mux state */ 5237 #define USB_PD_MUX_NONE 0 /* Open switch */ 5238 #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ 5239 #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ 5240 #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ 5241 #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ 5242 #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ 5243 #define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */ 5244 #define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */ 5245 #define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */ 5246 5247 struct ec_response_usb_pd_mux_info { 5248 uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ 5249 } __ec_align1; 5250 5251 #define EC_CMD_PD_CHIP_INFO 0x011B 5252 5253 struct ec_params_pd_chip_info { 5254 uint8_t port; /* USB-C port number */ 5255 uint8_t renew; /* Force renewal */ 5256 } __ec_align1; 5257 5258 struct ec_response_pd_chip_info { 5259 uint16_t vendor_id; 5260 uint16_t product_id; 5261 uint16_t device_id; 5262 union { 5263 uint8_t fw_version_string[8]; 5264 uint64_t fw_version_number; 5265 }; 5266 } __ec_align2; 5267 5268 struct ec_response_pd_chip_info_v1 { 5269 uint16_t vendor_id; 5270 uint16_t product_id; 5271 uint16_t device_id; 5272 union { 5273 uint8_t fw_version_string[8]; 5274 uint64_t fw_version_number; 5275 }; 5276 union { 5277 uint8_t min_req_fw_version_string[8]; 5278 uint64_t min_req_fw_version_number; 5279 }; 5280 } __ec_align2; 5281 5282 /* Run RW signature verification and get status */ 5283 #define EC_CMD_RWSIG_CHECK_STATUS 0x011C 5284 5285 struct ec_response_rwsig_check_status { 5286 uint32_t status; 5287 } __ec_align4; 5288 5289 /* For controlling RWSIG task */ 5290 #define EC_CMD_RWSIG_ACTION 0x011D 5291 5292 enum rwsig_action { 5293 RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ 5294 RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ 5295 }; 5296 5297 struct ec_params_rwsig_action { 5298 uint32_t action; 5299 } __ec_align4; 5300 5301 /* Run verification on a slot */ 5302 #define EC_CMD_EFS_VERIFY 0x011E 5303 5304 struct ec_params_efs_verify { 5305 uint8_t region; /* enum ec_flash_region */ 5306 } __ec_align1; 5307 5308 /* 5309 * Retrieve info from Cros Board Info store. Response is based on the data 5310 * type. Integers return a uint32. Strings return a string, using the response 5311 * size to determine how big it is. 5312 */ 5313 #define EC_CMD_GET_CROS_BOARD_INFO 0x011F 5314 /* 5315 * Write info into Cros Board Info on EEPROM. Write fails if the board has 5316 * hardware write-protect enabled. 5317 */ 5318 #define EC_CMD_SET_CROS_BOARD_INFO 0x0120 5319 5320 enum cbi_data_tag { 5321 CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */ 5322 CBI_TAG_OEM_ID = 1, /* uint32_t or smaller */ 5323 CBI_TAG_SKU_ID = 2, /* uint32_t or smaller */ 5324 CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */ 5325 CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */ 5326 CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */ 5327 CBI_TAG_COUNT, 5328 }; 5329 5330 /* 5331 * Flags to control read operation 5332 * 5333 * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify 5334 * write was successful without reboot. 5335 */ 5336 #define CBI_GET_RELOAD BIT(0) 5337 5338 struct ec_params_get_cbi { 5339 uint32_t tag; /* enum cbi_data_tag */ 5340 uint32_t flag; /* CBI_GET_* */ 5341 } __ec_align4; 5342 5343 /* 5344 * Flags to control write behavior. 5345 * 5346 * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's 5347 * useful when writing multiple fields in a row. 5348 * INIT: Need to be set when creating a new CBI from scratch. All fields 5349 * will be initialized to zero first. 5350 */ 5351 #define CBI_SET_NO_SYNC BIT(0) 5352 #define CBI_SET_INIT BIT(1) 5353 5354 struct ec_params_set_cbi { 5355 uint32_t tag; /* enum cbi_data_tag */ 5356 uint32_t flag; /* CBI_SET_* */ 5357 uint32_t size; /* Data size */ 5358 uint8_t data[]; /* For string and raw data */ 5359 } __ec_align1; 5360 5361 /* 5362 * Information about resets of the AP by the EC and the EC's own uptime. 5363 */ 5364 #define EC_CMD_GET_UPTIME_INFO 0x0121 5365 5366 struct ec_response_uptime_info { 5367 /* 5368 * Number of milliseconds since the last EC boot. Sysjump resets 5369 * typically do not restart the EC's time_since_boot epoch. 5370 * 5371 * WARNING: The EC's sense of time is much less accurate than the AP's 5372 * sense of time, in both phase and frequency. This timebase is similar 5373 * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error. 5374 */ 5375 uint32_t time_since_ec_boot_ms; 5376 5377 /* 5378 * Number of times the AP was reset by the EC since the last EC boot. 5379 * Note that the AP may be held in reset by the EC during the initial 5380 * boot sequence, such that the very first AP boot may count as more 5381 * than one here. 5382 */ 5383 uint32_t ap_resets_since_ec_boot; 5384 5385 /* 5386 * The set of flags which describe the EC's most recent reset. See 5387 * include/system.h RESET_FLAG_* for details. 5388 */ 5389 uint32_t ec_reset_flags; 5390 5391 /* Empty log entries have both the cause and timestamp set to zero. */ 5392 struct ap_reset_log_entry { 5393 /* 5394 * See include/chipset.h: enum chipset_{reset,shutdown}_reason 5395 * for details. 5396 */ 5397 uint16_t reset_cause; 5398 5399 /* Reserved for protocol growth. */ 5400 uint16_t reserved; 5401 5402 /* 5403 * The time of the reset's assertion, in milliseconds since the 5404 * last EC boot, in the same epoch as time_since_ec_boot_ms. 5405 * Set to zero if the log entry is empty. 5406 */ 5407 uint32_t reset_time_ms; 5408 } recent_ap_reset[4]; 5409 } __ec_align4; 5410 5411 /* 5412 * Add entropy to the device secret (stored in the rollback region). 5413 * 5414 * Depending on the chip, the operation may take a long time (e.g. to erase 5415 * flash), so the commands are asynchronous. 5416 */ 5417 #define EC_CMD_ADD_ENTROPY 0x0122 5418 5419 enum add_entropy_action { 5420 /* Add entropy to the current secret. */ 5421 ADD_ENTROPY_ASYNC = 0, 5422 /* 5423 * Add entropy, and also make sure that the previous secret is erased. 5424 * (this can be implemented by adding entropy multiple times until 5425 * all rolback blocks have been overwritten). 5426 */ 5427 ADD_ENTROPY_RESET_ASYNC = 1, 5428 /* Read back result from the previous operation. */ 5429 ADD_ENTROPY_GET_RESULT = 2, 5430 }; 5431 5432 struct ec_params_rollback_add_entropy { 5433 uint8_t action; 5434 } __ec_align1; 5435 5436 /* 5437 * Perform a single read of a given ADC channel. 5438 */ 5439 #define EC_CMD_ADC_READ 0x0123 5440 5441 struct ec_params_adc_read { 5442 uint8_t adc_channel; 5443 } __ec_align1; 5444 5445 struct ec_response_adc_read { 5446 int32_t adc_value; 5447 } __ec_align4; 5448 5449 /* 5450 * Read back rollback info 5451 */ 5452 #define EC_CMD_ROLLBACK_INFO 0x0124 5453 5454 struct ec_response_rollback_info { 5455 int32_t id; /* Incrementing number to indicate which region to use. */ 5456 int32_t rollback_min_version; 5457 int32_t rw_rollback_version; 5458 } __ec_align4; 5459 5460 5461 /* Issue AP reset */ 5462 #define EC_CMD_AP_RESET 0x0125 5463 5464 /** 5465 * Get the number of peripheral charge ports 5466 */ 5467 #define EC_CMD_PCHG_COUNT 0x0134 5468 5469 #define EC_PCHG_MAX_PORTS 8 5470 5471 struct ec_response_pchg_count { 5472 uint8_t port_count; 5473 } __ec_align1; 5474 5475 /** 5476 * Get the status of a peripheral charge port 5477 */ 5478 #define EC_CMD_PCHG 0x0135 5479 5480 struct ec_params_pchg { 5481 uint8_t port; 5482 } __ec_align1; 5483 5484 struct ec_response_pchg { 5485 uint32_t error; /* enum pchg_error */ 5486 uint8_t state; /* enum pchg_state state */ 5487 uint8_t battery_percentage; 5488 uint8_t unused0; 5489 uint8_t unused1; 5490 /* Fields added in version 1 */ 5491 uint32_t fw_version; 5492 uint32_t dropped_event_count; 5493 } __ec_align2; 5494 5495 enum pchg_state { 5496 /* Charger is reset and not initialized. */ 5497 PCHG_STATE_RESET = 0, 5498 /* Charger is initialized or disabled. */ 5499 PCHG_STATE_INITIALIZED, 5500 /* Charger is enabled and ready to detect a device. */ 5501 PCHG_STATE_ENABLED, 5502 /* Device is in proximity. */ 5503 PCHG_STATE_DETECTED, 5504 /* Device is being charged. */ 5505 PCHG_STATE_CHARGING, 5506 /* Device is fully charged. It implies DETECTED (& not charging). */ 5507 PCHG_STATE_FULL, 5508 /* In download (a.k.a. firmware update) mode */ 5509 PCHG_STATE_DOWNLOAD, 5510 /* In download mode. Ready for receiving data. */ 5511 PCHG_STATE_DOWNLOADING, 5512 /* Device is ready for data communication. */ 5513 PCHG_STATE_CONNECTED, 5514 /* Put no more entry below */ 5515 PCHG_STATE_COUNT, 5516 }; 5517 5518 #define EC_PCHG_STATE_TEXT { \ 5519 [PCHG_STATE_RESET] = "RESET", \ 5520 [PCHG_STATE_INITIALIZED] = "INITIALIZED", \ 5521 [PCHG_STATE_ENABLED] = "ENABLED", \ 5522 [PCHG_STATE_DETECTED] = "DETECTED", \ 5523 [PCHG_STATE_CHARGING] = "CHARGING", \ 5524 [PCHG_STATE_FULL] = "FULL", \ 5525 [PCHG_STATE_DOWNLOAD] = "DOWNLOAD", \ 5526 [PCHG_STATE_DOWNLOADING] = "DOWNLOADING", \ 5527 [PCHG_STATE_CONNECTED] = "CONNECTED", \ 5528 } 5529 5530 /*****************************************************************************/ 5531 /* Voltage regulator controls */ 5532 5533 /* 5534 * Get basic info of voltage regulator for given index. 5535 * 5536 * Returns the regulator name and supported voltage list in mV. 5537 */ 5538 #define EC_CMD_REGULATOR_GET_INFO 0x012C 5539 5540 /* Maximum length of regulator name */ 5541 #define EC_REGULATOR_NAME_MAX_LEN 16 5542 5543 /* Maximum length of the supported voltage list. */ 5544 #define EC_REGULATOR_VOLTAGE_MAX_COUNT 16 5545 5546 struct ec_params_regulator_get_info { 5547 uint32_t index; 5548 } __ec_align4; 5549 5550 struct ec_response_regulator_get_info { 5551 char name[EC_REGULATOR_NAME_MAX_LEN]; 5552 uint16_t num_voltages; 5553 uint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT]; 5554 } __ec_align2; 5555 5556 /* 5557 * Configure the regulator as enabled / disabled. 5558 */ 5559 #define EC_CMD_REGULATOR_ENABLE 0x012D 5560 5561 struct ec_params_regulator_enable { 5562 uint32_t index; 5563 uint8_t enable; 5564 } __ec_align4; 5565 5566 /* 5567 * Query if the regulator is enabled. 5568 * 5569 * Returns 1 if the regulator is enabled, 0 if not. 5570 */ 5571 #define EC_CMD_REGULATOR_IS_ENABLED 0x012E 5572 5573 struct ec_params_regulator_is_enabled { 5574 uint32_t index; 5575 } __ec_align4; 5576 5577 struct ec_response_regulator_is_enabled { 5578 uint8_t enabled; 5579 } __ec_align1; 5580 5581 /* 5582 * Set voltage for the voltage regulator within the range specified. 5583 * 5584 * The driver should select the voltage in range closest to min_mv. 5585 * 5586 * Also note that this might be called before the regulator is enabled, and the 5587 * setting should be in effect after the regulator is enabled. 5588 */ 5589 #define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F 5590 5591 struct ec_params_regulator_set_voltage { 5592 uint32_t index; 5593 uint32_t min_mv; 5594 uint32_t max_mv; 5595 } __ec_align4; 5596 5597 /* 5598 * Get the currently configured voltage for the voltage regulator. 5599 * 5600 * Note that this might be called before the regulator is enabled, and this 5601 * should return the configured output voltage if the regulator is enabled. 5602 */ 5603 #define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130 5604 5605 struct ec_params_regulator_get_voltage { 5606 uint32_t index; 5607 } __ec_align4; 5608 5609 struct ec_response_regulator_get_voltage { 5610 uint32_t voltage_mv; 5611 } __ec_align4; 5612 5613 /* 5614 * Gather all discovery information for the given port and partner type. 5615 * 5616 * Note that if discovery has not yet completed, only the currently completed 5617 * responses will be filled in. If the discovery data structures are changed 5618 * in the process of the command running, BUSY will be returned. 5619 * 5620 * VDO field sizes are set to the maximum possible number of VDOs a VDM may 5621 * contain, while the number of SVIDs here is selected to fit within the PROTO2 5622 * maximum parameter size. 5623 */ 5624 #define EC_CMD_TYPEC_DISCOVERY 0x0131 5625 5626 enum typec_partner_type { 5627 TYPEC_PARTNER_SOP = 0, 5628 TYPEC_PARTNER_SOP_PRIME = 1, 5629 }; 5630 5631 struct ec_params_typec_discovery { 5632 uint8_t port; 5633 uint8_t partner_type; /* enum typec_partner_type */ 5634 } __ec_align1; 5635 5636 struct svid_mode_info { 5637 uint16_t svid; 5638 uint16_t mode_count; /* Number of modes partner sent */ 5639 uint32_t mode_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ 5640 }; 5641 5642 struct ec_response_typec_discovery { 5643 uint8_t identity_count; /* Number of identity VDOs partner sent */ 5644 uint8_t svid_count; /* Number of SVIDs partner sent */ 5645 uint16_t reserved; 5646 uint32_t discovery_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ 5647 struct svid_mode_info svids[0]; 5648 } __ec_align1; 5649 5650 /* USB Type-C commands for AP-controlled device policy. */ 5651 #define EC_CMD_TYPEC_CONTROL 0x0132 5652 5653 enum typec_control_command { 5654 TYPEC_CONTROL_COMMAND_EXIT_MODES, 5655 TYPEC_CONTROL_COMMAND_CLEAR_EVENTS, 5656 TYPEC_CONTROL_COMMAND_ENTER_MODE, 5657 }; 5658 5659 struct ec_params_typec_control { 5660 uint8_t port; 5661 uint8_t command; /* enum typec_control_command */ 5662 uint16_t reserved; 5663 5664 /* 5665 * This section will be interpreted based on |command|. Define a 5666 * placeholder structure to avoid having to increase the size and bump 5667 * the command version when adding new sub-commands. 5668 */ 5669 union { 5670 uint32_t clear_events_mask; 5671 uint8_t mode_to_enter; /* enum typec_mode */ 5672 uint8_t placeholder[128]; 5673 }; 5674 } __ec_align1; 5675 5676 /* 5677 * Gather all status information for a port. 5678 * 5679 * Note: this covers many of the return fields from the deprecated 5680 * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the 5681 * discovery data. The "enum pd_cc_states" is defined with the deprecated 5682 * EC_CMD_USB_PD_CONTROL command. 5683 * 5684 * This also combines in the EC_CMD_USB_PD_MUX_INFO flags. 5685 */ 5686 #define EC_CMD_TYPEC_STATUS 0x0133 5687 5688 /* 5689 * Power role. 5690 * 5691 * Note this is also used for PD header creation, and values align to those in 5692 * the Power Delivery Specification Revision 3.0 (See 5693 * 6.2.1.1.4 Port Power Role). 5694 */ 5695 enum pd_power_role { 5696 PD_ROLE_SINK = 0, 5697 PD_ROLE_SOURCE = 1 5698 }; 5699 5700 /* 5701 * Data role. 5702 * 5703 * Note this is also used for PD header creation, and the first two values 5704 * align to those in the Power Delivery Specification Revision 3.0 (See 5705 * 6.2.1.1.6 Port Data Role). 5706 */ 5707 enum pd_data_role { 5708 PD_ROLE_UFP = 0, 5709 PD_ROLE_DFP = 1, 5710 PD_ROLE_DISCONNECTED = 2, 5711 }; 5712 5713 enum pd_vconn_role { 5714 PD_ROLE_VCONN_OFF = 0, 5715 PD_ROLE_VCONN_SRC = 1, 5716 }; 5717 5718 /* 5719 * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2, 5720 * regardless of whether a debug accessory is connected. 5721 */ 5722 enum tcpc_cc_polarity { 5723 /* 5724 * _CCx: is used to indicate the polarity while not connected to 5725 * a Debug Accessory. Only one CC line will assert a resistor and 5726 * the other will be open. 5727 */ 5728 POLARITY_CC1 = 0, 5729 POLARITY_CC2 = 1, 5730 5731 /* 5732 * _CCx_DTS is used to indicate the polarity while connected to a 5733 * SRC Debug Accessory. Assert resistors on both lines. 5734 */ 5735 POLARITY_CC1_DTS = 2, 5736 POLARITY_CC2_DTS = 3, 5737 5738 /* 5739 * The current TCPC code relies on these specific POLARITY values. 5740 * Adding in a check to verify if the list grows for any reason 5741 * that this will give a hint that other places need to be 5742 * adjusted. 5743 */ 5744 POLARITY_COUNT 5745 }; 5746 5747 #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0) 5748 #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1) 5749 #define PD_STATUS_EVENT_HARD_RESET BIT(2) 5750 5751 struct ec_params_typec_status { 5752 uint8_t port; 5753 } __ec_align1; 5754 5755 struct ec_response_typec_status { 5756 uint8_t pd_enabled; /* PD communication enabled - bool */ 5757 uint8_t dev_connected; /* Device connected - bool */ 5758 uint8_t sop_connected; /* Device is SOP PD capable - bool */ 5759 uint8_t source_cap_count; /* Number of Source Cap PDOs */ 5760 5761 uint8_t power_role; /* enum pd_power_role */ 5762 uint8_t data_role; /* enum pd_data_role */ 5763 uint8_t vconn_role; /* enum pd_vconn_role */ 5764 uint8_t sink_cap_count; /* Number of Sink Cap PDOs */ 5765 5766 uint8_t polarity; /* enum tcpc_cc_polarity */ 5767 uint8_t cc_state; /* enum pd_cc_states */ 5768 uint8_t dp_pin; /* DP pin mode (MODE_DP_IN_[A-E]) */ 5769 uint8_t mux_state; /* USB_PD_MUX* - encoded mux state */ 5770 5771 char tc_state[32]; /* TC state name */ 5772 5773 uint32_t events; /* PD_STATUS_EVENT bitmask */ 5774 5775 /* 5776 * BCD PD revisions for partners 5777 * 5778 * The format has the PD major reversion in the upper nibble, and PD 5779 * minor version in the next nibble. Following two nibbles are 5780 * currently 0. 5781 * ex. PD 3.2 would map to 0x3200 5782 * 5783 * PD major/minor will be 0 if no PD device is connected. 5784 */ 5785 uint16_t sop_revision; 5786 uint16_t sop_prime_revision; 5787 5788 uint32_t source_cap_pdos[7]; /* Max 7 PDOs can be present */ 5789 5790 uint32_t sink_cap_pdos[7]; /* Max 7 PDOs can be present */ 5791 } __ec_align1; 5792 5793 /*****************************************************************************/ 5794 /* The command range 0x200-0x2FF is reserved for Rotor. */ 5795 5796 /*****************************************************************************/ 5797 /* 5798 * Reserve a range of host commands for the CR51 firmware. 5799 */ 5800 #define EC_CMD_CR51_BASE 0x0300 5801 #define EC_CMD_CR51_LAST 0x03FF 5802 5803 /*****************************************************************************/ 5804 /* Fingerprint MCU commands: range 0x0400-0x040x */ 5805 5806 /* Fingerprint SPI sensor passthru command: prototyping ONLY */ 5807 #define EC_CMD_FP_PASSTHRU 0x0400 5808 5809 #define EC_FP_FLAG_NOT_COMPLETE 0x1 5810 5811 struct ec_params_fp_passthru { 5812 uint16_t len; /* Number of bytes to write then read */ 5813 uint16_t flags; /* EC_FP_FLAG_xxx */ 5814 uint8_t data[]; /* Data to send */ 5815 } __ec_align2; 5816 5817 /* Configure the Fingerprint MCU behavior */ 5818 #define EC_CMD_FP_MODE 0x0402 5819 5820 /* Put the sensor in its lowest power mode */ 5821 #define FP_MODE_DEEPSLEEP BIT(0) 5822 /* Wait to see a finger on the sensor */ 5823 #define FP_MODE_FINGER_DOWN BIT(1) 5824 /* Poll until the finger has left the sensor */ 5825 #define FP_MODE_FINGER_UP BIT(2) 5826 /* Capture the current finger image */ 5827 #define FP_MODE_CAPTURE BIT(3) 5828 /* Finger enrollment session on-going */ 5829 #define FP_MODE_ENROLL_SESSION BIT(4) 5830 /* Enroll the current finger image */ 5831 #define FP_MODE_ENROLL_IMAGE BIT(5) 5832 /* Try to match the current finger image */ 5833 #define FP_MODE_MATCH BIT(6) 5834 /* Reset and re-initialize the sensor. */ 5835 #define FP_MODE_RESET_SENSOR BIT(7) 5836 /* special value: don't change anything just read back current mode */ 5837 #define FP_MODE_DONT_CHANGE BIT(31) 5838 5839 #define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \ 5840 FP_MODE_FINGER_DOWN | \ 5841 FP_MODE_FINGER_UP | \ 5842 FP_MODE_CAPTURE | \ 5843 FP_MODE_ENROLL_SESSION | \ 5844 FP_MODE_ENROLL_IMAGE | \ 5845 FP_MODE_MATCH | \ 5846 FP_MODE_RESET_SENSOR | \ 5847 FP_MODE_DONT_CHANGE) 5848 5849 /* Capture types defined in bits [30..28] */ 5850 #define FP_MODE_CAPTURE_TYPE_SHIFT 28 5851 #define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT) 5852 /* 5853 * This enum must remain ordered, if you add new values you must ensure that 5854 * FP_CAPTURE_TYPE_MAX is still the last one. 5855 */ 5856 enum fp_capture_type { 5857 /* Full blown vendor-defined capture (produces 'frame_size' bytes) */ 5858 FP_CAPTURE_VENDOR_FORMAT = 0, 5859 /* Simple raw image capture (produces width x height x bpp bits) */ 5860 FP_CAPTURE_SIMPLE_IMAGE = 1, 5861 /* Self test pattern (e.g. checkerboard) */ 5862 FP_CAPTURE_PATTERN0 = 2, 5863 /* Self test pattern (e.g. inverted checkerboard) */ 5864 FP_CAPTURE_PATTERN1 = 3, 5865 /* Capture for Quality test with fixed contrast */ 5866 FP_CAPTURE_QUALITY_TEST = 4, 5867 /* Capture for pixel reset value test */ 5868 FP_CAPTURE_RESET_TEST = 5, 5869 FP_CAPTURE_TYPE_MAX, 5870 }; 5871 /* Extracts the capture type from the sensor 'mode' word */ 5872 #define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \ 5873 >> FP_MODE_CAPTURE_TYPE_SHIFT) 5874 5875 struct ec_params_fp_mode { 5876 uint32_t mode; /* as defined by FP_MODE_ constants */ 5877 } __ec_align4; 5878 5879 struct ec_response_fp_mode { 5880 uint32_t mode; /* as defined by FP_MODE_ constants */ 5881 } __ec_align4; 5882 5883 /* Retrieve Fingerprint sensor information */ 5884 #define EC_CMD_FP_INFO 0x0403 5885 5886 /* Number of dead pixels detected on the last maintenance */ 5887 #define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF) 5888 /* Unknown number of dead pixels detected on the last maintenance */ 5889 #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF) 5890 /* No interrupt from the sensor */ 5891 #define FP_ERROR_NO_IRQ BIT(12) 5892 /* SPI communication error */ 5893 #define FP_ERROR_SPI_COMM BIT(13) 5894 /* Invalid sensor Hardware ID */ 5895 #define FP_ERROR_BAD_HWID BIT(14) 5896 /* Sensor initialization failed */ 5897 #define FP_ERROR_INIT_FAIL BIT(15) 5898 5899 struct ec_response_fp_info_v0 { 5900 /* Sensor identification */ 5901 uint32_t vendor_id; 5902 uint32_t product_id; 5903 uint32_t model_id; 5904 uint32_t version; 5905 /* Image frame characteristics */ 5906 uint32_t frame_size; 5907 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 5908 uint16_t width; 5909 uint16_t height; 5910 uint16_t bpp; 5911 uint16_t errors; /* see FP_ERROR_ flags above */ 5912 } __ec_align4; 5913 5914 struct ec_response_fp_info { 5915 /* Sensor identification */ 5916 uint32_t vendor_id; 5917 uint32_t product_id; 5918 uint32_t model_id; 5919 uint32_t version; 5920 /* Image frame characteristics */ 5921 uint32_t frame_size; 5922 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 5923 uint16_t width; 5924 uint16_t height; 5925 uint16_t bpp; 5926 uint16_t errors; /* see FP_ERROR_ flags above */ 5927 /* Template/finger current information */ 5928 uint32_t template_size; /* max template size in bytes */ 5929 uint16_t template_max; /* maximum number of fingers/templates */ 5930 uint16_t template_valid; /* number of valid fingers/templates */ 5931 uint32_t template_dirty; /* bitmap of templates with MCU side changes */ 5932 uint32_t template_version; /* version of the template format */ 5933 } __ec_align4; 5934 5935 /* Get the last captured finger frame or a template content */ 5936 #define EC_CMD_FP_FRAME 0x0404 5937 5938 /* constants defining the 'offset' field which also contains the frame index */ 5939 #define FP_FRAME_INDEX_SHIFT 28 5940 /* Frame buffer where the captured image is stored */ 5941 #define FP_FRAME_INDEX_RAW_IMAGE 0 5942 /* First frame buffer holding a template */ 5943 #define FP_FRAME_INDEX_TEMPLATE 1 5944 #define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT) 5945 #define FP_FRAME_OFFSET_MASK 0x0FFFFFFF 5946 5947 /* Version of the format of the encrypted templates. */ 5948 #define FP_TEMPLATE_FORMAT_VERSION 3 5949 5950 /* Constants for encryption parameters */ 5951 #define FP_CONTEXT_NONCE_BYTES 12 5952 #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t)) 5953 #define FP_CONTEXT_TAG_BYTES 16 5954 #define FP_CONTEXT_SALT_BYTES 16 5955 #define FP_CONTEXT_TPM_BYTES 32 5956 5957 struct ec_fp_template_encryption_metadata { 5958 /* 5959 * Version of the structure format (N=3). 5960 */ 5961 uint16_t struct_version; 5962 /* Reserved bytes, set to 0. */ 5963 uint16_t reserved; 5964 /* 5965 * The salt is *only* ever used for key derivation. The nonce is unique, 5966 * a different one is used for every message. 5967 */ 5968 uint8_t nonce[FP_CONTEXT_NONCE_BYTES]; 5969 uint8_t salt[FP_CONTEXT_SALT_BYTES]; 5970 uint8_t tag[FP_CONTEXT_TAG_BYTES]; 5971 }; 5972 5973 struct ec_params_fp_frame { 5974 /* 5975 * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE 5976 * in the high nibble, and the real offset within the frame in 5977 * FP_FRAME_OFFSET_MASK. 5978 */ 5979 uint32_t offset; 5980 uint32_t size; 5981 } __ec_align4; 5982 5983 /* Load a template into the MCU */ 5984 #define EC_CMD_FP_TEMPLATE 0x0405 5985 5986 /* Flag in the 'size' field indicating that the full template has been sent */ 5987 #define FP_TEMPLATE_COMMIT 0x80000000 5988 5989 struct ec_params_fp_template { 5990 uint32_t offset; 5991 uint32_t size; 5992 uint8_t data[]; 5993 } __ec_align4; 5994 5995 /* Clear the current fingerprint user context and set a new one */ 5996 #define EC_CMD_FP_CONTEXT 0x0406 5997 5998 struct ec_params_fp_context { 5999 uint32_t userid[FP_CONTEXT_USERID_WORDS]; 6000 } __ec_align4; 6001 6002 #define EC_CMD_FP_STATS 0x0407 6003 6004 #define FPSTATS_CAPTURE_INV BIT(0) 6005 #define FPSTATS_MATCHING_INV BIT(1) 6006 6007 struct ec_response_fp_stats { 6008 uint32_t capture_time_us; 6009 uint32_t matching_time_us; 6010 uint32_t overall_time_us; 6011 struct { 6012 uint32_t lo; 6013 uint32_t hi; 6014 } overall_t0; 6015 uint8_t timestamps_invalid; 6016 int8_t template_matched; 6017 } __ec_align2; 6018 6019 #define EC_CMD_FP_SEED 0x0408 6020 struct ec_params_fp_seed { 6021 /* 6022 * Version of the structure format (N=3). 6023 */ 6024 uint16_t struct_version; 6025 /* Reserved bytes, set to 0. */ 6026 uint16_t reserved; 6027 /* Seed from the TPM. */ 6028 uint8_t seed[FP_CONTEXT_TPM_BYTES]; 6029 } __ec_align4; 6030 6031 #define EC_CMD_FP_ENC_STATUS 0x0409 6032 6033 /* FP TPM seed has been set or not */ 6034 #define FP_ENC_STATUS_SEED_SET BIT(0) 6035 6036 struct ec_response_fp_encryption_status { 6037 /* Used bits in encryption engine status */ 6038 uint32_t valid_flags; 6039 /* Encryption engine status */ 6040 uint32_t status; 6041 } __ec_align4; 6042 6043 /*****************************************************************************/ 6044 /* Touchpad MCU commands: range 0x0500-0x05FF */ 6045 6046 /* Perform touchpad self test */ 6047 #define EC_CMD_TP_SELF_TEST 0x0500 6048 6049 /* Get number of frame types, and the size of each type */ 6050 #define EC_CMD_TP_FRAME_INFO 0x0501 6051 6052 struct ec_response_tp_frame_info { 6053 uint32_t n_frames; 6054 uint32_t frame_sizes[]; 6055 } __ec_align4; 6056 6057 /* Create a snapshot of current frame readings */ 6058 #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 6059 6060 /* Read the frame */ 6061 #define EC_CMD_TP_FRAME_GET 0x0503 6062 6063 struct ec_params_tp_frame_get { 6064 uint32_t frame_index; 6065 uint32_t offset; 6066 uint32_t size; 6067 } __ec_align4; 6068 6069 /*****************************************************************************/ 6070 /* EC-EC communication commands: range 0x0600-0x06FF */ 6071 6072 #define EC_COMM_TEXT_MAX 8 6073 6074 /* 6075 * Get battery static information, i.e. information that never changes, or 6076 * very infrequently. 6077 */ 6078 #define EC_CMD_BATTERY_GET_STATIC 0x0600 6079 6080 /** 6081 * struct ec_params_battery_static_info - Battery static info parameters 6082 * @index: Battery index. 6083 */ 6084 struct ec_params_battery_static_info { 6085 uint8_t index; 6086 } __ec_align_size1; 6087 6088 /** 6089 * struct ec_response_battery_static_info - Battery static info response 6090 * @design_capacity: Battery Design Capacity (mAh) 6091 * @design_voltage: Battery Design Voltage (mV) 6092 * @manufacturer: Battery Manufacturer String 6093 * @model: Battery Model Number String 6094 * @serial: Battery Serial Number String 6095 * @type: Battery Type String 6096 * @cycle_count: Battery Cycle Count 6097 */ 6098 struct ec_response_battery_static_info { 6099 uint16_t design_capacity; 6100 uint16_t design_voltage; 6101 char manufacturer[EC_COMM_TEXT_MAX]; 6102 char model[EC_COMM_TEXT_MAX]; 6103 char serial[EC_COMM_TEXT_MAX]; 6104 char type[EC_COMM_TEXT_MAX]; 6105 /* TODO(crbug.com/795991): Consider moving to dynamic structure. */ 6106 uint32_t cycle_count; 6107 } __ec_align4; 6108 6109 /* 6110 * Get battery dynamic information, i.e. information that is likely to change 6111 * every time it is read. 6112 */ 6113 #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601 6114 6115 /** 6116 * struct ec_params_battery_dynamic_info - Battery dynamic info parameters 6117 * @index: Battery index. 6118 */ 6119 struct ec_params_battery_dynamic_info { 6120 uint8_t index; 6121 } __ec_align_size1; 6122 6123 /** 6124 * struct ec_response_battery_dynamic_info - Battery dynamic info response 6125 * @actual_voltage: Battery voltage (mV) 6126 * @actual_current: Battery current (mA); negative=discharging 6127 * @remaining_capacity: Remaining capacity (mAh) 6128 * @full_capacity: Capacity (mAh, might change occasionally) 6129 * @flags: Flags, see EC_BATT_FLAG_* 6130 * @desired_voltage: Charging voltage desired by battery (mV) 6131 * @desired_current: Charging current desired by battery (mA) 6132 */ 6133 struct ec_response_battery_dynamic_info { 6134 int16_t actual_voltage; 6135 int16_t actual_current; 6136 int16_t remaining_capacity; 6137 int16_t full_capacity; 6138 int16_t flags; 6139 int16_t desired_voltage; 6140 int16_t desired_current; 6141 } __ec_align2; 6142 6143 /* 6144 * Control charger chip. Used to control charger chip on the slave. 6145 */ 6146 #define EC_CMD_CHARGER_CONTROL 0x0602 6147 6148 /** 6149 * struct ec_params_charger_control - Charger control parameters 6150 * @max_current: Charger current (mA). Positive to allow base to draw up to 6151 * max_current and (possibly) charge battery, negative to request current 6152 * from base (OTG). 6153 * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is 6154 * >= 0. 6155 * @allow_charging: Allow base battery charging (only makes sense if 6156 * max_current > 0). 6157 */ 6158 struct ec_params_charger_control { 6159 int16_t max_current; 6160 uint16_t otg_voltage; 6161 uint8_t allow_charging; 6162 } __ec_align_size1; 6163 6164 /* Get ACK from the USB-C SS muxes */ 6165 #define EC_CMD_USB_PD_MUX_ACK 0x0603 6166 6167 struct ec_params_usb_pd_mux_ack { 6168 uint8_t port; /* USB-C port number */ 6169 } __ec_align1; 6170 6171 /*****************************************************************************/ 6172 /* 6173 * Reserve a range of host commands for board-specific, experimental, or 6174 * special purpose features. These can be (re)used without updating this file. 6175 * 6176 * CAUTION: Don't go nuts with this. Shipping products should document ALL 6177 * their EC commands for easier development, testing, debugging, and support. 6178 * 6179 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 6180 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 6181 * 6182 * In your experimental code, you may want to do something like this: 6183 * 6184 * #define EC_CMD_MAGIC_FOO 0x0000 6185 * #define EC_CMD_MAGIC_BAR 0x0001 6186 * #define EC_CMD_MAGIC_HEY 0x0002 6187 * 6188 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, 6189 * EC_VER_MASK(0); 6190 * 6191 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, 6192 * EC_VER_MASK(0); 6193 * 6194 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, 6195 * EC_VER_MASK(0); 6196 */ 6197 #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 6198 #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF 6199 6200 /* 6201 * Given the private host command offset, calculate the true private host 6202 * command value. 6203 */ 6204 #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ 6205 (EC_CMD_BOARD_SPECIFIC_BASE + (command)) 6206 6207 /*****************************************************************************/ 6208 /* 6209 * Passthru commands 6210 * 6211 * Some platforms have sub-processors chained to each other. For example. 6212 * 6213 * AP <--> EC <--> PD MCU 6214 * 6215 * The top 2 bits of the command number are used to indicate which device the 6216 * command is intended for. Device 0 is always the device receiving the 6217 * command; other device mapping is board-specific. 6218 * 6219 * When a device receives a command to be passed to a sub-processor, it passes 6220 * it on with the device number set back to 0. This allows the sub-processor 6221 * to remain blissfully unaware of whether the command originated on the next 6222 * device up the chain, or was passed through from the AP. 6223 * 6224 * In the above example, if the AP wants to send command 0x0002 to the PD MCU, 6225 * AP sends command 0x4002 to the EC 6226 * EC sends command 0x0002 to the PD MCU 6227 * EC forwards PD MCU response back to the AP 6228 */ 6229 6230 /* Offset and max command number for sub-device n */ 6231 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n)) 6232 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff) 6233 6234 /*****************************************************************************/ 6235 /* 6236 * Deprecated constants. These constants have been renamed for clarity. The 6237 * meaning and size has not changed. Programs that use the old names should 6238 * switch to the new names soon, as the old names may not be carried forward 6239 * forever. 6240 */ 6241 #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE 6242 #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 6243 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE 6244 6245 6246 6247 #endif /* __CROS_EC_COMMANDS_H */ 6248