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Searched refs:comm_page (Results 1 – 20 of 20) sorted by relevance

/sound/pci/echoaudio/
Dechoaudio_dsp.c50 if (chip->comm_page->handshake) { in wait_handshake()
494 if (snd_BUG_ON(!chip->comm_page)) in load_firmware()
543 chip->comm_page->nominal_level_mask |= cpu_to_le32(1 << index); in set_nominal_level()
545 chip->comm_page->nominal_level_mask &= ~cpu_to_le32(1 << index); in set_nominal_level()
565 chip->comm_page->line_out_level[channel] = gain; in set_output_gain()
584 chip->comm_page->monitors[monitor_index(chip, output, input)] = gain; in set_monitor_gain()
622 memset((s8 *)chip->comm_page->vu_meter, ECHOGAIN_MUTED, in set_meters_on()
624 memset((s8 *)chip->comm_page->peak_meter, ECHOGAIN_MUTED, in set_meters_on()
647 meters[n++] = chip->comm_page->vu_meter[m]; in get_audio_meters()
648 meters[n++] = chip->comm_page->peak_meter[m]; in get_audio_meters()
[all …]
Dgina20_dsp.c86 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
133 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
134 chip->comm_page->gd_clock_state = clock_state; in set_sample_rate()
135 chip->comm_page->gd_spdif_status = spdif_status; in set_sample_rate()
136 chip->comm_page->gd_resampler_state = 3; /* magic number - should always be 3 */ in set_sample_rate()
163 chip->comm_page->gd_clock_state = GD_CLOCK_SPDIFIN; in set_input_clock()
164 chip->comm_page->gd_spdif_status = GD_SPDIF_STATUS_NOCHANGE; in set_input_clock()
190 chip->comm_page->line_in_level[input] = gain; in set_input_gain()
210 chip->comm_page->flags |= in set_professional_spdif()
213 chip->comm_page->flags &= in set_professional_spdif()
Dechoaudio_3g.c43 chip->comm_page->ext_box_status = cpu_to_le32(E3G_ASIC_NOT_LOADED); in check_asic_status()
53 box_status = le32_to_cpu(chip->comm_page->ext_box_status); in check_asic_status()
66 return le32_to_cpu(chip->comm_page->e3g_frq_register); in get_frq_reg()
87 if (ctl_reg != chip->comm_page->control_register || in write_control_reg()
88 frq_reg != chip->comm_page->e3g_frq_register || force) { in write_control_reg()
89 chip->comm_page->e3g_frq_register = frq_reg; in write_control_reg()
90 chip->comm_page->control_register = ctl_reg; in write_control_reg()
181 control_reg = le32_to_cpu(chip->comm_page->control_register); in set_professional_spdif()
199 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
267 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
[all …]
Dlayla24_dsp.c95 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
173 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
179 control_reg = le32_to_cpu(chip->comm_page->control_register); in set_sample_rate()
233 chip->comm_page->sample_rate = in set_sample_rate()
242 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP ? */ in set_sample_rate()
257 control_reg = le32_to_cpu(chip->comm_page->control_register) & in set_input_clock()
259 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in set_input_clock()
307 monitors = kmemdup(chip->comm_page->monitors, in switch_asic()
312 memset(chip->comm_page->monitors, ECHOGAIN_MUTED, in switch_asic()
318 memcpy(chip->comm_page->monitors, monitors, in switch_asic()
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Dlayla20_dsp.c87 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
171 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
181 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
216 chip->comm_page->input_clock = cpu_to_le16(clock); in set_input_clock()
245 chip->comm_page->output_clock = cpu_to_le16(clock); in set_output_clock()
264 chip->comm_page->line_in_level[input] = gain; in set_input_gain()
284 chip->comm_page->flags |= in set_professional_spdif()
287 chip->comm_page->flags &= in set_professional_spdif()
Dmia_dsp.c89 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
140 if (control_reg != le32_to_cpu(chip->comm_page->control_register)) { in set_sample_rate()
144 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ in set_sample_rate()
145 chip->comm_page->control_register = cpu_to_le32(control_reg); in set_sample_rate()
184 chip->comm_page->vmixer[index] = gain; in set_vmixer_gain()
219 chip->comm_page->flags |= in set_professional_spdif()
222 chip->comm_page->flags &= in set_professional_spdif()
Dmidi.c46 chip->comm_page->flags |= in enable_midi_input()
49 chip->comm_page->flags &= in enable_midi_input()
72 chip->comm_page->midi_output[0] = bytes; in write_midi()
73 memcpy(&chip->comm_page->midi_output[1], data, bytes); in write_midi()
74 chip->comm_page->midi_out_free_count = 0; in write_midi()
121 count = le16_to_cpu(chip->comm_page->midi_input[0]); in midi_service_irq()
131 midi_byte = le16_to_cpu(chip->comm_page->midi_input[i]); in midi_service_irq()
Dgina24_dsp.c104 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
177 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
184 control_reg = le32_to_cpu(chip->comm_page->control_register); in set_sample_rate()
227 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ in set_sample_rate()
242 control_reg = le32_to_cpu(chip->comm_page->control_register) & in set_input_clock()
244 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in set_input_clock()
316 control_reg = le32_to_cpu(chip->comm_page->control_register); in dsp_set_digital_mode()
Ddarla20_dsp.c117 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
118 chip->comm_page->gd_clock_state = clock_state; in set_sample_rate()
119 chip->comm_page->gd_spdif_status = spdif_status; in set_sample_rate()
120 chip->comm_page->gd_resampler_state = 3; /* magic number - should always be 3 */ in set_sample_rate()
Dindigodj_dsp.c119 if (control_reg != le32_to_cpu(chip->comm_page->control_register)) { in set_sample_rate()
123 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ in set_sample_rate()
124 chip->comm_page->control_register = cpu_to_le32(control_reg); in set_sample_rate()
150 chip->comm_page->vmixer[index] = gain; in set_vmixer_gain()
Dindigo_dsp.c119 if (control_reg != le32_to_cpu(chip->comm_page->control_register)) { in set_sample_rate()
123 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ in set_sample_rate()
124 chip->comm_page->control_register = cpu_to_le32(control_reg); in set_sample_rate()
150 chip->comm_page->vmixer[index] = gain; in set_vmixer_gain()
Dmona_dsp.c97 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
209 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
246 control_reg = le32_to_cpu(chip->comm_page->control_register); in set_sample_rate()
290 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ in set_sample_rate()
306 control_reg = le32_to_cpu(chip->comm_page->control_register) & in set_input_clock()
308 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in set_input_clock()
392 control_reg = le32_to_cpu(chip->comm_page->control_register); in dsp_set_digital_mode()
Dindigo_express_dsp.c36 old_control_reg = le32_to_cpu(chip->comm_page->control_register); in set_sample_rate()
66 chip->comm_page->control_register = cpu_to_le32(control_reg); in set_sample_rate()
91 chip->comm_page->vmixer[index] = gain; in set_vmixer_gain()
Ddarla24_dsp.c79 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
149 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP ? */ in set_sample_rate()
150 chip->comm_page->gd_clock_state = clock; in set_sample_rate()
Decho3g_dsp.c59 chip->comm_page->e3g_frq_register = in init_hw()
121 u32 control_reg = le32_to_cpu(chip->comm_page->control_register); in set_phantom_power()
130 le32_to_cpu(chip->comm_page->e3g_frq_register), in set_phantom_power()
Dechoaudio_gml.c78 if (reg_value != chip->comm_page->control_register || force) { in write_control_reg()
81 chip->comm_page->control_register = reg_value; in write_control_reg()
162 control_reg = le32_to_cpu(chip->comm_page->control_register); in set_professional_spdif()
Dindigoio_dsp.c98 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
120 chip->comm_page->vmixer[index] = gain; in set_vmixer_gain()
Dechoaudio.h364 struct comm_page *comm_page; /* Virtual address of the memory member
459 chip->comm_page->handshake = 0; in clear_handshake()
Dechoaudio_dsp.h645 struct comm_page { /* Base Length*/ struct
Dechoaudio.c1889 if (chip->comm_page) in snd_echo_free()
1955 sizeof(struct comm_page)); in snd_echo_create()
1959 chip->comm_page = (struct comm_page *)chip->commpage_dma_buf->area; in snd_echo_create()
2185 struct comm_page *commpage, *commpage_bak; in snd_echo_resume()
2189 commpage = chip->comm_page; in snd_echo_resume()