| /drivers/gpu/drm/amd/amdgpu/ |
| D | cyan_skillfish_reg_init.c | 36 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in cyan_skillfish_reg_base_init()
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| D | yellow_carp_reg_init.c | 36 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in yellow_carp_reg_base_init()
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| D | vangogh_reg_init.c | 36 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in vangogh_reg_base_init()
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| D | navi12_reg_init.c | 35 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in navi12_reg_base_init()
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| D | navi10_reg_init.c | 35 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in navi10_reg_base_init()
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| D | navi14_reg_init.c | 35 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in navi14_reg_base_init()
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| D | beige_goby_reg_init.c | 36 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in beige_goby_reg_base_init()
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| D | sienna_cichlid_reg_init.c | 36 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in sienna_cichlid_reg_base_init()
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| D | dimgrey_cavefish_reg_init.c | 36 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in dimgrey_cavefish_reg_base_init()
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| D | aldebaran_reg_init.c | 35 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in aldebaran_reg_base_init()
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| D | arct_reg_init.c | 35 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in arct_reg_base_init()
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| D | vega10_reg_init.c | 35 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in vega10_reg_base_init()
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| D | vega20_reg_init.c | 35 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in vega20_reg_base_init()
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| /drivers/gpu/drm/amd/include/ |
| D | cyan_skillfish_ip_offset.h | 75 static const struct IP_BASE HDP_BASE ={ { { { 0x00000F20, 0, 0, 0, 0 } }, variable
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| D | navi10_ip_offset.h | 73 static const struct IP_BASE HDP_BASE ={ { { { 0x00000F20, 0, 0, 0, 0, 0 } }, variable
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| D | vega20_ip_offset.h | 75 static const struct IP_BASE HDP_BASE ={ { { { 0x00000F20, 0, 0, 0, 0, 0 } }, variable
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| D | navi12_ip_offset.h | 102 static const struct IP_BASE HDP_BASE ={ { { { 0x00000F20, 0x0240A400, 0, 0, 0 } }, variable
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| D | dimgrey_cavefish_ip_offset.h | 95 static const struct IP_BASE HDP_BASE = { { { { 0x00000F20, 0x0240A400, 0, 0, 0, 0 } }, variable
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| D | navi14_ip_offset.h | 102 static const struct IP_BASE HDP_BASE ={ { { { 0x00000F20, 0x0240A400, 0, 0, 0 } }, variable
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| D | sienna_cichlid_ip_offset.h | 102 static const struct IP_BASE HDP_BASE = { { { { 0x00000F20, 0x0240A400, 0, 0, 0 } }, variable
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| D | beige_goby_ip_offset.h | 110 static const struct IP_BASE HDP_BASE = { { { { 0x00000F20, 0x0240A400, 0, 0, 0, 0 } }, variable
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| D | renoir_ip_offset.h | 116 static const struct IP_BASE HDP_BASE ={ { { { 0x00000F20, 0x0240A400, 0, 0, 0 } }, variable
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| D | vega10_ip_offset.h | 158 static const struct IP_BASE __maybe_unused HDP_BASE = { { { { 0x00000F20, 0, 0, 0, 0 } }, variable
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| D | yellow_carp_offset.h | 90 static const struct IP_BASE HDP_BASE = { { { { 0x00000F20, 0x0240A400, 0, 0, 0, 0 } }, variable
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| D | vangogh_ip_offset.h | 114 static const struct IP_BASE HDP_BASE = { { { { 0x00000F20, 0x0240A400, 0, 0, 0, 0 } }, variable
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