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Searched refs:goal (Results 1 – 12 of 12) sorted by relevance

/drivers/scsi/aic7xxx/
Daic79xx_osm.c1692 if (tinfo->curr.period != tinfo->goal.period in ahd_send_async()
1693 || tinfo->curr.width != tinfo->goal.width in ahd_send_async()
1694 || tinfo->curr.offset != tinfo->goal.offset in ahd_send_async()
1695 || tinfo->curr.ppr_options != tinfo->goal.ppr_options) in ahd_send_async()
2383 unsigned int ppr_options = tinfo->goal.ppr_options; in ahd_linux_set_period()
2386 unsigned long offset = tinfo->goal.offset; in ahd_linux_set_period()
2449 period = tinfo->goal.period; in ahd_linux_set_offset()
2450 ppr_options = tinfo->goal.ppr_options; in ahd_linux_set_offset()
2471 unsigned int ppr_options = tinfo->goal.ppr_options in ahd_linux_set_dt()
2473 unsigned int period = tinfo->goal.period; in ahd_linux_set_dt()
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Daic7xxx_osm.c1612 if (tinfo->curr.period != tinfo->goal.period in ahc_send_async()
1613 || tinfo->curr.width != tinfo->goal.width in ahc_send_async()
1614 || tinfo->curr.offset != tinfo->goal.offset in ahc_send_async()
1615 || tinfo->curr.ppr_options != tinfo->goal.ppr_options) in ahc_send_async()
2337 unsigned int ppr_options = tinfo->goal.ppr_options; in ahc_linux_set_period()
2339 unsigned long offset = tinfo->goal.offset; in ahc_linux_set_period()
2392 period = tinfo->goal.period; in ahc_linux_set_offset()
2393 ppr_options = tinfo->goal.ppr_options; in ahc_linux_set_offset()
2411 unsigned int ppr_options = tinfo->goal.ppr_options in ahc_linux_set_dt()
2413 unsigned int period = tinfo->goal.period; in ahc_linux_set_dt()
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Daic7xxx_core.c1862 tinfo->goal.transport_version = 2; in ahc_handle_scsiint()
1863 tinfo->goal.ppr_options = 0; in ahc_handle_scsiint()
2148 memset(&tstate->transinfo[i].goal, 0, in ahc_alloc_tstate()
2149 sizeof(tstate->transinfo[i].goal)); in ahc_alloc_tstate()
2225 transinfo = &tinfo->goal; in ahc_devlimited_syncrate()
2386 *offset = min(*offset, (u_int)tinfo->goal.offset); in ahc_validate_offset()
2414 *bus_width = min((u_int)tinfo->goal.width, *bus_width); in ahc_validate_width()
2444 if (tinfo->curr.period != tinfo->goal.period in ahc_update_neg_request()
2445 || tinfo->curr.width != tinfo->goal.width in ahc_update_neg_request()
2446 || tinfo->curr.offset != tinfo->goal.offset in ahc_update_neg_request()
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Daic79xx_core.c3140 tinfo->goal.transport_version = 2; in ahd_handle_nonpkt_busfree()
3141 tinfo->goal.ppr_options = 0; in ahd_handle_nonpkt_busfree()
3623 memset(&tstate->transinfo[i].goal, 0, in ahd_alloc_tstate()
3624 sizeof(tstate->transinfo[i].goal)); in ahd_alloc_tstate()
3691 transinfo = &tinfo->goal; in ahd_devlimited_syncrate()
3773 *offset = min(*offset, (u_int)tinfo->goal.offset); in ahd_validate_offset()
3801 *bus_width = min((u_int)tinfo->goal.width, *bus_width); in ahd_validate_width()
3831 if (tinfo->curr.period != tinfo->goal.period in ahd_update_neg_request()
3832 || tinfo->curr.width != tinfo->goal.width in ahd_update_neg_request()
3833 || tinfo->curr.offset != tinfo->goal.offset in ahd_update_neg_request()
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Daic79xx_proc.c175 ahd_format_transinfo(m, &tinfo->goal); in ahd_dump_target_state()
Daic7xxx_proc.c155 ahc_format_transinfo(m, &tinfo->goal); in ahc_dump_target_state()
Daic7xxx.h702 struct ahc_transinfo goal; member
Daic79xx.h756 struct ahd_transinfo goal; member
/drivers/scsi/sym53c8xx_2/
Dsym_hipd.c1352 struct sym_trans *goal) argument
1355 goal->width = 0;
1358 goal->iu = 0;
1359 goal->dt = 0;
1360 goal->qas = 0;
1361 goal->offset = 0;
1367 goal->dt = 1;
1369 if (goal->offset == 0)
1370 goal->dt = 0;
1372 goal->dt = 0;
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/drivers/tty/
Dtty_buffer.c320 int goal = min_t(size_t, size - copied, TTY_BUFFER_PAGE); in tty_insert_flip_string_fixed_flag() local
322 int space = __tty_buffer_request_room(port, goal, flags); in tty_insert_flip_string_fixed_flag()
359 int goal = min_t(size_t, size - copied, TTY_BUFFER_PAGE); in tty_insert_flip_string_flags() local
360 int space = tty_buffer_request_room(port, goal); in tty_insert_flip_string_flags()
/drivers/gpu/drm/amd/display/
DTODO96 share it with drivers. But that's a very long term goal, and by far not just an
/drivers/net/ethernet/broadcom/
Dtg3.c17040 int goal; in tg3_calc_dma_bndry() local
17057 goal = BOUNDARY_MULTI_CACHELINE; in tg3_calc_dma_bndry()
17060 goal = BOUNDARY_SINGLE_CACHELINE; in tg3_calc_dma_bndry()
17062 goal = 0; in tg3_calc_dma_bndry()
17067 val = goal ? 0 : DMA_RWCTRL_DIS_CACHE_ALIGNMENT; in tg3_calc_dma_bndry()
17071 if (!goal) in tg3_calc_dma_bndry()
17091 if (goal == BOUNDARY_SINGLE_CACHELINE) { in tg3_calc_dma_bndry()
17115 if (goal == BOUNDARY_SINGLE_CACHELINE) { in tg3_calc_dma_bndry()
17130 if (goal == BOUNDARY_SINGLE_CACHELINE) { in tg3_calc_dma_bndry()
17137 if (goal == BOUNDARY_SINGLE_CACHELINE) { in tg3_calc_dma_bndry()
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