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Searched refs:shr (Results 1 – 24 of 24) sorted by relevance

/drivers/char/tpm/
Dxen-tpmfront.c24 struct vtpm_shared_page *shr; member
103 switch (priv->shr->state) { in vtpm_status()
124 priv->shr->state = VTPM_STATE_CANCEL; in vtpm_cancel()
129 static unsigned int shr_data_offset(struct vtpm_shared_page *shr) in shr_data_offset() argument
131 return sizeof(*shr) + sizeof(u32) * shr->nr_extra_pages; in shr_data_offset()
137 struct vtpm_shared_page *shr = priv->shr; in vtpm_send() local
138 unsigned int offset = shr_data_offset(shr); in vtpm_send()
156 memcpy(offset + (u8 *)shr, buf, count); in vtpm_send()
157 shr->length = count; in vtpm_send()
159 shr->state = VTPM_STATE_SUBMIT; in vtpm_send()
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/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
Darith.fuc58 shr b32 $r1 $r14 16
59 shr b32 $r2 $r13 16
72 shr b32 $r4 16 // tmp1 = tmp0_hi
81 shr b32 $r4 16 // tmp1 = tmp0_hi
Di2c_.fuc138 */ shr b32 $r6 4 /*
/drivers/gpu/drm/i915/gt/shaders/clear_kernel/
Dhsw.asm49 shr(1) g3<1>D sr0<0,1,0>D 12D { align1 1N };
51 shr(1) g3.1<1>D sr0<0,1,0>D 13D { align1 1N };
55 shr(1) g3.2<1>D sr0<0,1,0>D 8D { align1 1N };
Divb.asm49 shr(1) g3<1>D sr0<0,1,0>D 12D { align1 1N };
51 shr(1) g3.1<1>D sr0<0,1,0>D 13D { align1 1N };
55 shr(1) g3.2<1>D sr0<0,1,0>D 8D { align1 1N };
/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/
Dgpc.fuc194 shr b32 $r5 $r2 8
226 shr b32 $r3 2
228 shr b32 $r2 8
229 shr b32 $r3 6
261 shr b32 $r15 $r2 8
264 shr b32 $r15 $r2 8
268 shr b32 $r15 6
Dcom.fuc162 shr b32 $r8 26
319 shr b32 $r14 $r15 8
324 shr b32 $r10 6
Dhub.fuc151 shr b32 $r4 $r1 8
156 shr b32 $r15 2
160 shr b32 $r1 8
507 shr b32 $r2 8
/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/
Dcom.fuc222 shr b32 $r4 8
407 shr b32 $r4 1
441 shr b32 $r4 4
569 shr b32 $r10 $r7
578 shr b32 $r13 $r8
602 shr b32 $r15 $r7
611 shr b32 $r15 $r8
634 shr b32 $r8 $r9
/drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/
Dg98.fuc0s363 shr b32 $r5 8
456 shr b32 $r8 $r5 8
464 shr b32 $r8 $r7 8
487 shr b32 $r8 $r4 0x18
495 shr b32 $r8 $r6 0x18
/drivers/scsi/qla2xxx/
Dqla_nx2.h249 uint8_t shr; member
313 uint8_t shr; member
Dqla_nx.h1044 uint8_t shr; member
Dqla_nx2.c248 value >>= p_rmw_hdr->shr; in qla8044_rmw_crb_reg()
2306 read_value >>= crb_entry->crb_ctrl.shr; in qla8044_minidump_process_control()
Dqla_nx.c3780 read_value >>= crb_entry->crb_ctrl.shr; in qla82xx_minidump_process_control()
/drivers/scsi/qla4xxx/
Dql4_83xx.h192 uint8_t shr; member
Dql4_nx.h900 uint8_t shr; member
Dql4_83xx.c904 value >>= p_rmw_hdr->shr; in qla4_83xx_rmw_crb_reg()
Dql4_nx.c2294 read_value >>= crb_entry->crb_ctrl.shr; in qla4_8xxx_minidump_process_control()
/drivers/irqchip/
Dirq-gic-v3-its.c2319 u64 cache, u64 shr, u32 order, bool indirect) in its_setup_baser() argument
2366 shr | in its_setup_baser()
2394 shr = tmp & GITS_BASER_SHAREABILITY_MASK; in its_setup_baser()
2395 if (!shr) { in its_setup_baser()
2422 psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); in its_setup_baser()
2608 u64 shr = GITS_BASER_InnerShareable; in its_alloc_tables() local
2656 err = its_setup_baser(its, baser, cache, shr, order, indirect); in its_alloc_tables()
2664 shr = baser->val & GITS_BASER_SHAREABILITY_MASK; in its_alloc_tables()
/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_83xx_init.c96 u8 shr; member
102 u8 shr; member
1767 value >>= p_rmw_hdr->shr; in qlcnic_83xx_rmw_crb_reg()
/drivers/scsi/aic7xxx/
Daic7xxx.seq575 shr A, CMD_GROUP_CODE_SHIFT;
1794 shr DINDEX, 4, SINDEX;
1816 shr SINDEX, 4, SAVED_SCSIID;
2159 shr ARG_2, 3, A;
2172 shr ARG_2, 2, A;
2286 shr A, 3;
Daic79xx.seq339 shr SINDEX, 3, SCB_SCSIID;
567 shr SELOID, 4, SCB_SCSIID;
780 shr DINDEX, 3, SCB_SCSIID;
1060 shr NEGOADDR, 4, SAVED_SCSIID;
1086 shr SINDEX, 3; /* Multiply by 2 */ \
/drivers/net/ethernet/qlogic/netxen/
Dnetxen_nic.h1419 u8 shr; member
Dnetxen_nic_hw.c2043 read_value >>= crtEntry->shr; in netxen_md_cntrl()