/drivers/clocksource/ |
D | timer-davinci.c | 87 unsigned int tcr; in davinci_tim12_shutdown() local 89 tcr = DAVINCI_TIMER_ENAMODE_DISABLED << in davinci_tim12_shutdown() 96 tcr |= DAVINCI_TIMER_ENAMODE_PERIODIC << in davinci_tim12_shutdown() 99 writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR); in davinci_tim12_shutdown() 104 unsigned int tcr; in davinci_tim12_set_oneshot() local 106 tcr = DAVINCI_TIMER_ENAMODE_ONESHOT << in davinci_tim12_set_oneshot() 109 tcr |= DAVINCI_TIMER_ENAMODE_PERIODIC << in davinci_tim12_set_oneshot() 112 writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR); in davinci_tim12_set_oneshot() 198 int tcr; in davinci_clocksource_init_tim34() local 200 tcr = DAVINCI_TIMER_ENAMODE_PERIODIC << in davinci_clocksource_init_tim34() [all …]
|
D | timer-keystone.c | 76 u32 tcr; in keystone_timer_config() local 79 tcr = keystone_timer_readl(TCR); in keystone_timer_config() 80 off = tcr & ~(TCR_ENAMODE_MASK); in keystone_timer_config() 83 tcr |= mask; in keystone_timer_config() 102 keystone_timer_writel(tcr, TCR); in keystone_timer_config() 108 u32 tcr; in keystone_timer_disable() local 110 tcr = keystone_timer_readl(TCR); in keystone_timer_disable() 113 tcr &= ~(TCR_ENAMODE_MASK); in keystone_timer_disable() 114 keystone_timer_writel(tcr, TCR); in keystone_timer_disable()
|
/drivers/iommu/arm/arm-smmu/ |
D | arm-smmu.h | 355 u32 tcr[2]; member 386 u32 tcr = FIELD_PREP(ARM_SMMU_TCR_TG0, cfg->arm_lpae_s1_cfg.tcr.tg) | in arm_smmu_lpae_tcr() local 387 FIELD_PREP(ARM_SMMU_TCR_SH0, cfg->arm_lpae_s1_cfg.tcr.sh) | in arm_smmu_lpae_tcr() 388 FIELD_PREP(ARM_SMMU_TCR_ORGN0, cfg->arm_lpae_s1_cfg.tcr.orgn) | in arm_smmu_lpae_tcr() 389 FIELD_PREP(ARM_SMMU_TCR_IRGN0, cfg->arm_lpae_s1_cfg.tcr.irgn) | in arm_smmu_lpae_tcr() 390 FIELD_PREP(ARM_SMMU_TCR_T0SZ, cfg->arm_lpae_s1_cfg.tcr.tsz); in arm_smmu_lpae_tcr() 397 tcr = (tcr << 16) & ~ARM_SMMU_TCR_A1; in arm_smmu_lpae_tcr() 398 tcr |= ARM_SMMU_TCR_EPD0; in arm_smmu_lpae_tcr() 400 tcr |= ARM_SMMU_TCR_EPD1; in arm_smmu_lpae_tcr() 402 return tcr; in arm_smmu_lpae_tcr() [all …]
|
D | arm-smmu-qcom.c | 128 if (cb->tcr[0] & ARM_SMMU_TCR_EPD1) in qcom_adreno_smmu_set_ttbr0_cfg() 134 if ((cb->tcr[0] & ARM_SMMU_TCR_EPD0)) in qcom_adreno_smmu_set_ttbr0_cfg() 138 cb->tcr[0] = arm_smmu_lpae_tcr(&pgtable->cfg); in qcom_adreno_smmu_set_ttbr0_cfg() 141 u32 tcr = cb->tcr[0]; in qcom_adreno_smmu_set_ttbr0_cfg() local 144 if (!(cb->tcr[0] & ARM_SMMU_TCR_EPD0)) in qcom_adreno_smmu_set_ttbr0_cfg() 147 tcr |= arm_smmu_lpae_tcr(pgtbl_cfg); in qcom_adreno_smmu_set_ttbr0_cfg() 148 tcr &= ~(ARM_SMMU_TCR_EPD0 | ARM_SMMU_TCR_EPD1); in qcom_adreno_smmu_set_ttbr0_cfg() 150 cb->tcr[0] = tcr; in qcom_adreno_smmu_set_ttbr0_cfg()
|
D | arm-smmu.c | 484 cb->tcr[0] = pgtbl_cfg->arm_v7s_cfg.tcr; in arm_smmu_init_context_bank() 486 cb->tcr[0] = arm_smmu_lpae_tcr(pgtbl_cfg); in arm_smmu_init_context_bank() 487 cb->tcr[1] = arm_smmu_lpae_tcr2(pgtbl_cfg); in arm_smmu_init_context_bank() 489 cb->tcr[1] |= ARM_SMMU_TCR2_AS; in arm_smmu_init_context_bank() 491 cb->tcr[0] |= ARM_SMMU_TCR_EAE; in arm_smmu_init_context_bank() 494 cb->tcr[0] = arm_smmu_lpae_vtcr(pgtbl_cfg); in arm_smmu_init_context_bank() 583 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TCR2, cb->tcr[1]); in arm_smmu_write_context_bank() 584 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TCR, cb->tcr[0]); in arm_smmu_write_context_bank()
|
/drivers/iommu/ |
D | io-pgtable-arm.c | 844 typeof(&cfg->arm_lpae_s1_cfg.tcr) tcr = &cfg->arm_lpae_s1_cfg.tcr; in arm_64_lpae_alloc_pgtable_s1() local 858 tcr->sh = ARM_LPAE_TCR_SH_IS; in arm_64_lpae_alloc_pgtable_s1() 859 tcr->irgn = ARM_LPAE_TCR_RGN_WBWA; in arm_64_lpae_alloc_pgtable_s1() 860 tcr->orgn = ARM_LPAE_TCR_RGN_WBWA; in arm_64_lpae_alloc_pgtable_s1() 864 tcr->sh = ARM_LPAE_TCR_SH_OS; in arm_64_lpae_alloc_pgtable_s1() 865 tcr->irgn = ARM_LPAE_TCR_RGN_NC; in arm_64_lpae_alloc_pgtable_s1() 867 tcr->orgn = ARM_LPAE_TCR_RGN_NC; in arm_64_lpae_alloc_pgtable_s1() 869 tcr->orgn = ARM_LPAE_TCR_RGN_WBWA; in arm_64_lpae_alloc_pgtable_s1() 875 tcr->tg = tg1 ? ARM_LPAE_TCR_TG1_4K : ARM_LPAE_TCR_TG0_4K; in arm_64_lpae_alloc_pgtable_s1() 878 tcr->tg = tg1 ? ARM_LPAE_TCR_TG1_16K : ARM_LPAE_TCR_TG0_16K; in arm_64_lpae_alloc_pgtable_s1() [all …]
|
/drivers/iommu/arm/arm-smmu-v3/ |
D | arm-smmu-v3-sva.c | 96 u64 tcr, par, reg; in arm_smmu_alloc_shared_cd() local 130 tcr = FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ, 64ULL - vabits_actual) | in arm_smmu_alloc_shared_cd() 138 tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_TG0, ARM_LPAE_TCR_TG0_4K); in arm_smmu_alloc_shared_cd() 141 tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_TG0, ARM_LPAE_TCR_TG0_16K); in arm_smmu_alloc_shared_cd() 144 tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_TG0, ARM_LPAE_TCR_TG0_64K); in arm_smmu_alloc_shared_cd() 154 tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_IPS, par); in arm_smmu_alloc_shared_cd() 157 cd->tcr = tcr; in arm_smmu_alloc_shared_cd()
|
D | arm-smmu-v3.c | 1103 val = cd->tcr | in arm_smmu_write_ctx_desc() 2095 typeof(&pgtbl_cfg->arm_lpae_s1_cfg.tcr) tcr = &pgtbl_cfg->arm_lpae_s1_cfg.tcr; in arm_smmu_domain_finalise_s1() local 2116 cfg->cd.tcr = FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ, tcr->tsz) | in arm_smmu_domain_finalise_s1() 2117 FIELD_PREP(CTXDESC_CD_0_TCR_TG0, tcr->tg) | in arm_smmu_domain_finalise_s1() 2118 FIELD_PREP(CTXDESC_CD_0_TCR_IRGN0, tcr->irgn) | in arm_smmu_domain_finalise_s1() 2119 FIELD_PREP(CTXDESC_CD_0_TCR_ORGN0, tcr->orgn) | in arm_smmu_domain_finalise_s1() 2120 FIELD_PREP(CTXDESC_CD_0_TCR_SH0, tcr->sh) | in arm_smmu_domain_finalise_s1() 2121 FIELD_PREP(CTXDESC_CD_0_TCR_IPS, tcr->ips) | in arm_smmu_domain_finalise_s1()
|
/drivers/watchdog/ |
D | txx9wdt.c | 58 &txx9wdt_reg->tcr); in txx9wdt_start() 68 __raw_writel(__raw_readl(&txx9wdt_reg->tcr) & ~TXx9_TMTCR_TCE, in txx9wdt_stop() 69 &txx9wdt_reg->tcr); in txx9wdt_stop()
|
/drivers/tty/serial/ |
D | sunsab.h | 18 u8 tcr; /* Termination Character Register */ member 49 u8 tcr; member 85 u8 tcr; member
|
D | dz.c | 809 unsigned short csr, tcr, trdy, mask; in dz_console_putchar() local 815 tcr = dz_in(dport, DZ_TCR); in dz_console_putchar() 816 tcr |= 1 << dport->port.line; in dz_console_putchar() 817 mask = tcr; in dz_console_putchar() 838 dz_out(dport, DZ_TCR, tcr); in dz_console_putchar()
|
/drivers/dma/sh/ |
D | shdmac.c | 219 sh_dmae_writel(sh_chan, hw->tcr >> sh_chan->xmit_shift, TCR); in dmae_set_reg() 291 sh_desc->hw.tcr, sh_desc->hw.sar, sh_desc->hw.dar); in sh_dmae_start_xfer() 389 sh_desc->hw.tcr = *len; in sh_dmae_desc_setup() 422 return sh_desc->hw.tcr - in sh_dmae_get_partial() 464 (sh_desc->hw.dar + sh_desc->hw.tcr) == dar_buf) || in sh_dmae_desc_completed() 466 (sh_desc->hw.sar + sh_desc->hw.tcr) == sar_buf); in sh_dmae_desc_completed()
|
D | shdma.h | 47 u32 tcr; /* TCR / transfer count */ member
|
/drivers/dma/bestcomm/ |
D | fec.c | 128 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_fec_rx_reset() 229 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_fec_tx_reset()
|
D | gen_bd.c | 131 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_gen_bd_rx_reset() 215 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_gen_bd_tx_reset()
|
D | bestcomm.c | 316 out_be16(&bcom_eng->regs->tcr[task], 0); in bcom_engine_init() 350 out_be16(&bcom_eng->regs->tcr[task], 0); in bcom_engine_cleanup()
|
D | ata.c | 84 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_ata_init()
|
/drivers/atm/ |
D | idt77252.c | 2137 int tcr, tcra; in idt77252_init_cbr() local 2152 tcr = atm_pcr_goal(&qos->txtp); in idt77252_init_cbr() 2153 tcra = tcr >= 0 ? tcr : -tcr; in idt77252_init_cbr() 2161 if (tcr > 0) { in idt77252_init_cbr() 2164 } else if (tcr == 0) { in idt77252_init_cbr() 2207 int tcr; in idt77252_init_ubr() local 2220 tcr = atm_pcr_goal(&qos->txtp); in idt77252_init_ubr() 2221 if (tcr == 0) in idt77252_init_ubr() 2222 tcr = card->link_pcr; in idt77252_init_ubr() 2224 vc->estimator = idt77252_init_est(vc, tcr); in idt77252_init_ubr() [all …]
|
D | nicstar.c | 1237 int tcr, tcra; /* target cell rate, and absolute value */ in ns_open() local 1292 tcr = atm_pcr_goal(&(vcc->qos.txtp)); in ns_open() 1293 tcra = tcr >= 0 ? tcr : -tcr; in ns_open() 1304 if (tcr > 0) { in ns_open() 1307 } else if (tcr == 0) { in ns_open()
|
/drivers/staging/vt6655/ |
D | desc.h | 213 volatile u8 tcr; member
|
D | device_main.c | 916 if (desc->td1.tcr & TCR_STP) { in device_tx_srv() 1175 head_td->td1.tcr = 0; in vnt_tx_packet() 1193 head_td->td1.tcr |= (TCR_STP | TCR_EDP | EDMSDU); in vnt_tx_packet()
|
/drivers/net/ethernet/natsemi/ |
D | sonic.c | 454 u16 tcr = SONIC_READ(SONIC_TCR); in sonic_interrupt() local 457 __func__, tcr); in sonic_interrupt() 459 if (tcr & (SONIC_TCR_EXD | SONIC_TCR_EXC | in sonic_interrupt()
|
/drivers/net/usb/ |
D | rtl8150.c | 618 u8 cr, tcr, rcr, msr; in enable_net_traffic() local 625 tcr = 0xd8; in enable_net_traffic() 630 set_registers(dev, TCR, 1, &tcr); in enable_net_traffic()
|
/drivers/tty/serial/8250/ |
D | 8250_pci.c | 1134 u8 tcr; in pci_oxsemi_tornado_get_divisor() local 1142 tcr = (cust_div >> 16) & OXSEMI_TORNADO_TCR_MASK; in pci_oxsemi_tornado_get_divisor() 1164 tcr = tc; in pci_oxsemi_tornado_get_divisor() 1170 tcr = tc; in pci_oxsemi_tornado_get_divisor() 1175 while (tcr <= (OXSEMI_TORNADO_TCR_MASK + 1) >> 1 && in pci_oxsemi_tornado_get_divisor() 1178 tcr <<= 1; in pci_oxsemi_tornado_get_divisor() 1181 if (tcr <= (OXSEMI_TORNADO_TCR_MASK + 1) >> 1) { in pci_oxsemi_tornado_get_divisor() 1183 tcr <<= 1; in pci_oxsemi_tornado_get_divisor() 1194 *frac = (cpr << 8) | (tcr & OXSEMI_TORNADO_TCR_MASK); in pci_oxsemi_tornado_get_divisor() 1214 u8 tcr = quot_frac; in pci_oxsemi_tornado_set_divisor() local [all …]
|
/drivers/tty/ |
D | synclink_gt.c | 4393 unsigned short tcr; in tx_set_idle() local 4398 tcr = rd_reg16(info, TCR); in tx_set_idle() 4401 tcr = (tcr & ~(BIT6 + BIT5)) | BIT4; in tx_set_idle() 4404 } else if (!(tcr & BIT6)) { in tx_set_idle() 4406 tcr &= ~(BIT5 + BIT4); in tx_set_idle() 4408 wr_reg16(info, TCR, tcr); in tx_set_idle()
|