1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Based on arch/arm/include/asm/processor.h
4 *
5 * Copyright (C) 1995-1999 Russell King
6 * Copyright (C) 2012 ARM Ltd.
7 */
8 #ifndef __ASM_PROCESSOR_H
9 #define __ASM_PROCESSOR_H
10
11 /*
12 * On arm64 systems, unaligned accesses by the CPU are cheap, and so there is
13 * no point in shifting all network buffers by 2 bytes just to make some IP
14 * header fields appear aligned in memory, potentially sacrificing some DMA
15 * performance on some platforms.
16 */
17 #define NET_IP_ALIGN 0
18
19 #define MTE_CTRL_GCR_USER_EXCL_SHIFT 0
20 #define MTE_CTRL_GCR_USER_EXCL_MASK 0xffff
21
22 #define MTE_CTRL_TCF_SYNC (1UL << 16)
23 #define MTE_CTRL_TCF_ASYNC (1UL << 17)
24 #define MTE_CTRL_TCF_ASYMM (1UL << 18)
25
26 #ifndef __ASSEMBLY__
27
28 #include <linux/build_bug.h>
29 #include <linux/cache.h>
30 #include <linux/init.h>
31 #include <linux/stddef.h>
32 #include <linux/string.h>
33 #include <linux/thread_info.h>
34 #include <linux/android_vendor.h>
35
36 #include <vdso/processor.h>
37
38 #include <asm/alternative.h>
39 #include <asm/cpufeature.h>
40 #include <asm/hw_breakpoint.h>
41 #include <asm/kasan.h>
42 #include <asm/lse.h>
43 #include <asm/pgtable-hwdef.h>
44 #include <asm/pointer_auth.h>
45 #include <asm/ptrace.h>
46 #include <asm/spectre.h>
47 #include <asm/types.h>
48
49 /*
50 * TASK_SIZE - the maximum size of a user space task.
51 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
52 */
53
54 #define DEFAULT_MAP_WINDOW_64 (UL(1) << VA_BITS_MIN)
55 #define TASK_SIZE_64 (UL(1) << vabits_actual)
56 #define TASK_SIZE_MAX (UL(1) << VA_BITS)
57
58 #ifdef CONFIG_COMPAT
59 #if defined(CONFIG_ARM64_64K_PAGES) && defined(CONFIG_KUSER_HELPERS)
60 /*
61 * With CONFIG_ARM64_64K_PAGES enabled, the last page is occupied
62 * by the compat vectors page.
63 */
64 #define TASK_SIZE_32 UL(0x100000000)
65 #else
66 #define TASK_SIZE_32 (UL(0x100000000) - PAGE_SIZE)
67 #endif /* CONFIG_ARM64_64K_PAGES */
68 #define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
69 TASK_SIZE_32 : TASK_SIZE_64)
70 #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
71 TASK_SIZE_32 : TASK_SIZE_64)
72 #define DEFAULT_MAP_WINDOW (test_thread_flag(TIF_32BIT) ? \
73 TASK_SIZE_32 : DEFAULT_MAP_WINDOW_64)
74 #else
75 #define TASK_SIZE TASK_SIZE_64
76 #define DEFAULT_MAP_WINDOW DEFAULT_MAP_WINDOW_64
77 #endif /* CONFIG_COMPAT */
78
79 #ifdef CONFIG_ARM64_FORCE_52BIT
80 #define STACK_TOP_MAX TASK_SIZE_64
81 #define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 4))
82 #else
83 #define STACK_TOP_MAX DEFAULT_MAP_WINDOW_64
84 #define TASK_UNMAPPED_BASE (PAGE_ALIGN(DEFAULT_MAP_WINDOW / 4))
85 #endif /* CONFIG_ARM64_FORCE_52BIT */
86
87 #ifdef CONFIG_COMPAT
88 #define AARCH32_VECTORS_BASE 0xffff0000
89 #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
90 AARCH32_VECTORS_BASE : STACK_TOP_MAX)
91 #else
92 #define STACK_TOP STACK_TOP_MAX
93 #endif /* CONFIG_COMPAT */
94
95 #ifndef CONFIG_ARM64_FORCE_52BIT
96 #define arch_get_mmap_end(addr) ((addr > DEFAULT_MAP_WINDOW) ? TASK_SIZE :\
97 DEFAULT_MAP_WINDOW)
98
99 #define arch_get_mmap_base(addr, base) ((addr > DEFAULT_MAP_WINDOW) ? \
100 base + TASK_SIZE - DEFAULT_MAP_WINDOW :\
101 base)
102 #endif /* CONFIG_ARM64_FORCE_52BIT */
103
104 extern phys_addr_t arm64_dma_phys_limit;
105 #define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1)
106
107 struct debug_info {
108 #ifdef CONFIG_HAVE_HW_BREAKPOINT
109 /* Have we suspended stepping by a debugger? */
110 int suspended_step;
111 /* Allow breakpoints and watchpoints to be disabled for this thread. */
112 int bps_disabled;
113 int wps_disabled;
114 /* Hardware breakpoints pinned to this task. */
115 struct perf_event *hbp_break[ARM_MAX_BRP];
116 struct perf_event *hbp_watch[ARM_MAX_WRP];
117 #endif
118 };
119
120 struct cpu_context {
121 unsigned long x19;
122 unsigned long x20;
123 unsigned long x21;
124 unsigned long x22;
125 unsigned long x23;
126 unsigned long x24;
127 unsigned long x25;
128 unsigned long x26;
129 unsigned long x27;
130 unsigned long x28;
131 unsigned long fp;
132 unsigned long sp;
133 unsigned long pc;
134 };
135
136 struct thread_struct {
137 struct cpu_context cpu_context; /* cpu context */
138
139 /*
140 * Whitelisted fields for hardened usercopy:
141 * Maintainers must ensure manually that this contains no
142 * implicit padding.
143 */
144 struct {
145 unsigned long tp_value; /* TLS register */
146 unsigned long tp2_value;
147 struct user_fpsimd_state fpsimd_state;
148 } uw;
149
150 ANDROID_VENDOR_DATA(1);
151
152 unsigned int fpsimd_cpu;
153 void *sve_state; /* SVE registers, if any */
154 unsigned int sve_vl; /* SVE vector length */
155 unsigned int sve_vl_onexec; /* SVE vl after next exec */
156 unsigned long fault_address; /* fault info */
157 unsigned long fault_code; /* ESR_EL1 value */
158 struct debug_info debug; /* debugging */
159 #ifdef CONFIG_ARM64_PTR_AUTH
160 struct ptrauth_keys_user keys_user;
161 #ifdef CONFIG_ARM64_PTR_AUTH_KERNEL
162 struct ptrauth_keys_kernel keys_kernel;
163 #endif
164 #endif
165 #ifdef CONFIG_ARM64_MTE
166 u64 mte_ctrl;
167 #endif
168 u64 sctlr_user;
169 };
170
171 #define SCTLR_USER_MASK \
172 (SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | SCTLR_ELx_ENDA | SCTLR_ELx_ENDB | \
173 SCTLR_EL1_TCF0_MASK)
174
arch_thread_struct_whitelist(unsigned long * offset,unsigned long * size)175 static inline void arch_thread_struct_whitelist(unsigned long *offset,
176 unsigned long *size)
177 {
178 /* Verify that there is no padding among the whitelisted fields: */
179 BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
180 sizeof_field(struct thread_struct, uw.tp_value) +
181 sizeof_field(struct thread_struct, uw.tp2_value) +
182 sizeof_field(struct thread_struct, uw.fpsimd_state));
183
184 *offset = offsetof(struct thread_struct, uw);
185 *size = sizeof_field(struct thread_struct, uw);
186 }
187
188 #ifdef CONFIG_COMPAT
189 #define task_user_tls(t) \
190 ({ \
191 unsigned long *__tls; \
192 if (is_compat_thread(task_thread_info(t))) \
193 __tls = &(t)->thread.uw.tp2_value; \
194 else \
195 __tls = &(t)->thread.uw.tp_value; \
196 __tls; \
197 })
198 #else
199 #define task_user_tls(t) (&(t)->thread.uw.tp_value)
200 #endif
201
202 /* Sync TPIDR_EL0 back to thread_struct for current */
203 void tls_preserve_current_state(void);
204
205 #define INIT_THREAD { \
206 .fpsimd_cpu = NR_CPUS, \
207 }
208
start_thread_common(struct pt_regs * regs,unsigned long pc)209 static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)
210 {
211 s32 previous_syscall = regs->syscallno;
212 memset(regs, 0, sizeof(*regs));
213 regs->syscallno = previous_syscall;
214 regs->pc = pc;
215
216 if (system_uses_irq_prio_masking())
217 regs->pmr_save = GIC_PRIO_IRQON;
218 }
219
start_thread(struct pt_regs * regs,unsigned long pc,unsigned long sp)220 static inline void start_thread(struct pt_regs *regs, unsigned long pc,
221 unsigned long sp)
222 {
223 start_thread_common(regs, pc);
224 regs->pstate = PSR_MODE_EL0t;
225 spectre_v4_enable_task_mitigation(current);
226 regs->sp = sp;
227 }
228
229 #ifdef CONFIG_COMPAT
compat_start_thread(struct pt_regs * regs,unsigned long pc,unsigned long sp)230 static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
231 unsigned long sp)
232 {
233 start_thread_common(regs, pc);
234 regs->pstate = PSR_AA32_MODE_USR;
235 if (pc & 1)
236 regs->pstate |= PSR_AA32_T_BIT;
237
238 #ifdef __AARCH64EB__
239 regs->pstate |= PSR_AA32_E_BIT;
240 #endif
241
242 spectre_v4_enable_task_mitigation(current);
243 regs->compat_sp = sp;
244 }
245 #endif
246
is_ttbr0_addr(unsigned long addr)247 static __always_inline bool is_ttbr0_addr(unsigned long addr)
248 {
249 /* entry assembly clears tags for TTBR0 addrs */
250 return addr < TASK_SIZE;
251 }
252
is_ttbr1_addr(unsigned long addr)253 static __always_inline bool is_ttbr1_addr(unsigned long addr)
254 {
255 /* TTBR1 addresses may have a tag if KASAN_SW_TAGS is in use */
256 return arch_kasan_reset_tag(addr) >= PAGE_OFFSET;
257 }
258
259 /* Forward declaration, a strange C thing */
260 struct task_struct;
261
262 /* Free all resources held by a thread. */
263 extern void release_thread(struct task_struct *);
264
265 unsigned long get_wchan(struct task_struct *p);
266
267 void update_sctlr_el1(u64 sctlr);
268
269 /* Thread switching */
270 extern struct task_struct *cpu_switch_to(struct task_struct *prev,
271 struct task_struct *next);
272
273 #define task_pt_regs(p) \
274 ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
275
276 #define KSTK_EIP(tsk) ((unsigned long)task_pt_regs(tsk)->pc)
277 #define KSTK_ESP(tsk) user_stack_pointer(task_pt_regs(tsk))
278
279 /*
280 * Prefetching support
281 */
282 #define ARCH_HAS_PREFETCH
prefetch(const void * ptr)283 static inline void prefetch(const void *ptr)
284 {
285 asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
286 }
287
288 #define ARCH_HAS_PREFETCHW
prefetchw(const void * ptr)289 static inline void prefetchw(const void *ptr)
290 {
291 asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
292 }
293
294 #define ARCH_HAS_SPINLOCK_PREFETCH
spin_lock_prefetch(const void * ptr)295 static inline void spin_lock_prefetch(const void *ptr)
296 {
297 asm volatile(ARM64_LSE_ATOMIC_INSN(
298 "prfm pstl1strm, %a0",
299 "nop") : : "p" (ptr));
300 }
301
302 extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */
303 extern void __init minsigstksz_setup(void);
304
305 /*
306 * Not at the top of the file due to a direct #include cycle between
307 * <asm/fpsimd.h> and <asm/processor.h>. Deferring this #include
308 * ensures that contents of processor.h are visible to fpsimd.h even if
309 * processor.h is included first.
310 *
311 * These prctl helpers are the only things in this file that require
312 * fpsimd.h. The core code expects them to be in this header.
313 */
314 #include <asm/fpsimd.h>
315
316 /* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */
317 #define SVE_SET_VL(arg) sve_set_current_vl(arg)
318 #define SVE_GET_VL() sve_get_current_vl()
319
320 /* PR_PAC_RESET_KEYS prctl */
321 #define PAC_RESET_KEYS(tsk, arg) ptrauth_prctl_reset_keys(tsk, arg)
322
323 /* PR_PAC_{SET,GET}_ENABLED_KEYS prctl */
324 #define PAC_SET_ENABLED_KEYS(tsk, keys, enabled) \
325 ptrauth_set_enabled_keys(tsk, keys, enabled)
326 #define PAC_GET_ENABLED_KEYS(tsk) ptrauth_get_enabled_keys(tsk)
327
328 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
329 /* PR_{SET,GET}_TAGGED_ADDR_CTRL prctl */
330 long set_tagged_addr_ctrl(struct task_struct *task, unsigned long arg);
331 long get_tagged_addr_ctrl(struct task_struct *task);
332 #define SET_TAGGED_ADDR_CTRL(arg) set_tagged_addr_ctrl(current, arg)
333 #define GET_TAGGED_ADDR_CTRL() get_tagged_addr_ctrl(current)
334 #endif
335
336 /*
337 * For CONFIG_GCC_PLUGIN_STACKLEAK
338 *
339 * These need to be macros because otherwise we get stuck in a nightmare
340 * of header definitions for the use of task_stack_page.
341 */
342
343 /*
344 * The top of the current task's task stack
345 */
346 #define current_top_of_stack() ((unsigned long)current->stack + THREAD_SIZE)
347 #define on_thread_stack() (on_task_stack(current, current_stack_pointer, 1, NULL))
348
349 #endif /* __ASSEMBLY__ */
350 #endif /* __ASM_PROCESSOR_H */
351