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1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2014 MediaTek Inc.
4  * Author: James Liao <jamesjj.liao@mediatek.com>
5  */
6 
7 #include <linux/of.h>
8 #include <linux/of_address.h>
9 #include <linux/err.h>
10 #include <linux/io.h>
11 #include <linux/slab.h>
12 #include <linux/delay.h>
13 #include <linux/clkdev.h>
14 #include <linux/module.h>
15 #include <linux/mfd/syscon.h>
16 #include <linux/device.h>
17 #include <linux/of_device.h>
18 
19 #include "clk-mtk.h"
20 #include "clk-gate.h"
21 
mtk_alloc_clk_data(unsigned int clk_num)22 struct clk_onecell_data *mtk_alloc_clk_data(unsigned int clk_num)
23 {
24 	int i;
25 	struct clk_onecell_data *clk_data;
26 
27 	clk_data = kzalloc(sizeof(*clk_data), GFP_KERNEL);
28 	if (!clk_data)
29 		return NULL;
30 
31 	clk_data->clks = kcalloc(clk_num, sizeof(*clk_data->clks), GFP_KERNEL);
32 	if (!clk_data->clks)
33 		goto err_out;
34 
35 	clk_data->clk_num = clk_num;
36 
37 	for (i = 0; i < clk_num; i++)
38 		clk_data->clks[i] = ERR_PTR(-ENOENT);
39 
40 	return clk_data;
41 err_out:
42 	kfree(clk_data);
43 
44 	return NULL;
45 }
46 EXPORT_SYMBOL_GPL(mtk_alloc_clk_data);
47 
mtk_clk_register_fixed_clks(const struct mtk_fixed_clk * clks,int num,struct clk_onecell_data * clk_data)48 void mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks,
49 		int num, struct clk_onecell_data *clk_data)
50 {
51 	int i;
52 	struct clk *clk;
53 
54 	for (i = 0; i < num; i++) {
55 		const struct mtk_fixed_clk *rc = &clks[i];
56 
57 		if (clk_data && !IS_ERR_OR_NULL(clk_data->clks[rc->id]))
58 			continue;
59 
60 		clk = clk_register_fixed_rate(NULL, rc->name, rc->parent, 0,
61 					      rc->rate);
62 
63 		if (IS_ERR(clk)) {
64 			pr_err("Failed to register clk %s: %ld\n",
65 					rc->name, PTR_ERR(clk));
66 			continue;
67 		}
68 
69 		if (clk_data)
70 			clk_data->clks[rc->id] = clk;
71 	}
72 }
73 EXPORT_SYMBOL_GPL(mtk_clk_register_fixed_clks);
74 
mtk_clk_register_factors(const struct mtk_fixed_factor * clks,int num,struct clk_onecell_data * clk_data)75 void mtk_clk_register_factors(const struct mtk_fixed_factor *clks,
76 		int num, struct clk_onecell_data *clk_data)
77 {
78 	int i;
79 	struct clk *clk;
80 
81 	for (i = 0; i < num; i++) {
82 		const struct mtk_fixed_factor *ff = &clks[i];
83 
84 		if (clk_data && !IS_ERR_OR_NULL(clk_data->clks[ff->id]))
85 			continue;
86 
87 		clk = clk_register_fixed_factor(NULL, ff->name, ff->parent_name,
88 				CLK_SET_RATE_PARENT, ff->mult, ff->div);
89 
90 		if (IS_ERR(clk)) {
91 			pr_err("Failed to register clk %s: %ld\n",
92 					ff->name, PTR_ERR(clk));
93 			continue;
94 		}
95 
96 		if (clk_data)
97 			clk_data->clks[ff->id] = clk;
98 	}
99 }
100 EXPORT_SYMBOL_GPL(mtk_clk_register_factors);
101 
mtk_clk_register_gates_with_dev(struct device_node * node,const struct mtk_gate * clks,int num,struct clk_onecell_data * clk_data,struct device * dev)102 int mtk_clk_register_gates_with_dev(struct device_node *node,
103 		const struct mtk_gate *clks,
104 		int num, struct clk_onecell_data *clk_data,
105 		struct device *dev)
106 {
107 	int i;
108 	struct clk *clk;
109 	struct regmap *regmap;
110 
111 	if (!clk_data)
112 		return -ENOMEM;
113 
114 	regmap = device_node_to_regmap(node);
115 	if (IS_ERR(regmap)) {
116 		pr_err("Cannot find regmap for %pOF: %ld\n", node,
117 				PTR_ERR(regmap));
118 		return PTR_ERR(regmap);
119 	}
120 
121 	for (i = 0; i < num; i++) {
122 		const struct mtk_gate *gate = &clks[i];
123 
124 		if (!IS_ERR_OR_NULL(clk_data->clks[gate->id]))
125 			continue;
126 
127 		clk = mtk_clk_register_gate(gate->name, gate->parent_name,
128 				regmap,
129 				gate->regs->set_ofs,
130 				gate->regs->clr_ofs,
131 				gate->regs->sta_ofs,
132 				gate->shift, gate->ops, gate->flags, dev);
133 
134 		if (IS_ERR(clk)) {
135 			pr_err("Failed to register clk %s: %ld\n",
136 					gate->name, PTR_ERR(clk));
137 			continue;
138 		}
139 
140 		clk_data->clks[gate->id] = clk;
141 	}
142 
143 	return 0;
144 }
145 
mtk_clk_register_gates(struct device_node * node,const struct mtk_gate * clks,int num,struct clk_onecell_data * clk_data)146 int mtk_clk_register_gates(struct device_node *node,
147 		const struct mtk_gate *clks,
148 		int num, struct clk_onecell_data *clk_data)
149 {
150 	return mtk_clk_register_gates_with_dev(node,
151 		clks, num, clk_data, NULL);
152 }
153 EXPORT_SYMBOL_GPL(mtk_clk_register_gates);
154 
mtk_clk_register_composite(const struct mtk_composite * mc,void __iomem * base,spinlock_t * lock)155 struct clk *mtk_clk_register_composite(const struct mtk_composite *mc,
156 		void __iomem *base, spinlock_t *lock)
157 {
158 	struct clk *clk;
159 	struct clk_mux *mux = NULL;
160 	struct clk_gate *gate = NULL;
161 	struct clk_divider *div = NULL;
162 	struct clk_hw *mux_hw = NULL, *gate_hw = NULL, *div_hw = NULL;
163 	const struct clk_ops *mux_ops = NULL, *gate_ops = NULL, *div_ops = NULL;
164 	const char * const *parent_names;
165 	const char *parent;
166 	int num_parents;
167 	int ret;
168 
169 	if (mc->mux_shift >= 0) {
170 		mux = kzalloc(sizeof(*mux), GFP_KERNEL);
171 		if (!mux)
172 			return ERR_PTR(-ENOMEM);
173 
174 		mux->reg = base + mc->mux_reg;
175 		mux->mask = BIT(mc->mux_width) - 1;
176 		mux->shift = mc->mux_shift;
177 		mux->lock = lock;
178 		mux->flags = mc->mux_flags;
179 		mux_hw = &mux->hw;
180 		mux_ops = &clk_mux_ops;
181 
182 		parent_names = mc->parent_names;
183 		num_parents = mc->num_parents;
184 	} else {
185 		parent = mc->parent;
186 		parent_names = &parent;
187 		num_parents = 1;
188 	}
189 
190 	if (mc->gate_shift >= 0) {
191 		gate = kzalloc(sizeof(*gate), GFP_KERNEL);
192 		if (!gate) {
193 			ret = -ENOMEM;
194 			goto err_out;
195 		}
196 
197 		gate->reg = base + mc->gate_reg;
198 		gate->bit_idx = mc->gate_shift;
199 		gate->flags = CLK_GATE_SET_TO_DISABLE;
200 		gate->lock = lock;
201 
202 		gate_hw = &gate->hw;
203 		gate_ops = &clk_gate_ops;
204 	}
205 
206 	if (mc->divider_shift >= 0) {
207 		div = kzalloc(sizeof(*div), GFP_KERNEL);
208 		if (!div) {
209 			ret = -ENOMEM;
210 			goto err_out;
211 		}
212 
213 		div->reg = base + mc->divider_reg;
214 		div->shift = mc->divider_shift;
215 		div->width = mc->divider_width;
216 		div->lock = lock;
217 
218 		div_hw = &div->hw;
219 		div_ops = &clk_divider_ops;
220 	}
221 
222 	clk = clk_register_composite(NULL, mc->name, parent_names, num_parents,
223 		mux_hw, mux_ops,
224 		div_hw, div_ops,
225 		gate_hw, gate_ops,
226 		mc->flags);
227 
228 	if (IS_ERR(clk)) {
229 		ret = PTR_ERR(clk);
230 		goto err_out;
231 	}
232 
233 	return clk;
234 err_out:
235 	kfree(div);
236 	kfree(gate);
237 	kfree(mux);
238 
239 	return ERR_PTR(ret);
240 }
241 
mtk_clk_register_composites(const struct mtk_composite * mcs,int num,void __iomem * base,spinlock_t * lock,struct clk_onecell_data * clk_data)242 void mtk_clk_register_composites(const struct mtk_composite *mcs,
243 		int num, void __iomem *base, spinlock_t *lock,
244 		struct clk_onecell_data *clk_data)
245 {
246 	struct clk *clk;
247 	int i;
248 
249 	for (i = 0; i < num; i++) {
250 		const struct mtk_composite *mc = &mcs[i];
251 
252 		if (clk_data && !IS_ERR_OR_NULL(clk_data->clks[mc->id]))
253 			continue;
254 
255 		clk = mtk_clk_register_composite(mc, base, lock);
256 
257 		if (IS_ERR(clk)) {
258 			pr_err("Failed to register clk %s: %ld\n",
259 					mc->name, PTR_ERR(clk));
260 			continue;
261 		}
262 
263 		if (clk_data)
264 			clk_data->clks[mc->id] = clk;
265 	}
266 }
267 EXPORT_SYMBOL_GPL(mtk_clk_register_composites);
268 
mtk_clk_register_dividers(const struct mtk_clk_divider * mcds,int num,void __iomem * base,spinlock_t * lock,struct clk_onecell_data * clk_data)269 void mtk_clk_register_dividers(const struct mtk_clk_divider *mcds,
270 			int num, void __iomem *base, spinlock_t *lock,
271 				struct clk_onecell_data *clk_data)
272 {
273 	struct clk *clk;
274 	int i;
275 
276 	for (i = 0; i <  num; i++) {
277 		const struct mtk_clk_divider *mcd = &mcds[i];
278 
279 		if (clk_data && !IS_ERR_OR_NULL(clk_data->clks[mcd->id]))
280 			continue;
281 
282 		clk = clk_register_divider(NULL, mcd->name, mcd->parent_name,
283 			mcd->flags, base +  mcd->div_reg, mcd->div_shift,
284 			mcd->div_width, mcd->clk_divider_flags, lock);
285 
286 		if (IS_ERR(clk)) {
287 			pr_err("Failed to register clk %s: %ld\n",
288 				mcd->name, PTR_ERR(clk));
289 			continue;
290 		}
291 
292 		if (clk_data)
293 			clk_data->clks[mcd->id] = clk;
294 	}
295 }
296 
mtk_clk_simple_probe(struct platform_device * pdev)297 int mtk_clk_simple_probe(struct platform_device *pdev)
298 {
299 	const struct mtk_clk_desc *mcd;
300 	struct clk_onecell_data *clk_data;
301 	struct device_node *node = pdev->dev.of_node;
302 	int r;
303 
304 	mcd = of_device_get_match_data(&pdev->dev);
305 	if (!mcd)
306 		return -EINVAL;
307 
308 	clk_data = mtk_alloc_clk_data(mcd->num_clks);
309 	if (!clk_data)
310 		return -ENOMEM;
311 
312 	r = mtk_clk_register_gates(node, mcd->clks, mcd->num_clks, clk_data);
313 	if (r)
314 		return r;
315 
316 	return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
317 }
318 
319 MODULE_LICENSE("GPL");
320