1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2020 MediaTek Inc.
4 */
5
6 #include <linux/bitfield.h>
7 #include <linux/cpufreq.h>
8 #include <linux/energy_model.h>
9 #include <linux/init.h>
10 #include <linux/iopoll.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/of_address.h>
14 #include <linux/of_platform.h>
15 #include <linux/slab.h>
16 #if defined(CONFIG_TRACEPOINTS) && defined(CONFIG_ANDROID_VENDOR_HOOKS)
17 #include <linux/device.h>
18 #include <trace/hooks/cpufreq.h>
19 #endif
20
21 #define LUT_MAX_ENTRIES 32U
22 #define LUT_FREQ GENMASK(11, 0)
23 #define LUT_ROW_SIZE 0x4
24 #define CPUFREQ_HW_STATUS BIT(0)
25 #define SVS_HW_STATUS BIT(1)
26 #define POLL_USEC 1000
27 #define TIMEOUT_USEC 300000
28
29 enum {
30 REG_FREQ_LUT_TABLE,
31 REG_FREQ_ENABLE,
32 REG_FREQ_PERF_STATE,
33 REG_FREQ_HW_STATE,
34 REG_EM_POWER_TBL,
35 REG_FREQ_LATENCY,
36
37 REG_ARRAY_SIZE,
38 };
39
40 struct mtk_cpufreq_data {
41 struct cpufreq_frequency_table *table;
42 void __iomem *reg_bases[REG_ARRAY_SIZE];
43 int nr_opp;
44 };
45
46 static const u16 cpufreq_mtk_offsets[REG_ARRAY_SIZE] = {
47 [REG_FREQ_LUT_TABLE] = 0x0,
48 [REG_FREQ_ENABLE] = 0x84,
49 [REG_FREQ_PERF_STATE] = 0x88,
50 [REG_FREQ_HW_STATE] = 0x8c,
51 [REG_EM_POWER_TBL] = 0x90,
52 [REG_FREQ_LATENCY] = 0x110,
53 };
54
55 static int __maybe_unused
mtk_cpufreq_get_cpu_power(unsigned long * mW,unsigned long * KHz,struct device * cpu_dev)56 mtk_cpufreq_get_cpu_power(unsigned long *mW,
57 unsigned long *KHz, struct device *cpu_dev)
58 {
59 struct mtk_cpufreq_data *data;
60 struct cpufreq_policy *policy;
61 int i;
62
63 policy = cpufreq_cpu_get_raw(cpu_dev->id);
64 if (!policy)
65 return 0;
66
67 data = policy->driver_data;
68
69 for (i = 0; i < data->nr_opp; i++) {
70 if (data->table[i].frequency < *KHz)
71 break;
72 }
73 i--;
74
75 *KHz = data->table[i].frequency;
76 *mW = readl_relaxed(data->reg_bases[REG_EM_POWER_TBL] +
77 i * LUT_ROW_SIZE) / 1000;
78
79 return 0;
80 }
81
mtk_cpufreq_hw_target_index(struct cpufreq_policy * policy,unsigned int index)82 static int mtk_cpufreq_hw_target_index(struct cpufreq_policy *policy,
83 unsigned int index)
84 {
85 struct mtk_cpufreq_data *data = policy->driver_data;
86
87 writel_relaxed(index, data->reg_bases[REG_FREQ_PERF_STATE]);
88
89 return 0;
90 }
91
mtk_cpufreq_hw_get(unsigned int cpu)92 static unsigned int mtk_cpufreq_hw_get(unsigned int cpu)
93 {
94 struct mtk_cpufreq_data *data;
95 struct cpufreq_policy *policy;
96 unsigned int index;
97
98 policy = cpufreq_cpu_get_raw(cpu);
99 if (!policy)
100 return 0;
101
102 data = policy->driver_data;
103
104 index = readl_relaxed(data->reg_bases[REG_FREQ_PERF_STATE]);
105 index = min(index, LUT_MAX_ENTRIES - 1);
106
107 return data->table[index].frequency;
108 }
109
mtk_cpufreq_hw_fast_switch(struct cpufreq_policy * policy,unsigned int target_freq)110 static unsigned int mtk_cpufreq_hw_fast_switch(struct cpufreq_policy *policy,
111 unsigned int target_freq)
112 {
113 struct mtk_cpufreq_data *data = policy->driver_data;
114 unsigned int index;
115
116 index = cpufreq_table_find_index_dl(policy, target_freq);
117
118 writel_relaxed(index, data->reg_bases[REG_FREQ_PERF_STATE]);
119
120 return policy->freq_table[index].frequency;
121 }
122
mtk_cpu_create_freq_table(struct platform_device * pdev,struct mtk_cpufreq_data * data)123 static int mtk_cpu_create_freq_table(struct platform_device *pdev,
124 struct mtk_cpufreq_data *data)
125 {
126 struct device *dev = &pdev->dev;
127 u32 temp, i, freq, prev_freq = 0;
128 void __iomem *base_table;
129
130 data->table = devm_kcalloc(dev, LUT_MAX_ENTRIES + 1,
131 sizeof(*data->table), GFP_KERNEL);
132 if (!data->table)
133 return -ENOMEM;
134
135 base_table = data->reg_bases[REG_FREQ_LUT_TABLE];
136
137 for (i = 0; i < LUT_MAX_ENTRIES; i++) {
138 temp = readl_relaxed(base_table + (i * LUT_ROW_SIZE));
139 freq = FIELD_GET(LUT_FREQ, temp) * 1000;
140
141 if (freq == prev_freq)
142 break;
143
144 data->table[i].frequency = freq;
145
146 dev_dbg(dev, "index=%d freq=%d\n", i, data->table[i].frequency);
147
148 prev_freq = freq;
149 }
150
151 data->table[i].frequency = CPUFREQ_TABLE_END;
152 data->nr_opp = i;
153
154 return 0;
155 }
156
mtk_cpu_resources_init(struct platform_device * pdev,struct cpufreq_policy * policy,const u16 * offsets)157 static int mtk_cpu_resources_init(struct platform_device *pdev,
158 struct cpufreq_policy *policy,
159 const u16 *offsets)
160 {
161 struct mtk_cpufreq_data *data;
162 struct device *dev = &pdev->dev;
163 void __iomem *base;
164 int ret, i;
165 int index;
166
167 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
168 if (!data)
169 return -ENOMEM;
170
171 index = of_perf_domain_get_sharing_cpumask(policy->cpu, "performance-domains",
172 "#performance-domain-cells",
173 policy->cpus);
174 if (index < 0)
175 return index;
176
177 base = devm_platform_ioremap_resource(pdev, index);
178 if (IS_ERR(base))
179 return PTR_ERR(base);
180
181 for (i = REG_FREQ_LUT_TABLE; i < REG_ARRAY_SIZE; i++)
182 data->reg_bases[i] = base + offsets[i];
183
184 ret = mtk_cpu_create_freq_table(pdev, data);
185 if (ret) {
186 dev_info(dev, "Domain-%d failed to create freq table\n", index);
187 return ret;
188 }
189
190 policy->freq_table = data->table;
191 policy->driver_data = data;
192
193 return 0;
194 }
195
mtk_cpufreq_hw_cpu_init(struct cpufreq_policy * policy)196 static int mtk_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
197 {
198 struct platform_device *pdev = cpufreq_get_driver_data();
199 int sig, pwr_hw = CPUFREQ_HW_STATUS | SVS_HW_STATUS;
200 struct mtk_cpufreq_data *data;
201 unsigned int latency;
202 int ret;
203
204 /* Get the bases of cpufreq for domains */
205 ret = mtk_cpu_resources_init(pdev, policy, platform_get_drvdata(pdev));
206 if (ret) {
207 dev_info(&pdev->dev, "CPUFreq resource init failed\n");
208 return ret;
209 }
210
211 data = policy->driver_data;
212
213 latency = readl_relaxed(data->reg_bases[REG_FREQ_LATENCY]) * 1000;
214 if (!latency)
215 latency = CPUFREQ_ETERNAL;
216
217 policy->cpuinfo.transition_latency = latency;
218 policy->fast_switch_possible = true;
219
220 /* HW should be in enabled state to proceed now */
221 writel_relaxed(0x1, data->reg_bases[REG_FREQ_ENABLE]);
222 if (readl_poll_timeout(data->reg_bases[REG_FREQ_HW_STATE], sig,
223 (sig & pwr_hw) == pwr_hw, POLL_USEC,
224 TIMEOUT_USEC)) {
225 if (!(sig & CPUFREQ_HW_STATUS)) {
226 pr_info("cpufreq hardware of CPU%d is not enabled\n",
227 policy->cpu);
228 return -ENODEV;
229 }
230
231 pr_info("SVS of CPU%d is not enabled\n", policy->cpu);
232 }
233
234 return 0;
235 }
236
mtk_cpufreq_hw_cpu_exit(struct cpufreq_policy * policy)237 static int mtk_cpufreq_hw_cpu_exit(struct cpufreq_policy *policy)
238 {
239 struct mtk_cpufreq_data *data = policy->driver_data;
240
241 /* HW should be in paused state now */
242 writel_relaxed(0x0, data->reg_bases[REG_FREQ_ENABLE]);
243
244 return 0;
245 }
246
mtk_cpufreq_register_em(struct cpufreq_policy * policy)247 static void mtk_cpufreq_register_em(struct cpufreq_policy *policy)
248 {
249 struct em_data_callback em_cb = EM_DATA_CB(mtk_cpufreq_get_cpu_power);
250 struct mtk_cpufreq_data *data = policy->driver_data;
251
252 em_dev_register_perf_domain(get_cpu_device(policy->cpu), data->nr_opp,
253 &em_cb, policy->cpus, true);
254 }
255
256 #if defined(CONFIG_TRACEPOINTS) && defined(CONFIG_ANDROID_VENDOR_HOOKS)
mtk_cpufreq_suppress(void * data,struct device * dev,int val)257 static void mtk_cpufreq_suppress(void *data, struct device *dev, int val)
258 {
259 dev_set_uevent_suppress(dev, val);
260 }
261 #endif
262
263 static struct cpufreq_driver cpufreq_mtk_hw_driver = {
264 .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK |
265 CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
266 CPUFREQ_IS_COOLING_DEV,
267 .verify = cpufreq_generic_frequency_table_verify,
268 .target_index = mtk_cpufreq_hw_target_index,
269 .get = mtk_cpufreq_hw_get,
270 .init = mtk_cpufreq_hw_cpu_init,
271 .exit = mtk_cpufreq_hw_cpu_exit,
272 .register_em = mtk_cpufreq_register_em,
273 .fast_switch = mtk_cpufreq_hw_fast_switch,
274 .name = "mtk-cpufreq-hw",
275 .attr = cpufreq_generic_attr,
276 };
277
mtk_cpufreq_hw_driver_probe(struct platform_device * pdev)278 static int mtk_cpufreq_hw_driver_probe(struct platform_device *pdev)
279 {
280 const void *data;
281 int ret;
282
283 data = of_device_get_match_data(&pdev->dev);
284 if (!data)
285 return -EINVAL;
286
287 platform_set_drvdata(pdev, (void *) data);
288 cpufreq_mtk_hw_driver.driver_data = pdev;
289
290 ret = cpufreq_register_driver(&cpufreq_mtk_hw_driver);
291 if (ret)
292 dev_err(&pdev->dev, "CPUFreq HW driver failed to register\n");
293
294 #if defined(CONFIG_TRACEPOINTS) && defined(CONFIG_ANDROID_VENDOR_HOOKS)
295 ret = register_trace_android_vh_cpufreq_offline(mtk_cpufreq_suppress, NULL);
296 #endif
297
298 return ret;
299 }
300
mtk_cpufreq_hw_driver_remove(struct platform_device * pdev)301 static int mtk_cpufreq_hw_driver_remove(struct platform_device *pdev)
302 {
303 return cpufreq_unregister_driver(&cpufreq_mtk_hw_driver);
304 }
305
306 static const struct of_device_id mtk_cpufreq_hw_match[] = {
307 { .compatible = "mediatek,cpufreq-hw", .data = &cpufreq_mtk_offsets },
308 {}
309 };
310
311 static struct platform_driver mtk_cpufreq_hw_driver = {
312 .probe = mtk_cpufreq_hw_driver_probe,
313 .remove = mtk_cpufreq_hw_driver_remove,
314 .driver = {
315 .name = "mtk-cpufreq-hw",
316 .of_match_table = mtk_cpufreq_hw_match,
317 },
318 };
319 module_platform_driver(mtk_cpufreq_hw_driver);
320
321 MODULE_AUTHOR("Hector Yuan <hector.yuan@mediatek.com>");
322 MODULE_DESCRIPTION("Mediatek cpufreq-hw driver");
323 MODULE_LICENSE("GPL v2");
324