1 // SPDX-License-Identifier: GPL-2.0
2
3 #include <linux/device.h>
4 #include <linux/err.h>
5 #include <linux/errno.h>
6 #include <linux/fs.h>
7 #include <linux/fsi-sbefifo.h>
8 #include <linux/gfp.h>
9 #include <linux/idr.h>
10 #include <linux/kernel.h>
11 #include <linux/list.h>
12 #include <linux/miscdevice.h>
13 #include <linux/module.h>
14 #include <linux/mutex.h>
15 #include <linux/fsi-occ.h>
16 #include <linux/of.h>
17 #include <linux/of_device.h>
18 #include <linux/platform_device.h>
19 #include <linux/sched.h>
20 #include <linux/slab.h>
21 #include <linux/uaccess.h>
22 #include <asm/unaligned.h>
23
24 #define OCC_SRAM_BYTES 4096
25 #define OCC_CMD_DATA_BYTES 4090
26 #define OCC_RESP_DATA_BYTES 4089
27
28 #define OCC_P9_SRAM_CMD_ADDR 0xFFFBE000
29 #define OCC_P9_SRAM_RSP_ADDR 0xFFFBF000
30
31 #define OCC_P10_SRAM_CMD_ADDR 0xFFFFD000
32 #define OCC_P10_SRAM_RSP_ADDR 0xFFFFE000
33
34 #define OCC_P10_SRAM_MODE 0x58 /* Normal mode, OCB channel 2 */
35
36 /*
37 * Assume we don't have much FFDC, if we do we'll overflow and
38 * fail the command. This needs to be big enough for simple
39 * commands as well.
40 */
41 #define OCC_SBE_STATUS_WORDS 32
42
43 #define OCC_TIMEOUT_MS 1000
44 #define OCC_CMD_IN_PRG_WAIT_MS 50
45
46 enum versions { occ_p9, occ_p10 };
47
48 struct occ {
49 struct device *dev;
50 struct device *sbefifo;
51 char name[32];
52 int idx;
53 u8 sequence_number;
54 enum versions version;
55 struct miscdevice mdev;
56 struct mutex occ_lock;
57 };
58
59 #define to_occ(x) container_of((x), struct occ, mdev)
60
61 struct occ_response {
62 u8 seq_no;
63 u8 cmd_type;
64 u8 return_status;
65 __be16 data_length;
66 u8 data[OCC_RESP_DATA_BYTES + 2]; /* two bytes checksum */
67 } __packed;
68
69 struct occ_client {
70 struct occ *occ;
71 struct mutex lock;
72 size_t data_size;
73 size_t read_offset;
74 u8 *buffer;
75 };
76
77 #define to_client(x) container_of((x), struct occ_client, xfr)
78
79 static DEFINE_IDA(occ_ida);
80
occ_open(struct inode * inode,struct file * file)81 static int occ_open(struct inode *inode, struct file *file)
82 {
83 struct occ_client *client = kzalloc(sizeof(*client), GFP_KERNEL);
84 struct miscdevice *mdev = file->private_data;
85 struct occ *occ = to_occ(mdev);
86
87 if (!client)
88 return -ENOMEM;
89
90 client->buffer = (u8 *)__get_free_page(GFP_KERNEL);
91 if (!client->buffer) {
92 kfree(client);
93 return -ENOMEM;
94 }
95
96 client->occ = occ;
97 mutex_init(&client->lock);
98 file->private_data = client;
99
100 /* We allocate a 1-page buffer, make sure it all fits */
101 BUILD_BUG_ON((OCC_CMD_DATA_BYTES + 3) > PAGE_SIZE);
102 BUILD_BUG_ON((OCC_RESP_DATA_BYTES + 7) > PAGE_SIZE);
103
104 return 0;
105 }
106
occ_read(struct file * file,char __user * buf,size_t len,loff_t * offset)107 static ssize_t occ_read(struct file *file, char __user *buf, size_t len,
108 loff_t *offset)
109 {
110 struct occ_client *client = file->private_data;
111 ssize_t rc = 0;
112
113 if (!client)
114 return -ENODEV;
115
116 if (len > OCC_SRAM_BYTES)
117 return -EINVAL;
118
119 mutex_lock(&client->lock);
120
121 /* This should not be possible ... */
122 if (WARN_ON_ONCE(client->read_offset > client->data_size)) {
123 rc = -EIO;
124 goto done;
125 }
126
127 /* Grab how much data we have to read */
128 rc = min(len, client->data_size - client->read_offset);
129 if (copy_to_user(buf, client->buffer + client->read_offset, rc))
130 rc = -EFAULT;
131 else
132 client->read_offset += rc;
133
134 done:
135 mutex_unlock(&client->lock);
136
137 return rc;
138 }
139
occ_write(struct file * file,const char __user * buf,size_t len,loff_t * offset)140 static ssize_t occ_write(struct file *file, const char __user *buf,
141 size_t len, loff_t *offset)
142 {
143 struct occ_client *client = file->private_data;
144 size_t rlen, data_length;
145 ssize_t rc;
146 u8 *cmd;
147
148 if (!client)
149 return -ENODEV;
150
151 if (len > (OCC_CMD_DATA_BYTES + 3) || len < 3)
152 return -EINVAL;
153
154 mutex_lock(&client->lock);
155
156 /* Construct the command */
157 cmd = client->buffer;
158
159 /*
160 * Copy the user command (assume user data follows the occ command
161 * format)
162 * byte 0: command type
163 * bytes 1-2: data length (msb first)
164 * bytes 3-n: data
165 */
166 if (copy_from_user(&cmd[1], buf, len)) {
167 rc = -EFAULT;
168 goto done;
169 }
170
171 /* Extract data length */
172 data_length = (cmd[2] << 8) + cmd[3];
173 if (data_length > OCC_CMD_DATA_BYTES) {
174 rc = -EINVAL;
175 goto done;
176 }
177
178 /* Submit command; 4 bytes before the data and 2 bytes after */
179 rlen = PAGE_SIZE;
180 rc = fsi_occ_submit(client->occ->dev, cmd, data_length + 6, cmd,
181 &rlen);
182 if (rc)
183 goto done;
184
185 /* Set read tracking data */
186 client->data_size = rlen;
187 client->read_offset = 0;
188
189 /* Done */
190 rc = len;
191
192 done:
193 mutex_unlock(&client->lock);
194
195 return rc;
196 }
197
occ_release(struct inode * inode,struct file * file)198 static int occ_release(struct inode *inode, struct file *file)
199 {
200 struct occ_client *client = file->private_data;
201
202 free_page((unsigned long)client->buffer);
203 kfree(client);
204
205 return 0;
206 }
207
208 static const struct file_operations occ_fops = {
209 .owner = THIS_MODULE,
210 .open = occ_open,
211 .read = occ_read,
212 .write = occ_write,
213 .release = occ_release,
214 };
215
occ_verify_checksum(struct occ * occ,struct occ_response * resp,u16 data_length)216 static int occ_verify_checksum(struct occ *occ, struct occ_response *resp,
217 u16 data_length)
218 {
219 /* Fetch the two bytes after the data for the checksum. */
220 u16 checksum_resp = get_unaligned_be16(&resp->data[data_length]);
221 u16 checksum;
222 u16 i;
223
224 checksum = resp->seq_no;
225 checksum += resp->cmd_type;
226 checksum += resp->return_status;
227 checksum += (data_length >> 8) + (data_length & 0xFF);
228
229 for (i = 0; i < data_length; ++i)
230 checksum += resp->data[i];
231
232 if (checksum != checksum_resp) {
233 dev_err(occ->dev, "Bad checksum: %04x!=%04x\n", checksum,
234 checksum_resp);
235 return -EBADMSG;
236 }
237
238 return 0;
239 }
240
occ_getsram(struct occ * occ,u32 offset,void * data,ssize_t len)241 static int occ_getsram(struct occ *occ, u32 offset, void *data, ssize_t len)
242 {
243 u32 data_len = ((len + 7) / 8) * 8; /* must be multiples of 8 B */
244 size_t cmd_len, resp_len, resp_data_len;
245 __be32 *resp, cmd[6];
246 int idx = 0, rc;
247
248 /*
249 * Magic sequence to do SBE getsram command. SBE will fetch data from
250 * specified SRAM address.
251 */
252 switch (occ->version) {
253 default:
254 case occ_p9:
255 cmd_len = 5;
256 cmd[2] = cpu_to_be32(1); /* Normal mode */
257 cmd[3] = cpu_to_be32(OCC_P9_SRAM_RSP_ADDR + offset);
258 break;
259 case occ_p10:
260 idx = 1;
261 cmd_len = 6;
262 cmd[2] = cpu_to_be32(OCC_P10_SRAM_MODE);
263 cmd[3] = 0;
264 cmd[4] = cpu_to_be32(OCC_P10_SRAM_RSP_ADDR + offset);
265 break;
266 }
267
268 cmd[0] = cpu_to_be32(cmd_len);
269 cmd[1] = cpu_to_be32(SBEFIFO_CMD_GET_OCC_SRAM);
270 cmd[4 + idx] = cpu_to_be32(data_len);
271
272 resp_len = (data_len >> 2) + OCC_SBE_STATUS_WORDS;
273 resp = kzalloc(resp_len << 2, GFP_KERNEL);
274 if (!resp)
275 return -ENOMEM;
276
277 rc = sbefifo_submit(occ->sbefifo, cmd, cmd_len, resp, &resp_len);
278 if (rc)
279 goto free;
280
281 rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_GET_OCC_SRAM,
282 resp, resp_len, &resp_len);
283 if (rc)
284 goto free;
285
286 resp_data_len = be32_to_cpu(resp[resp_len - 1]);
287 if (resp_data_len != data_len) {
288 dev_err(occ->dev, "SRAM read expected %d bytes got %zd\n",
289 data_len, resp_data_len);
290 rc = -EBADMSG;
291 } else {
292 memcpy(data, resp, len);
293 }
294
295 free:
296 /* Convert positive SBEI status */
297 if (rc > 0) {
298 dev_err(occ->dev, "SRAM read returned failure status: %08x\n",
299 rc);
300 rc = -EBADMSG;
301 }
302
303 kfree(resp);
304 return rc;
305 }
306
occ_putsram(struct occ * occ,const void * data,ssize_t len,u8 seq_no,u16 checksum)307 static int occ_putsram(struct occ *occ, const void *data, ssize_t len,
308 u8 seq_no, u16 checksum)
309 {
310 size_t cmd_len, buf_len, resp_len, resp_data_len;
311 u32 data_len = ((len + 7) / 8) * 8; /* must be multiples of 8 B */
312 __be32 *buf;
313 u8 *byte_buf;
314 int idx = 0, rc;
315
316 cmd_len = (occ->version == occ_p10) ? 6 : 5;
317
318 /*
319 * We use the same buffer for command and response, make
320 * sure it's big enough
321 */
322 resp_len = OCC_SBE_STATUS_WORDS;
323 cmd_len += data_len >> 2;
324 buf_len = max(cmd_len, resp_len);
325 buf = kzalloc(buf_len << 2, GFP_KERNEL);
326 if (!buf)
327 return -ENOMEM;
328
329 /*
330 * Magic sequence to do SBE putsram command. SBE will transfer
331 * data to specified SRAM address.
332 */
333 buf[0] = cpu_to_be32(cmd_len);
334 buf[1] = cpu_to_be32(SBEFIFO_CMD_PUT_OCC_SRAM);
335
336 switch (occ->version) {
337 default:
338 case occ_p9:
339 buf[2] = cpu_to_be32(1); /* Normal mode */
340 buf[3] = cpu_to_be32(OCC_P9_SRAM_CMD_ADDR);
341 break;
342 case occ_p10:
343 idx = 1;
344 buf[2] = cpu_to_be32(OCC_P10_SRAM_MODE);
345 buf[3] = 0;
346 buf[4] = cpu_to_be32(OCC_P10_SRAM_CMD_ADDR);
347 break;
348 }
349
350 buf[4 + idx] = cpu_to_be32(data_len);
351 memcpy(&buf[5 + idx], data, len);
352
353 byte_buf = (u8 *)&buf[5 + idx];
354 /*
355 * Overwrite the first byte with our sequence number and the last two
356 * bytes with the checksum.
357 */
358 byte_buf[0] = seq_no;
359 byte_buf[len - 2] = checksum >> 8;
360 byte_buf[len - 1] = checksum & 0xff;
361
362 rc = sbefifo_submit(occ->sbefifo, buf, cmd_len, buf, &resp_len);
363 if (rc)
364 goto free;
365
366 rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_PUT_OCC_SRAM,
367 buf, resp_len, &resp_len);
368 if (rc)
369 goto free;
370
371 if (resp_len != 1) {
372 dev_err(occ->dev, "SRAM write response length invalid: %zd\n",
373 resp_len);
374 rc = -EBADMSG;
375 } else {
376 resp_data_len = be32_to_cpu(buf[0]);
377 if (resp_data_len != data_len) {
378 dev_err(occ->dev,
379 "SRAM write expected %d bytes got %zd\n",
380 data_len, resp_data_len);
381 rc = -EBADMSG;
382 }
383 }
384
385 free:
386 /* Convert positive SBEI status */
387 if (rc > 0) {
388 dev_err(occ->dev, "SRAM write returned failure status: %08x\n",
389 rc);
390 rc = -EBADMSG;
391 }
392
393 kfree(buf);
394 return rc;
395 }
396
occ_trigger_attn(struct occ * occ)397 static int occ_trigger_attn(struct occ *occ)
398 {
399 __be32 buf[OCC_SBE_STATUS_WORDS];
400 size_t cmd_len, resp_len, resp_data_len;
401 int idx = 0, rc;
402
403 BUILD_BUG_ON(OCC_SBE_STATUS_WORDS < 8);
404 resp_len = OCC_SBE_STATUS_WORDS;
405
406 switch (occ->version) {
407 default:
408 case occ_p9:
409 cmd_len = 7;
410 buf[2] = cpu_to_be32(3); /* Circular mode */
411 buf[3] = 0;
412 break;
413 case occ_p10:
414 idx = 1;
415 cmd_len = 8;
416 buf[2] = cpu_to_be32(0xd0); /* Circular mode, OCB Channel 1 */
417 buf[3] = 0;
418 buf[4] = 0;
419 break;
420 }
421
422 buf[0] = cpu_to_be32(cmd_len); /* Chip-op length in words */
423 buf[1] = cpu_to_be32(SBEFIFO_CMD_PUT_OCC_SRAM);
424 buf[4 + idx] = cpu_to_be32(8); /* Data length in bytes */
425 buf[5 + idx] = cpu_to_be32(0x20010000); /* Trigger OCC attention */
426 buf[6 + idx] = 0;
427
428 rc = sbefifo_submit(occ->sbefifo, buf, cmd_len, buf, &resp_len);
429 if (rc)
430 goto error;
431
432 rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_PUT_OCC_SRAM,
433 buf, resp_len, &resp_len);
434 if (rc)
435 goto error;
436
437 if (resp_len != 1) {
438 dev_err(occ->dev, "SRAM attn response length invalid: %zd\n",
439 resp_len);
440 rc = -EBADMSG;
441 } else {
442 resp_data_len = be32_to_cpu(buf[0]);
443 if (resp_data_len != 8) {
444 dev_err(occ->dev,
445 "SRAM attn expected 8 bytes got %zd\n",
446 resp_data_len);
447 rc = -EBADMSG;
448 }
449 }
450
451 error:
452 /* Convert positive SBEI status */
453 if (rc > 0) {
454 dev_err(occ->dev, "SRAM attn returned failure status: %08x\n",
455 rc);
456 rc = -EBADMSG;
457 }
458
459 return rc;
460 }
461
fsi_occ_submit(struct device * dev,const void * request,size_t req_len,void * response,size_t * resp_len)462 int fsi_occ_submit(struct device *dev, const void *request, size_t req_len,
463 void *response, size_t *resp_len)
464 {
465 const unsigned long timeout = msecs_to_jiffies(OCC_TIMEOUT_MS);
466 const unsigned long wait_time =
467 msecs_to_jiffies(OCC_CMD_IN_PRG_WAIT_MS);
468 struct occ *occ = dev_get_drvdata(dev);
469 struct occ_response *resp = response;
470 u8 seq_no;
471 u16 checksum = 0;
472 u16 resp_data_length;
473 const u8 *byte_request = (const u8 *)request;
474 unsigned long start;
475 int rc;
476 size_t i;
477
478 if (!occ)
479 return -ENODEV;
480
481 if (*resp_len < 7) {
482 dev_dbg(dev, "Bad resplen %zd\n", *resp_len);
483 return -EINVAL;
484 }
485
486 /* Checksum the request, ignoring first byte (sequence number). */
487 for (i = 1; i < req_len - 2; ++i)
488 checksum += byte_request[i];
489
490 mutex_lock(&occ->occ_lock);
491
492 /*
493 * Get a sequence number and update the counter. Avoid a sequence
494 * number of 0 which would pass the response check below even if the
495 * OCC response is uninitialized. Any sequence number the user is
496 * trying to send is overwritten since this function is the only common
497 * interface to the OCC and therefore the only place we can guarantee
498 * unique sequence numbers.
499 */
500 seq_no = occ->sequence_number++;
501 if (!occ->sequence_number)
502 occ->sequence_number = 1;
503 checksum += seq_no;
504
505 rc = occ_putsram(occ, request, req_len, seq_no, checksum);
506 if (rc)
507 goto done;
508
509 rc = occ_trigger_attn(occ);
510 if (rc)
511 goto done;
512
513 /* Read occ response header */
514 start = jiffies;
515 do {
516 rc = occ_getsram(occ, 0, resp, 8);
517 if (rc)
518 goto done;
519
520 if (resp->return_status == OCC_RESP_CMD_IN_PRG ||
521 resp->return_status == OCC_RESP_CRIT_INIT ||
522 resp->seq_no != seq_no) {
523 rc = -ETIMEDOUT;
524
525 if (time_after(jiffies, start + timeout)) {
526 dev_err(occ->dev, "resp timeout status=%02x "
527 "resp seq_no=%d our seq_no=%d\n",
528 resp->return_status, resp->seq_no,
529 seq_no);
530 goto done;
531 }
532
533 set_current_state(TASK_UNINTERRUPTIBLE);
534 schedule_timeout(wait_time);
535 }
536 } while (rc);
537
538 /* Extract size of response data */
539 resp_data_length = get_unaligned_be16(&resp->data_length);
540
541 /* Message size is data length + 5 bytes header + 2 bytes checksum */
542 if ((resp_data_length + 7) > *resp_len) {
543 rc = -EMSGSIZE;
544 goto done;
545 }
546
547 dev_dbg(dev, "resp_status=%02x resp_data_len=%d\n",
548 resp->return_status, resp_data_length);
549
550 /* Grab the rest */
551 if (resp_data_length > 1) {
552 /* already got 3 bytes resp, also need 2 bytes checksum */
553 rc = occ_getsram(occ, 8, &resp->data[3], resp_data_length - 1);
554 if (rc)
555 goto done;
556 }
557
558 *resp_len = resp_data_length + 7;
559 rc = occ_verify_checksum(occ, resp, resp_data_length);
560
561 done:
562 mutex_unlock(&occ->occ_lock);
563
564 return rc;
565 }
566 EXPORT_SYMBOL_GPL(fsi_occ_submit);
567
occ_unregister_child(struct device * dev,void * data)568 static int occ_unregister_child(struct device *dev, void *data)
569 {
570 struct platform_device *hwmon_dev = to_platform_device(dev);
571
572 platform_device_unregister(hwmon_dev);
573
574 return 0;
575 }
576
occ_probe(struct platform_device * pdev)577 static int occ_probe(struct platform_device *pdev)
578 {
579 int rc;
580 u32 reg;
581 struct occ *occ;
582 struct platform_device *hwmon_dev;
583 struct device *dev = &pdev->dev;
584 struct platform_device_info hwmon_dev_info = {
585 .parent = dev,
586 .name = "occ-hwmon",
587 };
588
589 occ = devm_kzalloc(dev, sizeof(*occ), GFP_KERNEL);
590 if (!occ)
591 return -ENOMEM;
592
593 occ->version = (uintptr_t)of_device_get_match_data(dev);
594 occ->dev = dev;
595 occ->sbefifo = dev->parent;
596 occ->sequence_number = 1;
597 mutex_init(&occ->occ_lock);
598
599 if (dev->of_node) {
600 rc = of_property_read_u32(dev->of_node, "reg", ®);
601 if (!rc) {
602 /* make sure we don't have a duplicate from dts */
603 occ->idx = ida_simple_get(&occ_ida, reg, reg + 1,
604 GFP_KERNEL);
605 if (occ->idx < 0)
606 occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX,
607 GFP_KERNEL);
608 } else {
609 occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX,
610 GFP_KERNEL);
611 }
612 } else {
613 occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX, GFP_KERNEL);
614 }
615
616 platform_set_drvdata(pdev, occ);
617
618 snprintf(occ->name, sizeof(occ->name), "occ%d", occ->idx);
619 occ->mdev.fops = &occ_fops;
620 occ->mdev.minor = MISC_DYNAMIC_MINOR;
621 occ->mdev.name = occ->name;
622 occ->mdev.parent = dev;
623
624 rc = misc_register(&occ->mdev);
625 if (rc) {
626 dev_err(dev, "failed to register miscdevice: %d\n", rc);
627 ida_simple_remove(&occ_ida, occ->idx);
628 return rc;
629 }
630
631 hwmon_dev_info.id = occ->idx;
632 hwmon_dev = platform_device_register_full(&hwmon_dev_info);
633 if (IS_ERR(hwmon_dev))
634 dev_warn(dev, "failed to create hwmon device\n");
635
636 return 0;
637 }
638
occ_remove(struct platform_device * pdev)639 static int occ_remove(struct platform_device *pdev)
640 {
641 struct occ *occ = platform_get_drvdata(pdev);
642
643 misc_deregister(&occ->mdev);
644
645 device_for_each_child(&pdev->dev, NULL, occ_unregister_child);
646
647 ida_simple_remove(&occ_ida, occ->idx);
648
649 return 0;
650 }
651
652 static const struct of_device_id occ_match[] = {
653 {
654 .compatible = "ibm,p9-occ",
655 .data = (void *)occ_p9
656 },
657 {
658 .compatible = "ibm,p10-occ",
659 .data = (void *)occ_p10
660 },
661 { },
662 };
663 MODULE_DEVICE_TABLE(of, occ_match);
664
665 static struct platform_driver occ_driver = {
666 .driver = {
667 .name = "occ",
668 .of_match_table = occ_match,
669 },
670 .probe = occ_probe,
671 .remove = occ_remove,
672 };
673
occ_init(void)674 static int occ_init(void)
675 {
676 return platform_driver_register(&occ_driver);
677 }
678
occ_exit(void)679 static void occ_exit(void)
680 {
681 platform_driver_unregister(&occ_driver);
682
683 ida_destroy(&occ_ida);
684 }
685
686 module_init(occ_init);
687 module_exit(occ_exit);
688
689 MODULE_AUTHOR("Eddie James <eajames@linux.ibm.com>");
690 MODULE_DESCRIPTION("BMC P9 OCC driver");
691 MODULE_LICENSE("GPL");
692