Lines Matching refs:NULL
83 CLKDEV_INIT("flexbus", NULL, &__clk_0_2),
84 CLKDEV_INIT("mcfcan.0", NULL, &__clk_0_8),
85 CLKDEV_INIT("mcfcan.1", NULL, &__clk_0_9),
86 CLKDEV_INIT("imx1-i2c.1", NULL, &__clk_0_14),
87 CLKDEV_INIT("mcfdspi.1", NULL, &__clk_0_15),
88 CLKDEV_INIT("edma", NULL, &__clk_0_17),
89 CLKDEV_INIT("intc.0", NULL, &__clk_0_18),
90 CLKDEV_INIT("intc.1", NULL, &__clk_0_19),
91 CLKDEV_INIT("intc.2", NULL, &__clk_0_20),
92 CLKDEV_INIT("imx1-i2c.0", NULL, &__clk_0_22),
93 CLKDEV_INIT("fsl-dspi.0", NULL, &__clk_0_23),
94 CLKDEV_INIT("mcfuart.0", NULL, &__clk_0_24),
95 CLKDEV_INIT("mcfuart.1", NULL, &__clk_0_25),
96 CLKDEV_INIT("mcfuart.2", NULL, &__clk_0_26),
97 CLKDEV_INIT("mcfuart.3", NULL, &__clk_0_27),
98 CLKDEV_INIT("mcftmr.0", NULL, &__clk_0_28),
99 CLKDEV_INIT("mcftmr.1", NULL, &__clk_0_29),
100 CLKDEV_INIT("mcftmr.2", NULL, &__clk_0_30),
101 CLKDEV_INIT("mcftmr.3", NULL, &__clk_0_31),
102 CLKDEV_INIT("mcfpit.0", NULL, &__clk_0_32),
103 CLKDEV_INIT("mcfpit.1", NULL, &__clk_0_33),
104 CLKDEV_INIT("mcfpit.2", NULL, &__clk_0_34),
105 CLKDEV_INIT("mcfpit.3", NULL, &__clk_0_35),
106 CLKDEV_INIT("mcfeport.0", NULL, &__clk_0_37),
107 CLKDEV_INIT("mcfadc.0", NULL, &__clk_0_38),
108 CLKDEV_INIT("mcfdac.0", NULL, &__clk_0_39),
109 CLKDEV_INIT("mcfrtc.0", NULL, &__clk_0_42),
110 CLKDEV_INIT("mcfsim.0", NULL, &__clk_0_43),
111 CLKDEV_INIT("mcfusb-otg.0", NULL, &__clk_0_44),
112 CLKDEV_INIT("mcfusb-host.0", NULL, &__clk_0_45),
113 CLKDEV_INIT("mcfddr-sram.0", NULL, &__clk_0_46),
114 CLKDEV_INIT("mcfssi.0", NULL, &__clk_0_47),
115 CLKDEV_INIT(NULL, "pll.0", &__clk_0_48),
116 CLKDEV_INIT("mcfrng.0", NULL, &__clk_0_49),
117 CLKDEV_INIT("mcfssi.1", NULL, &__clk_0_50),
118 CLKDEV_INIT("sdhci-esdhc-mcf.0", NULL, &__clk_0_51),
119 CLKDEV_INIT("enet-fec.0", NULL, &__clk_0_53),
120 CLKDEV_INIT("enet-fec.1", NULL, &__clk_0_54),
121 CLKDEV_INIT("switch.0", NULL, &__clk_0_55),
122 CLKDEV_INIT("switch.1", NULL, &__clk_0_56),
123 CLKDEV_INIT("nand.0", NULL, &__clk_0_63),
124 CLKDEV_INIT("mcfow.0", NULL, &__clk_1_2),
125 CLKDEV_INIT("imx1-i2c.2", NULL, &__clk_1_4),
126 CLKDEV_INIT("imx1-i2c.3", NULL, &__clk_1_5),
127 CLKDEV_INIT("imx1-i2c.4", NULL, &__clk_1_6),
128 CLKDEV_INIT("imx1-i2c.5", NULL, &__clk_1_7),
129 CLKDEV_INIT("mcfuart.4", NULL, &__clk_1_24),
130 CLKDEV_INIT("mcfuart.5", NULL, &__clk_1_25),
131 CLKDEV_INIT("mcfuart.6", NULL, &__clk_1_26),
132 CLKDEV_INIT("mcfuart.7", NULL, &__clk_1_27),
133 CLKDEV_INIT("mcfuart.8", NULL, &__clk_1_28),
134 CLKDEV_INIT("mcfuart.9", NULL, &__clk_1_29),
135 CLKDEV_INIT("mcfpwm.0", NULL, &__clk_1_34),
136 CLKDEV_INIT(NULL, "sys.0", &__clk_1_36),
137 CLKDEV_INIT("gpio.0", NULL, &__clk_1_37),
138 CLKDEV_INIT("ipg.0", NULL, &__clk_2_0),
139 CLKDEV_INIT("ahb.0", NULL, &__clk_2_1),
140 CLKDEV_INIT("per.0", NULL, &__clk_2_2),