Lines Matching refs:hwc
827 static inline void sparc_pmu_enable_event(struct cpu_hw_events *cpuc, struct hw_perf_event *hwc, in… in sparc_pmu_enable_event() argument
845 static inline void sparc_pmu_disable_event(struct cpu_hw_events *cpuc, struct hw_perf_event *hwc, i… in sparc_pmu_disable_event() argument
864 struct hw_perf_event *hwc, int idx) in sparc_perf_event_update() argument
871 prev_raw_count = local64_read(&hwc->prev_count); in sparc_perf_event_update()
874 if (local64_cmpxchg(&hwc->prev_count, prev_raw_count, in sparc_perf_event_update()
882 local64_sub(delta, &hwc->period_left); in sparc_perf_event_update()
888 struct hw_perf_event *hwc, int idx) in sparc_perf_event_set_period() argument
890 s64 left = local64_read(&hwc->period_left); in sparc_perf_event_set_period()
891 s64 period = hwc->sample_period; in sparc_perf_event_set_period()
895 if (unlikely(period != hwc->last_period)) in sparc_perf_event_set_period()
896 left = period - (hwc->last_period - left); in sparc_perf_event_set_period()
900 local64_set(&hwc->period_left, left); in sparc_perf_event_set_period()
901 hwc->last_period = period; in sparc_perf_event_set_period()
907 local64_set(&hwc->period_left, left); in sparc_perf_event_set_period()
908 hwc->last_period = period; in sparc_perf_event_set_period()
914 local64_set(&hwc->prev_count, (u64)-left); in sparc_perf_event_set_period()
957 struct hw_perf_event *hwc = &cp->hw; in calculate_single_pcr() local
958 int idx = hwc->idx; in calculate_single_pcr()
964 sparc_perf_event_set_period(cp, hwc, idx); in calculate_single_pcr()
969 if (hwc->state & PERF_HES_ARCH) { in calculate_single_pcr()
973 hwc->state = 0; in calculate_single_pcr()
992 struct hw_perf_event *hwc = &cp->hw; in calculate_multiple_pcrs() local
993 int idx = hwc->idx; in calculate_multiple_pcrs()
1153 struct hw_perf_event *hwc = &event->hw; in sparc_pmu_read() local
1155 sparc_perf_event_update(event, hwc, idx); in sparc_pmu_read()
1419 struct hw_perf_event *hwc = &event->hw; in sparc_pmu_event_init() local
1455 hwc->event_base = perf_event_encode(pmap); in sparc_pmu_event_init()
1461 hwc->event_base = attr->config; in sparc_pmu_event_init()
1465 hwc->config_base = sparc_pmu->irq_bit; in sparc_pmu_event_init()
1467 hwc->config_base |= sparc_pmu->user_bit; in sparc_pmu_event_init()
1469 hwc->config_base |= sparc_pmu->priv_bit; in sparc_pmu_event_init()
1471 hwc->config_base |= sparc_pmu->hv_bit; in sparc_pmu_event_init()
1481 events[n] = hwc->event_base; in sparc_pmu_event_init()
1490 hwc->idx = PIC_NO_INDEX; in sparc_pmu_event_init()
1498 if (!hwc->sample_period) { in sparc_pmu_event_init()
1499 hwc->sample_period = MAX_PERIOD; in sparc_pmu_event_init()
1500 hwc->last_period = hwc->sample_period; in sparc_pmu_event_init()
1501 local64_set(&hwc->period_left, hwc->sample_period); in sparc_pmu_event_init()
1655 struct hw_perf_event *hwc; in perf_event_nmi_handler() local
1662 hwc = &event->hw; in perf_event_nmi_handler()
1663 val = sparc_perf_event_update(event, hwc, idx); in perf_event_nmi_handler()
1667 perf_sample_data_init(&data, 0, hwc->last_period); in perf_event_nmi_handler()
1668 if (!sparc_perf_event_set_period(event, hwc, idx)) in perf_event_nmi_handler()