856 static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc)  in p4_pmu_clear_cccr_ovf()  argument
861 	rdmsrl(hwc->config_base, v);  in p4_pmu_clear_cccr_ovf()
863 		wrmsrl(hwc->config_base, v & ~P4_CCCR_OVF);  in p4_pmu_clear_cccr_ovf()
874 	rdmsrl(hwc->event_base, v);  in p4_pmu_clear_cccr_ovf()
906 	struct hw_perf_event *hwc = &event->hw;  in p4_pmu_disable_event()  local
913 	(void)wrmsrl_safe(hwc->config_base,  in p4_pmu_disable_event()
914 		p4_config_unpack_cccr(hwc->config) & ~P4_CCCR_ENABLE & ~P4_CCCR_OVF & ~P4_CCCR_RESERVED);  in p4_pmu_disable_event()
952 	struct hw_perf_event *hwc = &event->hw;  in __p4_pmu_enable_event()  local
953 	int thread = p4_ht_config_thread(hwc->config);  in __p4_pmu_enable_event()
954 	u64 escr_conf = p4_config_unpack_escr(p4_clear_ht_bit(hwc->config));  in __p4_pmu_enable_event()
955 	unsigned int idx = p4_config_unpack_event(hwc->config);  in __p4_pmu_enable_event()
966 	WARN_ON_ONCE(p4_is_event_cascaded(hwc->config));  in __p4_pmu_enable_event()
967 	WARN_ON_ONCE(hwc->idx == 1);  in __p4_pmu_enable_event()
973 	cccr = p4_config_unpack_cccr(hwc->config);  in __p4_pmu_enable_event()
979 	p4_pmu_enable_pebs(hwc->config);  in __p4_pmu_enable_event()
982 	(void)wrmsrl_safe(hwc->config_base,  in __p4_pmu_enable_event()
1014 	struct hw_perf_event *hwc;  in p4_pmu_handle_irq()  local
1031 		hwc = &event->hw;  in p4_pmu_handle_irq()
1033 		WARN_ON_ONCE(hwc->idx != idx);  in p4_pmu_handle_irq()
1036 		overflow = p4_pmu_clear_cccr_ovf(hwc);  in p4_pmu_handle_irq()
1045 		perf_sample_data_init(&data, 0, hwc->last_period);  in p4_pmu_handle_irq()
1077 static void p4_pmu_swap_config_ts(struct hw_perf_event *hwc, int cpu)  in p4_pmu_swap_config_ts()  argument
1084 	if (!p4_should_swap_ts(hwc->config, cpu))  in p4_pmu_swap_config_ts()
1092 	escr = p4_config_unpack_escr(hwc->config);  in p4_pmu_swap_config_ts()
1093 	cccr = p4_config_unpack_cccr(hwc->config);  in p4_pmu_swap_config_ts()
1106 		hwc->config  = p4_config_pack_escr(escr);  in p4_pmu_swap_config_ts()
1107 		hwc->config |= p4_config_pack_cccr(cccr);  in p4_pmu_swap_config_ts()
1108 		hwc->config |= P4_CONFIG_HT;  in p4_pmu_swap_config_ts()
1120 		hwc->config  = p4_config_pack_escr(escr);  in p4_pmu_swap_config_ts()
1121 		hwc->config |= p4_config_pack_cccr(cccr);  in p4_pmu_swap_config_ts()
1122 		hwc->config &= ~P4_CONFIG_HT;  in p4_pmu_swap_config_ts()
1222 	struct hw_perf_event *hwc;  in p4_pmu_schedule_events()  local
1234 		hwc = &cpuc->event_list[i]->hw;  in p4_pmu_schedule_events()
1247 		bind = p4_config_get_bind(hwc->config);  in p4_pmu_schedule_events()
1252 		if (hwc->idx != -1 && !p4_should_swap_ts(hwc->config, cpu)) {  in p4_pmu_schedule_events()
1253 			cntr_idx = hwc->idx;  in p4_pmu_schedule_events()
1255 				assign[i] = hwc->idx;  in p4_pmu_schedule_events()
1264 			config_alias = p4_get_alias_event(hwc->config);  in p4_pmu_schedule_events()
1267 			hwc->config = config_alias;  in p4_pmu_schedule_events()
1287 		if (p4_should_swap_ts(hwc->config, cpu))  in p4_pmu_schedule_events()
1288 			hwc->idx = -1;  in p4_pmu_schedule_events()
1289 		p4_pmu_swap_config_ts(hwc, cpu);  in p4_pmu_schedule_events()