90 	union cvmx_mio_boot_reg_cfgx reg_cfg;  in octeon_cf_set_boot_reg_cfg()  local
108 	reg_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(cs));  in octeon_cf_set_boot_reg_cfg()
109 	reg_cfg.s.dmack = 0;	/* Don't assert DMACK on access */  in octeon_cf_set_boot_reg_cfg()
110 	reg_cfg.s.tim_mult = tim_mult;	/* Timing mutiplier */  in octeon_cf_set_boot_reg_cfg()
111 	reg_cfg.s.rd_dly = 0;	/* Sample on falling edge of BOOT_OE */  in octeon_cf_set_boot_reg_cfg()
112 	reg_cfg.s.sam = 0;	/* Don't combine write and output enable */  in octeon_cf_set_boot_reg_cfg()
113 	reg_cfg.s.we_ext = 0;	/* No write enable extension */  in octeon_cf_set_boot_reg_cfg()
114 	reg_cfg.s.oe_ext = 0;	/* No read enable extension */  in octeon_cf_set_boot_reg_cfg()
115 	reg_cfg.s.en = 1;	/* Enable this region */  in octeon_cf_set_boot_reg_cfg()
116 	reg_cfg.s.orbit = 0;	/* Don't combine with previous region */  in octeon_cf_set_boot_reg_cfg()
117 	reg_cfg.s.ale = 0;	/* Don't do address multiplexing */  in octeon_cf_set_boot_reg_cfg()
118 	cvmx_write_csr(CVMX_MIO_BOOT_REG_CFGX(cs), reg_cfg.u64);  in octeon_cf_set_boot_reg_cfg()