203 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in wait_for_pll()
208 		ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in wait_for_pll()
247 static void clk_alpha_pll_write_config(struct regmap *regmap, unsigned int reg,  in clk_alpha_pll_write_config()  argument
251 		regmap_write(regmap, reg, val);  in clk_alpha_pll_write_config()
254 void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_alpha_pll_configure()  argument
259 	regmap_write(regmap, PLL_L_VAL(pll), config->l);  in clk_alpha_pll_configure()
260 	regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_alpha_pll_configure()
261 	regmap_write(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_alpha_pll_configure()
264 		regmap_write(regmap, PLL_CONFIG_CTL_U(pll),  in clk_alpha_pll_configure()
268 		regmap_write(regmap, PLL_ALPHA_VAL_U(pll), config->alpha_hi);  in clk_alpha_pll_configure()
288 	regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_alpha_pll_configure()
291 		qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);  in clk_alpha_pll_configure()
301 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_hwfsm_enable()
310 	ret = regmap_write(pll->clkr.regmap, PLL_MODE(pll), val);  in clk_alpha_pll_hwfsm_enable()
326 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_hwfsm_disable()
331 		ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_hwfsm_disable()
342 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_hwfsm_disable()
356 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in pll_is_enabled()
380 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_enable()
396 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
408 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
417 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
431 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_disable()
442 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);  in clk_alpha_pll_disable()
449 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);  in clk_alpha_pll_disable()
507 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_alpha_pll_recalc_rate()
509 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_recalc_rate()
511 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &low);  in clk_alpha_pll_recalc_rate()
513 			regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),  in clk_alpha_pll_recalc_rate()
533 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &mode);  in __clk_alpha_pll_update_latch()
536 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE,  in __clk_alpha_pll_update_latch()
554 		regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE, 0);  in __clk_alpha_pll_update_latch()
598 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in __clk_alpha_pll_set_rate()
604 		regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll), a >> 32);  in __clk_alpha_pll_set_rate()
606 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in __clk_alpha_pll_set_rate()
609 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_alpha_pll_set_rate()
614 	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_alpha_pll_set_rate()
706 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in alpha_pll_huayra_recalc_rate()
707 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in alpha_pll_huayra_recalc_rate()
710 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &alpha);  in alpha_pll_huayra_recalc_rate()
761 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in alpha_pll_huayra_set_rate()
764 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &cur_alpha);  in alpha_pll_huayra_set_rate()
777 		regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_huayra_set_rate()
783 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_huayra_set_rate()
784 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in alpha_pll_huayra_set_rate()
787 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in alpha_pll_huayra_set_rate()
790 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in alpha_pll_huayra_set_rate()
805 				struct regmap *regmap)  in trion_pll_is_enabled()  argument
810 	ret = regmap_read(regmap, PLL_MODE(pll), &mode_val);  in trion_pll_is_enabled()
811 	ret |= regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);  in trion_pll_is_enabled()
822 	return trion_pll_is_enabled(pll, pll->clkr.regmap);  in clk_trion_pll_is_enabled()
828 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_enable()  local
832 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in clk_trion_pll_enable()
845 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in clk_trion_pll_enable()
852 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_enable()
858 	return regmap_update_bits(regmap, PLL_MODE(pll),  in clk_trion_pll_enable()
865 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_disable()  local
869 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in clk_trion_pll_disable()
880 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_trion_pll_disable()
885 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_disable()
891 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_trion_pll_disable()
892 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_trion_pll_disable()
901 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_trion_pll_recalc_rate()
902 	regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &frac);  in clk_trion_pll_recalc_rate()
960 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_postdiv_recalc_rate()
1007 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_postdiv_round_ro_rate()
1028 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_postdiv_set_rate()
1046 void clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_fabia_pll_configure()  argument
1051 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_fabia_pll_configure()
1052 	clk_alpha_pll_write_config(regmap, PLL_FRAC(pll), config->alpha);  in clk_fabia_pll_configure()
1053 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_fabia_pll_configure()
1055 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_fabia_pll_configure()
1057 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_fabia_pll_configure()
1059 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),  in clk_fabia_pll_configure()
1061 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_fabia_pll_configure()
1063 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_fabia_pll_configure()
1069 		regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_fabia_pll_configure()
1072 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,  in clk_fabia_pll_configure()
1075 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_fabia_pll_configure()
1084 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_fabia_enable()  local
1086 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_enable()
1098 	ret = regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);  in alpha_pll_fabia_enable()
1106 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_fabia_enable()
1110 	ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_fabia_enable()
1114 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N,  in alpha_pll_fabia_enable()
1119 	ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_fabia_enable()
1127 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in alpha_pll_fabia_enable()
1132 	return regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL,  in alpha_pll_fabia_enable()
1141 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_fabia_disable()  local
1143 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_disable()
1153 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_fabia_disable()
1158 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in alpha_pll_fabia_disable()
1163 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_fabia_disable()
1172 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in alpha_pll_fabia_recalc_rate()
1173 	regmap_read(pll->clkr.regmap, PLL_FRAC(pll), &frac);  in alpha_pll_fabia_recalc_rate()
1211 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_fabia_set_rate()
1212 	regmap_write(pll->clkr.regmap, PLL_FRAC(pll), a);  in alpha_pll_fabia_set_rate()
1229 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_prepare()
1258 	regmap_write(pll->clkr.regmap, PLL_CAL_L_VAL(pll), cal_l);  in alpha_pll_fabia_prepare()
1299 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in clk_alpha_pll_postdiv_fabia_recalc_rate()
1320 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_postdiv_recalc_rate()  local
1323 	regmap_read(regmap, PLL_USER_CTL(pll), &val);  in clk_trion_pll_postdiv_recalc_rate()
1353 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_postdiv_set_rate()  local
1364 	return regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_postdiv_set_rate()
1395 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_postdiv_fabia_set_rate()
1410 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_postdiv_fabia_set_rate()
1429 void clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_trion_pll_configure()  argument
1436 	if (trion_pll_is_enabled(pll, regmap)) {  in clk_trion_pll_configure()
1441 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_trion_pll_configure()
1442 	regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL);  in clk_trion_pll_configure()
1443 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_trion_pll_configure()
1444 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_trion_pll_configure()
1446 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_trion_pll_configure()
1448 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll),  in clk_trion_pll_configure()
1450 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_configure()
1452 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),  in clk_trion_pll_configure()
1454 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll),  in clk_trion_pll_configure()
1456 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_trion_pll_configure()
1458 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_trion_pll_configure()
1460 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll),  in clk_trion_pll_configure()
1463 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,  in clk_trion_pll_configure()
1467 	regmap_update_bits(regmap, PLL_MODE(pll),  PLL_OUTCTRL, 0);  in clk_trion_pll_configure()
1470 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_trion_pll_configure()
1473 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_trion_pll_configure()
1488 	regmap_read(pll->clkr.regmap, PLL_STATUS(pll), &val);  in __alpha_pll_trion_prepare()
1525 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in __alpha_pll_trion_set_rate()
1526 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in __alpha_pll_trion_set_rate()
1529 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), latch_bit, latch_bit);  in __alpha_pll_trion_set_rate()
1535 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in __alpha_pll_trion_set_rate()
1542 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), latch_bit, 0);  in __alpha_pll_trion_set_rate()
1592 void clk_agera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_agera_pll_configure()  argument
1595 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_agera_pll_configure()
1596 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_agera_pll_configure()
1597 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_agera_pll_configure()
1599 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_agera_pll_configure()
1601 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_agera_pll_configure()
1603 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_agera_pll_configure()
1605 	clk_alpha_pll_write_config(regmap,  PLL_TEST_CTL_U(pll),  in clk_agera_pll_configure()
1625 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_alpha_pll_agera_set_rate()
1626 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_alpha_pll_agera_set_rate()
1650 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_5lpe_enable()
1663 	ret = trion_pll_is_enabled(pll, pll->clkr.regmap);  in alpha_pll_lucid_5lpe_enable()
1667 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in alpha_pll_lucid_5lpe_enable()
1671 	regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_lucid_5lpe_enable()
1678 	ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);  in alpha_pll_lucid_5lpe_enable()
1683 	return regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in alpha_pll_lucid_5lpe_enable()
1692 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_5lpe_disable()
1703 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_lucid_5lpe_disable()
1708 	ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in alpha_pll_lucid_5lpe_disable()
1713 	regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_lucid_5lpe_disable()
1728 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in alpha_pll_lucid_5lpe_prepare()
1764 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in clk_lucid_5lpe_pll_postdiv_set_rate()
1780 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_lucid_5lpe_pll_postdiv_set_rate()
1811 void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_zonda_pll_configure()  argument
1814 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_zonda_pll_configure()
1815 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_zonda_pll_configure()
1816 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_zonda_pll_configure()
1817 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_zonda_pll_configure()
1818 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_zonda_pll_configure()
1819 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_zonda_pll_configure()
1820 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_zonda_pll_configure()
1821 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll), config->user_ctl_hi1_val);  in clk_zonda_pll_configure()
1822 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_zonda_pll_configure()
1823 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_zonda_pll_configure()
1824 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_zonda_pll_configure()
1826 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, 0);  in clk_zonda_pll_configure()
1829 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_zonda_pll_configure()
1832 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_zonda_pll_configure()
1835 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_zonda_pll_configure()
1842 	struct regmap *regmap = pll->clkr.regmap;  in clk_zonda_pll_enable()  local
1846 	regmap_read(regmap, PLL_MODE(pll), &val);  in clk_zonda_pll_enable()
1857 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, PLL_BYPASSNL);  in clk_zonda_pll_enable()
1865 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_zonda_pll_enable()
1868 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in clk_zonda_pll_enable()
1870 	regmap_read(regmap, PLL_TEST_CTL(pll), &val);  in clk_zonda_pll_enable()
1881 	regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, ZONDA_PLL_OUT_MASK);  in clk_zonda_pll_enable()
1884 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in clk_zonda_pll_enable()
1892 	struct regmap *regmap = pll->clkr.regmap;  in clk_zonda_pll_disable()  local
1895 	regmap_read(regmap, PLL_MODE(pll), &val);  in clk_zonda_pll_disable()
1904 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_zonda_pll_disable()
1907 	regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, 0);  in clk_zonda_pll_disable()
1910 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N | PLL_BYPASSNL, 0);  in clk_zonda_pll_disable()
1913 	regmap_write(regmap, PLL_OPMODE(pll), 0x0);  in clk_zonda_pll_disable()
1932 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_zonda_pll_set_rate()
1933 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_zonda_pll_set_rate()
1939 	regmap_read(pll->clkr.regmap, PLL_TEST_CTL(pll), &test_ctl_val);  in clk_zonda_pll_set_rate()