Lines Matching refs:common
92 &fe0_clk.common,
93 &fe1_clk.common,
94 &fe2_clk.common,
95 &iep_deu0_clk.common,
96 &iep_deu1_clk.common,
97 &be0_clk.common,
98 &be1_clk.common,
99 &be2_clk.common,
100 &iep_drc0_clk.common,
101 &iep_drc1_clk.common,
102 &merge_clk.common,
104 &dram_fe0_clk.common,
105 &dram_fe1_clk.common,
106 &dram_fe2_clk.common,
107 &dram_deu0_clk.common,
108 &dram_deu1_clk.common,
109 &dram_be0_clk.common,
110 &dram_be1_clk.common,
111 &dram_be2_clk.common,
112 &dram_drc0_clk.common,
113 &dram_drc1_clk.common,
115 &bus_fe0_clk.common,
116 &bus_fe1_clk.common,
117 &bus_fe2_clk.common,
118 &bus_deu0_clk.common,
119 &bus_deu1_clk.common,
120 &bus_be0_clk.common,
121 &bus_be1_clk.common,
122 &bus_be2_clk.common,
123 &bus_drc0_clk.common,
124 &bus_drc1_clk.common,
126 &fe0_div_clk.common,
127 &fe1_div_clk.common,
128 &fe2_div_clk.common,
129 &be0_div_clk.common,
130 &be1_div_clk.common,
131 &be2_div_clk.common,
136 [CLK_FE0] = &fe0_clk.common.hw,
137 [CLK_FE1] = &fe1_clk.common.hw,
138 [CLK_FE2] = &fe2_clk.common.hw,
139 [CLK_IEP_DEU0] = &iep_deu0_clk.common.hw,
140 [CLK_IEP_DEU1] = &iep_deu1_clk.common.hw,
141 [CLK_BE0] = &be0_clk.common.hw,
142 [CLK_BE1] = &be1_clk.common.hw,
143 [CLK_BE2] = &be2_clk.common.hw,
144 [CLK_IEP_DRC0] = &iep_drc0_clk.common.hw,
145 [CLK_IEP_DRC1] = &iep_drc1_clk.common.hw,
146 [CLK_MERGE] = &merge_clk.common.hw,
148 [CLK_DRAM_FE0] = &dram_fe0_clk.common.hw,
149 [CLK_DRAM_FE1] = &dram_fe1_clk.common.hw,
150 [CLK_DRAM_FE2] = &dram_fe2_clk.common.hw,
151 [CLK_DRAM_DEU0] = &dram_deu0_clk.common.hw,
152 [CLK_DRAM_DEU1] = &dram_deu1_clk.common.hw,
153 [CLK_DRAM_BE0] = &dram_be0_clk.common.hw,
154 [CLK_DRAM_BE1] = &dram_be1_clk.common.hw,
155 [CLK_DRAM_BE2] = &dram_be2_clk.common.hw,
156 [CLK_DRAM_DRC0] = &dram_drc0_clk.common.hw,
157 [CLK_DRAM_DRC1] = &dram_drc1_clk.common.hw,
159 [CLK_BUS_FE0] = &bus_fe0_clk.common.hw,
160 [CLK_BUS_FE1] = &bus_fe1_clk.common.hw,
161 [CLK_BUS_FE2] = &bus_fe2_clk.common.hw,
162 [CLK_BUS_DEU0] = &bus_deu0_clk.common.hw,
163 [CLK_BUS_DEU1] = &bus_deu1_clk.common.hw,
164 [CLK_BUS_BE0] = &bus_be0_clk.common.hw,
165 [CLK_BUS_BE1] = &bus_be1_clk.common.hw,
166 [CLK_BUS_BE2] = &bus_be2_clk.common.hw,
167 [CLK_BUS_DRC0] = &bus_drc0_clk.common.hw,
168 [CLK_BUS_DRC1] = &bus_drc1_clk.common.hw,
170 [CLK_FE0_DIV] = &fe0_div_clk.common.hw,
171 [CLK_FE1_DIV] = &fe1_div_clk.common.hw,
172 [CLK_FE2_DIV] = &fe2_div_clk.common.hw,
173 [CLK_BE0_DIV] = &be0_div_clk.common.hw,
174 [CLK_BE1_DIV] = &be1_div_clk.common.hw,
175 [CLK_BE2_DIV] = &be2_div_clk.common.hw,