Lines Matching defs:pptable_funcs
569 struct pptable_funcs { struct
575 int (*run_btc)(struct smu_context *smu);
582 int (*get_allowed_feature_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
589 enum amd_pm_state_type (*get_current_power_state)(struct smu_context *smu);
595 int (*set_default_dpm_table)(struct smu_context *smu);
597 int (*set_power_state)(struct smu_context *smu);
603 int (*populate_umd_state_clk)(struct smu_context *smu);
611 int (*print_clk_levels)(struct smu_context *smu, enum smu_clk_type clk_type, char *buf);
619 int (*force_clk_levels)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t mask);
627 int (*od_edit_dpm_table)(struct smu_context *smu,
635 int (*restore_user_od_settings)(struct smu_context *smu);
641 int (*get_clock_by_type_with_latency)(struct smu_context *smu,
650 int (*get_clock_by_type_with_voltage)(struct smu_context *smu,
660 int (*get_power_profile_mode)(struct smu_context *smu, char *buf);
668 int (*set_power_profile_mode)(struct smu_context *smu, long *input, uint32_t size);
674 int (*dpm_set_vcn_enable)(struct smu_context *smu, bool enable);
680 int (*dpm_set_jpeg_enable)(struct smu_context *smu, bool enable);
688 int (*read_sensor)(struct smu_context *smu, enum amd_pp_sensors sensor,
698 int (*pre_display_config_changed)(struct smu_context *smu);
707 int (*display_config_changed)(struct smu_context *smu);
709 int (*apply_clocks_adjust_rules)(struct smu_context *smu);
718 int (*notify_smc_display_config)(struct smu_context *smu);
725 bool (*is_dpm_running)(struct smu_context *smu);
730 int (*get_fan_speed_pwm)(struct smu_context *smu, uint32_t *speed);
735 int (*get_fan_speed_rpm)(struct smu_context *smu, uint32_t *speed);
741 int (*set_watermarks_table)(struct smu_context *smu,
747 int (*get_thermal_temperature_range)(struct smu_context *smu, struct smu_temperature_range *range);
754 int (*get_uclk_dpm_states)(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states);
759 int (*set_default_od_settings)(struct smu_context *smu);
764 int (*set_performance_level)(struct smu_context *smu, enum amd_dpm_forced_level level);
774 … (*display_disable_memory_clock_switch)(struct smu_context *smu, bool disable_memory_clock_switch);
779 void (*dump_pptable)(struct smu_context *smu);
784 int (*get_power_limit)(struct smu_context *smu,
792 int (*get_ppt_limit)(struct smu_context *smu, uint32_t *ppt_limit,
798 int (*set_df_cstate)(struct smu_context *smu, enum pp_df_cstate state);
804 int (*allow_xgmi_power_down)(struct smu_context *smu, bool en);
812 …(*update_pcie_parameters)(struct smu_context *smu, uint32_t pcie_gen_cap, uint32_t pcie_width_cap);
821 int (*i2c_init)(struct smu_context *smu, struct i2c_adapter *control);
826 void (*i2c_fini)(struct smu_context *smu, struct i2c_adapter *control);
831 void (*get_unique_id)(struct smu_context *smu);
838 int (*get_dpm_clock_table)(struct smu_context *smu, struct dpm_clocks *clock_table);
843 int (*init_microcode)(struct smu_context *smu);
848 int (*load_microcode)(struct smu_context *smu);
853 void (*fini_microcode)(struct smu_context *smu);
858 int (*init_smc_tables)(struct smu_context *smu);
863 int (*fini_smc_tables)(struct smu_context *smu);
868 int (*init_power)(struct smu_context *smu);
873 int (*fini_power)(struct smu_context *smu);
880 int (*check_fw_status)(struct smu_context *smu);
886 int (*set_mp1_state)(struct smu_context *smu,
893 int (*setup_pptable)(struct smu_context *smu);
898 int (*get_vbios_bootup_values)(struct smu_context *smu);
906 int (*check_fw_version)(struct smu_context *smu);
911 int (*powergate_sdma)(struct smu_context *smu, bool gate);
917 int (*set_gfx_cgpg)(struct smu_context *smu, bool enable);
922 int (*write_pptable)(struct smu_context *smu);
928 int (*set_driver_table_location)(struct smu_context *smu);
934 int (*set_tool_table_location)(struct smu_context *smu);
940 int (*notify_memory_pool_location)(struct smu_context *smu);
945 int (*system_features_control)(struct smu_context *smu, bool en);
953 int (*send_smc_msg_with_param)(struct smu_context *smu,
961 int (*send_smc_msg)(struct smu_context *smu,
969 int (*init_display_count)(struct smu_context *smu, uint32_t count);
975 int (*set_allowed_mask)(struct smu_context *smu);
983 int (*get_enabled_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
990 int (*feature_is_enabled)(struct smu_context *smu, enum smu_feature_mask mask);
996 int (*disable_all_features_with_exception)(struct smu_context *smu,
1006 int (*notify_display_change)(struct smu_context *smu);
1011 int (*set_power_limit)(struct smu_context *smu, uint32_t n);
1017 int (*init_max_sustainable_clocks)(struct smu_context *smu);
1022 int (*enable_thermal_alert)(struct smu_context *smu);
1027 int (*disable_thermal_alert)(struct smu_context *smu);
1033 int (*set_min_dcef_deep_sleep)(struct smu_context *smu, uint32_t clk);
1039 int (*display_clock_voltage_request)(struct smu_context *smu, struct
1046 uint32_t (*get_fan_control_mode)(struct smu_context *smu);
1051 int (*set_fan_control_mode)(struct smu_context *smu, uint32_t mode);
1056 int (*set_fan_speed_pwm)(struct smu_context *smu, uint32_t speed);
1061 int (*set_fan_speed_rpm)(struct smu_context *smu, uint32_t speed);
1067 int (*set_xgmi_pstate)(struct smu_context *smu, uint32_t pstate);
1072 int (*gfx_off_control)(struct smu_context *smu, bool enable);
1084 uint32_t (*get_gfx_off_status)(struct smu_context *smu);
1089 int (*register_irq_handler)(struct smu_context *smu);
1094 int (*set_azalia_d3_pme)(struct smu_context *smu);
1103 …t_max_sustainable_clocks_by_dc)(struct smu_context *smu, struct pp_smu_nv_clock_table *max_clocks);
1108 bool (*baco_is_support)(struct smu_context *smu);
1115 enum smu_baco_state (*baco_get_state)(struct smu_context *smu);
1120 int (*baco_set_state)(struct smu_context *smu, enum smu_baco_state state);
1125 int (*baco_enter)(struct smu_context *smu);
1130 int (*baco_exit)(struct smu_context *smu);
1135 bool (*mode1_reset_is_support)(struct smu_context *smu);
1139 bool (*mode2_reset_is_support)(struct smu_context *smu);
1146 int (*mode1_reset)(struct smu_context *smu);
1154 int (*mode2_reset)(struct smu_context *smu);
1160 …_ultimate_freq)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max);
1166 …eq_limited_range)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max);
1171 int (*set_power_source)(struct smu_context *smu, enum smu_power_src_type power_src);
1177 void (*log_thermal_throttling_event)(struct smu_context *smu);
1183 size_t (*get_pp_feature_mask)(struct smu_context *smu, char *buf);
1189 int (*set_pp_feature_mask)(struct smu_context *smu, uint64_t new_mask);
1196 ssize_t (*get_gpu_metrics)(struct smu_context *smu, void **table);
1201 int (*enable_mgpu_fan_boost)(struct smu_context *smu);
1206 int (*gfx_ulv_control)(struct smu_context *smu, bool enablement);
1211 int (*deep_sleep_control)(struct smu_context *smu, bool enablement);
1218 int (*get_fan_parameters)(struct smu_context *smu);
1223 int (*post_init)(struct smu_context *smu);
1228 void (*interrupt_work)(struct smu_context *smu);
1233 int (*gpo_control)(struct smu_context *smu, bool enablement);
1238 int (*gfx_state_change_set)(struct smu_context *smu, uint32_t state);
1244 int (*set_fine_grain_gfx_freq_parameters)(struct smu_context *smu);
1249 int (*set_light_sbr)(struct smu_context *smu, bool enable);
1254 int (*wait_for_event)(struct smu_context *smu,
1261 int (*send_hbm_bad_pages_num)(struct smu_context *smu, uint32_t size);