Lines Matching defs:smu_context
476 struct smu_context struct
478 struct amdgpu_device *adev;
479 struct amdgpu_irq_src irq_source;
481 const struct pptable_funcs *ppt_funcs;
482 const struct cmn2asic_msg_mapping *message_map;
483 const struct cmn2asic_mapping *clock_map;
484 const struct cmn2asic_mapping *feature_map;
485 const struct cmn2asic_mapping *table_map;
486 const struct cmn2asic_mapping *pwr_src_map;
487 const struct cmn2asic_mapping *workload_map;
488 struct mutex mutex;
489 struct mutex sensor_lock;
490 struct mutex metrics_lock;
491 struct mutex message_lock;
492 uint64_t pool_size;
494 struct smu_table_context smu_table;
495 struct smu_dpm_context smu_dpm;
496 struct smu_power_context smu_power;
497 struct smu_feature smu_feature;
498 struct amd_pp_display_configuration *display_config;
499 struct smu_baco_context smu_baco;
500 struct smu_temperature_range thermal_range;
501 void *od_settings;
503 struct smu_umd_pstate_table pstate_table;
504 uint32_t pstate_sclk;
505 uint32_t pstate_mclk;
507 bool od_enabled;
508 uint32_t current_power_limit;
509 uint32_t default_power_limit;
510 uint32_t max_power_limit;
513 uint32_t ppt_offset_bytes;
514 uint32_t ppt_size_bytes;
515 uint8_t *ppt_start_addr;
517 bool support_power_containment;
518 bool disable_watermark;
522 uint32_t watermarks_bitmap;
523 uint32_t hard_min_uclk_req_from_dal;
524 bool disable_uclk_switch;
526 uint32_t workload_mask;
527 uint32_t workload_prority[WORKLOAD_POLICY_MAX];
528 uint32_t workload_setting[WORKLOAD_POLICY_MAX];
529 uint32_t power_profile_mode;
530 uint32_t default_power_profile_mode;
531 bool pm_enabled;
532 bool is_apu;
534 uint32_t smc_driver_if_version;
535 uint32_t smc_fw_if_version;
536 uint32_t smc_fw_version;
538 bool uploading_custom_pp_table;
539 bool dc_controlled_by_gpio;
541 struct work_struct throttling_logging_work;
542 atomic64_t throttle_int_counter;
543 struct work_struct interrupt_work;
545 unsigned fan_max_rpm;
546 unsigned manual_fan_speed_pwm;
548 uint32_t gfx_default_hard_min_freq;
549 uint32_t gfx_default_soft_max_freq;
550 uint32_t gfx_actual_hard_min_freq;
551 uint32_t gfx_actual_soft_max_freq;
575 int (*run_btc)(struct smu_context *smu); argument