662 				u32 index, u32 sclk)  in kv_set_divider_value()  argument
669 						 sclk, false, &dividers);  in kv_set_divider_value()
674 	pi->graphics_level[index].SclkFrequency = cpu_to_be32(sclk);  in kv_set_divider_value()
807 			if (table->entries[i].clk == pi->boot_pl.sclk)  in kv_program_bootup_state()
821 			if (table->entries[i].sclk_frequency == pi->boot_pl.sclk)  in kv_program_bootup_state()
1768 			if ((table->entries[i].clk >= new_ps->levels[0].sclk) ||  in kv_set_valid_clock_range()
1776 			if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk)  in kv_set_valid_clock_range()
1782 			if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].clk) >  in kv_set_valid_clock_range()
1783 			    (table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk))  in kv_set_valid_clock_range()
1793 			if (table->entries[i].sclk_frequency >= new_ps->levels[0].sclk ||  in kv_set_valid_clock_range()
1802 			    new_ps->levels[new_ps->num_levels - 1].sclk)  in kv_set_valid_clock_range()
1808 			if ((new_ps->levels[0].sclk -  in kv_set_valid_clock_range()
1811 			     new_ps->levels[new_ps->num_levels -1].sclk))  in kv_set_valid_clock_range()
2027 		table->sclk =  in kv_construct_max_power_limits_table()
2083 	pi->boot_pl.sclk = pi->sys_info.bootup_sclk;  in kv_construct_boot_state()
2134 					     u32 sclk, u32 min_sclk_in_sr)  in kv_get_sleep_divider_id_from_clock()  argument
2141 	if (sclk < min)  in kv_get_sleep_divider_id_from_clock()
2148 		temp = sclk >> i;  in kv_get_sleep_divider_id_from_clock()
2197 	u32 sclk, mclk = 0;  in kv_apply_state_adjust_rules()  local
2215 	sclk = min_sclk;  in kv_apply_state_adjust_rules()
2218 		stable_p_state_sclk = (max_limits->sclk * 75) / 100;  in kv_apply_state_adjust_rules()
2230 		sclk = stable_p_state_sclk;  in kv_apply_state_adjust_rules()
2234 		if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk)  in kv_apply_state_adjust_rules()
2235 			sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk;  in kv_apply_state_adjust_rules()
2241 		if (ps->levels[i].sclk < sclk)  in kv_apply_state_adjust_rules()
2242 			ps->levels[i].sclk = sclk;  in kv_apply_state_adjust_rules()
2251 				ps->levels[i].sclk = table->entries[limit].clk;  in kv_apply_state_adjust_rules()
2263 				ps->levels[i].sclk = table->entries[limit].sclk_frequency;  in kv_apply_state_adjust_rules()
2270 			ps->levels[i].sclk = stable_p_state_sclk;  in kv_apply_state_adjust_rules()
2672 	u32 sclk;  in kv_parse_pplib_clock_info()  local
2674 	sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow);  in kv_parse_pplib_clock_info()
2675 	sclk |= clock_info->sumo.ucEngineClockHigh << 16;  in kv_parse_pplib_clock_info()
2676 	pl->sclk = sclk;  in kv_parse_pplib_clock_info()
2762 		u32 sclk;  in kv_parse_power_table()  local
2766 		sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow);  in kv_parse_power_table()
2767 		sclk |= clock_info->sumo.ucEngineClockHigh << 16;  in kv_parse_power_table()
2768 		adev->pm.dpm.vce_states[i].sclk = sclk;  in kv_parse_power_table()
2857 	u32 sclk, tmp;  in kv_dpm_debugfs_print_current_performance_level()  local
2863 		sclk = be32_to_cpu(pi->graphics_level[current_index].SclkFrequency);  in kv_dpm_debugfs_print_current_performance_level()
2871 			   current_index, sclk, vddc);  in kv_dpm_debugfs_print_current_performance_level()
2889 		       i, pl->sclk,  in kv_dpm_print_power_state()
2919 		return requested_state->levels[0].sclk;  in kv_dpm_get_sclk()
2921 		return requested_state->levels[requested_state->num_levels - 1].sclk;  in kv_dpm_get_sclk()
3215 	return ((kv_cpl1->sclk == kv_cpl2->sclk) &&  in kv_are_power_levels_equal()
3269 	uint32_t sclk;  in kv_dpm_read_sensor()  local
3282 			sclk = be32_to_cpu(  in kv_dpm_read_sensor()
3284 			*((uint32_t *)value) = sclk;  in kv_dpm_read_sensor()