215 	u32 cycles;  in nwl_dsi_config_host()  local
233 	cycles = ui2bc(cfg->clk_pre);  in nwl_dsi_config_host()
234 	DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_t_pre: 0x%x\n", cycles);  in nwl_dsi_config_host()
235 	nwl_dsi_write(dsi, NWL_DSI_CFG_T_PRE, cycles);  in nwl_dsi_config_host()
236 	cycles = ps2bc(dsi, cfg->lpx + cfg->clk_prepare + cfg->clk_zero);  in nwl_dsi_config_host()
237 	DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_tx_gap (pre): 0x%x\n", cycles);  in nwl_dsi_config_host()
238 	cycles += ui2bc(cfg->clk_pre);  in nwl_dsi_config_host()
239 	DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_t_post: 0x%x\n", cycles);  in nwl_dsi_config_host()
240 	nwl_dsi_write(dsi, NWL_DSI_CFG_T_POST, cycles);  in nwl_dsi_config_host()
241 	cycles = ps2bc(dsi, cfg->hs_exit);  in nwl_dsi_config_host()
242 	DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_tx_gap: 0x%x\n", cycles);  in nwl_dsi_config_host()
243 	nwl_dsi_write(dsi, NWL_DSI_CFG_TX_GAP, cycles);  in nwl_dsi_config_host()
250 	cycles = us2lp(cfg->lp_clk_rate, cfg->wakeup);  in nwl_dsi_config_host()
251 	DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_twakeup: 0x%x\n", cycles);  in nwl_dsi_config_host()
252 	nwl_dsi_write(dsi, NWL_DSI_CFG_TWAKEUP, cycles);  in nwl_dsi_config_host()