14 int gen2_emit_flush(struct i915_request *rq, u32 mode)  in gen2_emit_flush()  argument
23 	cs = intel_ring_begin(rq, 2 + 4 * num_store_dw);  in gen2_emit_flush()
36 	intel_ring_advance(rq, cs);  in gen2_emit_flush()
41 int gen4_emit_flush_rcs(struct i915_request *rq, u32 mode)  in gen4_emit_flush_rcs()  argument
77 		if (IS_G4X(rq->engine->i915) || GRAPHICS_VER(rq->engine->i915) == 5)  in gen4_emit_flush_rcs()
85 	cs = intel_ring_begin(rq, i);  in gen4_emit_flush_rcs()
103 		*cs++ = intel_gt_scratch_offset(rq->engine->gt,  in gen4_emit_flush_rcs()
113 		*cs++ = intel_gt_scratch_offset(rq->engine->gt,  in gen4_emit_flush_rcs()
122 	intel_ring_advance(rq, cs);  in gen4_emit_flush_rcs()
127 int gen4_emit_flush_vcs(struct i915_request *rq, u32 mode)  in gen4_emit_flush_vcs()  argument
131 	cs = intel_ring_begin(rq, 2);  in gen4_emit_flush_vcs()
137 	intel_ring_advance(rq, cs);  in gen4_emit_flush_vcs()
142 static u32 *__gen2_emit_breadcrumb(struct i915_request *rq, u32 *cs,  in __gen2_emit_breadcrumb()  argument
145 	GEM_BUG_ON(i915_request_active_timeline(rq)->hwsp_ggtt != rq->engine->status_page.vma);  in __gen2_emit_breadcrumb()
146 	GEM_BUG_ON(offset_in_page(rq->hwsp_seqno) != I915_GEM_HWS_SEQNO_ADDR);  in __gen2_emit_breadcrumb()
153 		*cs++ = rq->fence.seqno;  in __gen2_emit_breadcrumb()
159 		*cs++ = rq->fence.seqno;  in __gen2_emit_breadcrumb()
164 	rq->tail = intel_ring_offset(rq, cs);  in __gen2_emit_breadcrumb()
165 	assert_ring_tail_valid(rq->ring, rq->tail);  in __gen2_emit_breadcrumb()
170 u32 *gen3_emit_breadcrumb(struct i915_request *rq, u32 *cs)  in gen3_emit_breadcrumb()  argument
172 	return __gen2_emit_breadcrumb(rq, cs, 16, 8);  in gen3_emit_breadcrumb()
175 u32 *gen5_emit_breadcrumb(struct i915_request *rq, u32 *cs)  in gen5_emit_breadcrumb()  argument
177 	return __gen2_emit_breadcrumb(rq, cs, 8, 8);  in gen5_emit_breadcrumb()
184 int i830_emit_bb_start(struct i915_request *rq,  in i830_emit_bb_start()  argument
189 		intel_gt_scratch_offset(rq->engine->gt,  in i830_emit_bb_start()
192 	GEM_BUG_ON(rq->engine->gt->scratch->size < I830_WA_SIZE);  in i830_emit_bb_start()
194 	cs = intel_ring_begin(rq, 6);  in i830_emit_bb_start()
205 	intel_ring_advance(rq, cs);  in i830_emit_bb_start()
211 		cs = intel_ring_begin(rq, 6 + 2);  in i830_emit_bb_start()
229 		intel_ring_advance(rq, cs);  in i830_emit_bb_start()
238 	cs = intel_ring_begin(rq, 2);  in i830_emit_bb_start()
244 	intel_ring_advance(rq, cs);  in i830_emit_bb_start()
249 int gen3_emit_bb_start(struct i915_request *rq,  in gen3_emit_bb_start()  argument
258 	cs = intel_ring_begin(rq, 2);  in gen3_emit_bb_start()
264 	intel_ring_advance(rq, cs);  in gen3_emit_bb_start()
269 int gen4_emit_bb_start(struct i915_request *rq,  in gen4_emit_bb_start()  argument
280 	cs = intel_ring_begin(rq, 2);  in gen4_emit_bb_start()
286 	intel_ring_advance(rq, cs);  in gen4_emit_bb_start()