2043 #define MG_PHY_PORT_LN(ln, tc_port, ln0p1, ln0p2, ln1p1) \  argument
2044 	_MMIO(_PORT(tc_port, ln0p1, ln0p2) + (ln) * ((ln1p1) - (ln0p1)))
2054 #define MG_TX1_LINK_PARAMS(ln, tc_port) \  argument
2055 	MG_PHY_PORT_LN(ln, tc_port, MG_TX_LINK_PARAMS_TX1LN0_PORT1, \
2067 #define MG_TX2_LINK_PARAMS(ln, tc_port) \  argument
2068 	MG_PHY_PORT_LN(ln, tc_port, MG_TX_LINK_PARAMS_TX2LN0_PORT1, \
2081 #define MG_TX1_PISO_READLOAD(ln, tc_port) \  argument
2082 	MG_PHY_PORT_LN(ln, tc_port, MG_TX_PISO_READLOAD_TX1LN0_PORT1, \
2094 #define MG_TX2_PISO_READLOAD(ln, tc_port) \  argument
2095 	MG_PHY_PORT_LN(ln, tc_port, MG_TX_PISO_READLOAD_TX2LN0_PORT1, \
2108 #define MG_TX1_SWINGCTRL(ln, tc_port) \  argument
2109 	MG_PHY_PORT_LN(ln, tc_port, MG_TX_SWINGCTRL_TX1LN0_PORT1, \
2121 #define MG_TX2_SWINGCTRL(ln, tc_port) \  argument
2122 	MG_PHY_PORT_LN(ln, tc_port, MG_TX_SWINGCTRL_TX2LN0_PORT1, \
2136 #define MG_TX1_DRVCTRL(ln, tc_port) \  argument
2137 	MG_PHY_PORT_LN(ln, tc_port, MG_TX_DRVCTRL_TX1LN0_TXPORT1, \
2149 #define MG_TX2_DRVCTRL(ln, tc_port) \  argument
2150 	MG_PHY_PORT_LN(ln, tc_port, MG_TX_DRVCTRL_TX2LN0_PORT1, \
2169 #define MG_CLKHUB(ln, tc_port) \  argument
2170 	MG_PHY_PORT_LN(ln, tc_port, MG_CLKHUB_LN0_PORT1, \
2183 #define MG_TX1_DCC(ln, tc_port) \  argument
2184 	MG_PHY_PORT_LN(ln, tc_port, MG_TX_DCC_TX1LN0_PORT1, \
2195 #define MG_TX2_DCC(ln, tc_port) \  argument
2196 	MG_PHY_PORT_LN(ln, tc_port, MG_TX_DCC_TX2LN0_PORT1, \
2211 #define MG_DP_MODE(ln, tc_port)	\  argument
2212 	MG_PHY_PORT_LN(ln, tc_port, MG_DP_MODE_LN0_ACU_PORT1, \
10564 #define  ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port)	(1 << ((tc_port) < TC_PORT_4 ? \  argument
10565 						       (tc_port) + 12 : \
10566 						       (tc_port) - TC_PORT_4 + 21))
10639 #define MG_PLL_ENABLE(tc_port)	_MMIO_PORT((tc_port), _MG_PLL1_ENABLE, \  argument
10650 #define ADLP_PORTTC_PLL_ENABLE(tc_port)		_MMIO_PORT((tc_port), \  argument
10660 #define MG_REFCLKIN_CTL(tc_port) _MMIO_PORT((tc_port), \  argument
10672 #define MG_CLKTOP2_CORECLKCTL1(tc_port) _MMIO_PORT((tc_port), \  argument
10692 #define MG_CLKTOP2_HSCLKCTL(tc_port) _MMIO_PORT((tc_port), \  argument
10706 #define MG_PLL_DIV0(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV0_PORT1, \  argument
10721 #define MG_PLL_DIV1(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV1_PORT1, \  argument
10734 #define MG_PLL_LF(tc_port) _MMIO_PORT((tc_port), _MG_PLL_LF_PORT1, \  argument
10747 #define MG_PLL_FRAC_LOCK(tc_port) _MMIO_PORT((tc_port), \  argument
10761 #define MG_PLL_SSC(tc_port) _MMIO_PORT((tc_port), _MG_PLL_SSC_PORT1, \  argument
10781 #define MG_PLL_BIAS(tc_port) _MMIO_PORT((tc_port), _MG_PLL_BIAS_PORT1, \  argument
10793 #define MG_PLL_TDC_COLDST_BIAS(tc_port) _MMIO_PORT((tc_port), \  argument
10909 #define DKL_PLL_DIV0(tc_port)		_MMIO(_PORT(tc_port, _DKL_PHY1_BASE, \  argument
10918 #define DKL_PLL_DIV1(tc_port)		_MMIO(_PORT(tc_port, _DKL_PHY1_BASE, \  argument
10930 #define DKL_PLL_SSC(tc_port)		_MMIO(_PORT(tc_port, _DKL_PHY1_BASE, \  argument
10939 #define DKL_PLL_BIAS(tc_port)		_MMIO(_PORT(tc_port, _DKL_PHY1_BASE, \  argument
10948 #define DKL_PLL_TDC_COLDST_BIAS(tc_port) _MMIO(_PORT(tc_port, \  argument
10955 #define DKL_REFCLKIN_CTL(tc_port)	_MMIO(_PORT(tc_port, \  argument
10962 #define DKL_CLKTOP2_HSCLKCTL(tc_port)	_MMIO(_PORT(tc_port, \  argument
10969 #define DKL_CLKTOP2_CORECLKCTL1(tc_port)	_MMIO(_PORT(tc_port, \  argument
10981 #define DKL_TX_DPCNTL0(tc_port) _MMIO(_PORT(tc_port, \  argument
10988 #define DKL_TX_DPCNTL1(tc_port) _MMIO(_PORT(tc_port, \  argument
10996 #define DKL_TX_DPCNTL2(tc_port) _MMIO(_PORT(tc_port, \  argument
11003 #define DKL_TX_FW_CALIB(tc_port) _MMIO(_PORT(tc_port, \  argument
11009 #define DKL_TX_PMD_LANE_SUS(tc_port) _MMIO(_PORT(tc_port, \  argument
11015 #define DKL_TX_DW17(tc_port) _MMIO(_PORT(tc_port, \  argument
11021 #define DKL_TX_DW18(tc_port) _MMIO(_PORT(tc_port, \  argument
11027 #define DKL_DP_MODE(tc_port) _MMIO(_PORT(tc_port, \  argument
11034 #define DKL_CMN_UC_DW_27(tc_port)		_MMIO(_PORT(tc_port, \  argument
11047 #define HIP_INDEX_REG(tc_port)		_MMIO((tc_port) < 4 ? _HIP_INDEX_REG0 \  argument
11049 #define _HIP_INDEX_SHIFT(tc_port)	(8 * ((tc_port) % 4))  argument
11050 #define HIP_INDEX_VAL(tc_port, val)	((val) << _HIP_INDEX_SHIFT(tc_port))  argument