500 	struct pll_7nm_cached_state *cached = &pll_7nm->cached_state;  in dsi_7nm_pll_save_state()  local
504 	cached->pll_out_div = dsi_phy_read(pll_7nm->phy->pll_base +  in dsi_7nm_pll_save_state()
506 	cached->pll_out_div &= 0x3;  in dsi_7nm_pll_save_state()
509 	cached->bit_clk_div = cmn_clk_cfg0 & 0xf;  in dsi_7nm_pll_save_state()
510 	cached->pix_clk_div = (cmn_clk_cfg0 & 0xf0) >> 4;  in dsi_7nm_pll_save_state()
513 	cached->pll_mux = cmn_clk_cfg1 & 0x3;  in dsi_7nm_pll_save_state()
516 	    pll_7nm->phy->id, cached->pll_out_div, cached->bit_clk_div,  in dsi_7nm_pll_save_state()
517 	    cached->pix_clk_div, cached->pll_mux);  in dsi_7nm_pll_save_state()
523 	struct pll_7nm_cached_state *cached = &pll_7nm->cached_state;  in dsi_7nm_pll_restore_state()  local
530 	val |= cached->pll_out_div;  in dsi_7nm_pll_restore_state()
534 		  cached->bit_clk_div | (cached->pix_clk_div << 4));  in dsi_7nm_pll_restore_state()
538 	val |= cached->pll_mux;  in dsi_7nm_pll_restore_state()