560 				data = RREG32_SMC(config_regs->offset);  in ci_program_pt_config_registers()
862 	tmp = RREG32_SMC(CG_THERMAL_INT);  in ci_thermal_set_temperature_range()
870 	tmp = RREG32_SMC(CG_THERMAL_CTRL);  in ci_thermal_set_temperature_range()
885 	u32 thermal_int = RREG32_SMC(CG_THERMAL_INT);  in ci_thermal_enable_alert()
917 		tmp = (RREG32_SMC(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK) >> FDO_PWM_MODE_SHIFT;  in ci_fan_ctrl_set_static_mode()
919 		tmp = (RREG32_SMC(CG_FDO_CTRL2) & TMIN_MASK) >> TMIN_SHIFT;  in ci_fan_ctrl_set_static_mode()
924 	tmp = RREG32_SMC(CG_FDO_CTRL2) & ~TMIN_MASK;  in ci_fan_ctrl_set_static_mode()
928 	tmp = RREG32_SMC(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK;  in ci_fan_ctrl_set_static_mode()
949 	duty100 = (RREG32_SMC(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT;  in ci_thermal_setup_fan_table()
993 	tmp = (RREG32_SMC(CG_MULT_THERMAL_CTRL) & TEMP_SEL_MASK) >> TEMP_SEL_SHIFT;  in ci_thermal_setup_fan_table()
1060 	duty100 = (RREG32_SMC(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT;  in ci_fan_ctrl_get_fan_speed_percent()
1061 	duty = (RREG32_SMC(CG_THERMAL_STATUS) & FDO_PWM_DUTY_MASK) >> FDO_PWM_DUTY_SHIFT;  in ci_fan_ctrl_get_fan_speed_percent()
1093 	duty100 = (RREG32_SMC(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT;  in ci_fan_ctrl_set_fan_speed_percent()
1102 	tmp = RREG32_SMC(CG_FDO_CTRL0) & ~FDO_STATIC_DUTY_MASK;  in ci_fan_ctrl_set_fan_speed_percent()
1133 	tmp = RREG32_SMC(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK;  in ci_fan_ctrl_get_mode()
1150 	tach_period = (RREG32_SMC(CG_TACH_STATUS) & TACH_PERIOD_MASK) >> TACH_PERIOD_SHIFT;
1179 	tmp = RREG32_SMC(CG_TACH_CTRL) & ~TARGET_PERIOD_MASK;
1195 		tmp = RREG32_SMC(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK;  in ci_fan_ctrl_set_default_mode()
1199 		tmp = RREG32_SMC(CG_FDO_CTRL2) & ~TMIN_MASK;  in ci_fan_ctrl_set_default_mode()
1219 		tmp = RREG32_SMC(CG_TACH_CTRL) & ~EDGE_PER_REV_MASK;  in ci_thermal_initialize()
1224 	tmp = RREG32_SMC(CG_FDO_CTRL2) & ~TACH_PWM_RESP_RATE_MASK;  in ci_thermal_initialize()
1380 		tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_set_dpm_event_sources()
1387 		tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_set_dpm_event_sources()
1497 	tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_start_dpm()
1501 	tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);  in ci_start_dpm()
1558 	tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_stop_dpm()
1562 	tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);  in ci_stop_dpm()
1585 	u32 tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);  in ci_enable_sclk_control()
1769 		if (RREG32_SMC(FIRMWARE_FLAGS) & INTERRUPTS_ENABLED)  in ci_dpm_start_smc()
1839 		RREG32_SMC(CG_SPLL_FUNC_CNTL);  in ci_read_clock_registers()
1841 		RREG32_SMC(CG_SPLL_FUNC_CNTL_2);  in ci_read_clock_registers()
1843 		RREG32_SMC(CG_SPLL_FUNC_CNTL_3);  in ci_read_clock_registers()
1845 		RREG32_SMC(CG_SPLL_FUNC_CNTL_4);  in ci_read_clock_registers()
1847 		RREG32_SMC(CG_SPLL_SPREAD_SPECTRUM);  in ci_read_clock_registers()
1849 		RREG32_SMC(CG_SPLL_SPREAD_SPECTRUM_2);  in ci_read_clock_registers()
1871 	u32 tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_enable_thermal_protection()
1882 	u32 tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_enable_acpi_power_management()
1951 	u32 tmp = RREG32_SMC(CG_DISPLAY_GAP_CNTL);  in ci_program_display_gap()
1990 			tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_enable_spread_spectrum()
1995 		tmp = RREG32_SMC(CG_SPLL_SPREAD_SPECTRUM);  in ci_enable_spread_spectrum()
1999 		tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_enable_spread_spectrum()
2012 	u32 tmp = RREG32_SMC(CG_DISPLAY_GAP_CNTL);  in ci_enable_display_gap()
2025 	tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);  in ci_program_vc()
2043 	tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);  in ci_clear_vc()
2063 		if (RREG32_SMC(RCU_UC_EVENTS) & BOOT_SEQ_DONE)  in ci_upload_firmware()
2451 	tmp = (RREG32_SMC(SMC_SCRATCH9) & 0x0000ff00) >> 8;  in ci_force_switch_to_arb_f0()
4054 		tmp = RREG32_SMC(DPM_TABLE_475);  in ci_update_uvd_dpm()
4092 			tmp = RREG32_SMC(DPM_TABLE_475);  in ci_update_vce_dpm()
4122 		tmp = RREG32_SMC(DPM_TABLE_475);
4189 					tmp = (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX_1) &  in ci_dpm_force_performance_level()
4208 					tmp = (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX) &  in ci_dpm_force_performance_level()
4227 					tmp = (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX) &  in ci_dpm_force_performance_level()
4244 				tmp = (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX) &  in ci_dpm_force_performance_level()
4259 				tmp = (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX) &  in ci_dpm_force_performance_level()
4274 				tmp = (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX_1) &  in ci_dpm_force_performance_level()
4755 	u32 tmp = RREG32_SMC(GENERAL_PWRMGT);  in ci_enable_voltage_control()
5824 		u32 tmp = RREG32_SMC(CNB_PWRMGT_CNTL);  in ci_dpm_init()