Lines Matching refs:args
297 struct drm_radeon_gem_info *args = data; in radeon_gem_info_ioctl() local
302 args->vram_size = (u64)man->size << PAGE_SHIFT; in radeon_gem_info_ioctl()
303 args->vram_visible = rdev->mc.visible_vram_size; in radeon_gem_info_ioctl()
304 args->vram_visible -= rdev->vram_pin_size; in radeon_gem_info_ioctl()
305 args->gart_size = rdev->mc.gtt_size; in radeon_gem_info_ioctl()
306 args->gart_size -= rdev->gart_pin_size; in radeon_gem_info_ioctl()
331 struct drm_radeon_gem_create *args = data; in radeon_gem_create_ioctl() local
338 args->size = roundup(args->size, PAGE_SIZE); in radeon_gem_create_ioctl()
339 r = radeon_gem_object_create(rdev, args->size, args->alignment, in radeon_gem_create_ioctl()
340 args->initial_domain, args->flags, in radeon_gem_create_ioctl()
355 args->handle = handle; in radeon_gem_create_ioctl()
365 struct drm_radeon_gem_userptr *args = data; in radeon_gem_userptr_ioctl() local
371 args->addr = untagged_addr(args->addr); in radeon_gem_userptr_ioctl()
373 if (offset_in_page(args->addr | args->size)) in radeon_gem_userptr_ioctl()
377 if (args->flags & ~(RADEON_GEM_USERPTR_READONLY | in radeon_gem_userptr_ioctl()
382 if (args->flags & RADEON_GEM_USERPTR_READONLY) { in radeon_gem_userptr_ioctl()
387 } else if (!(args->flags & RADEON_GEM_USERPTR_ANONONLY) || in radeon_gem_userptr_ioctl()
388 !(args->flags & RADEON_GEM_USERPTR_REGISTER)) { in radeon_gem_userptr_ioctl()
398 r = radeon_gem_object_create(rdev, args->size, 0, in radeon_gem_userptr_ioctl()
405 r = radeon_ttm_tt_set_userptr(rdev, bo->tbo.ttm, args->addr, args->flags); in radeon_gem_userptr_ioctl()
409 if (args->flags & RADEON_GEM_USERPTR_REGISTER) { in radeon_gem_userptr_ioctl()
410 r = radeon_mn_register(bo, args->addr); in radeon_gem_userptr_ioctl()
415 if (args->flags & RADEON_GEM_USERPTR_VALIDATE) { in radeon_gem_userptr_ioctl()
437 args->handle = handle; in radeon_gem_userptr_ioctl()
457 struct drm_radeon_gem_set_domain *args = data; in radeon_gem_set_domain_ioctl() local
466 gobj = drm_gem_object_lookup(filp, args->handle); in radeon_gem_set_domain_ioctl()
472 r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain); in radeon_gem_set_domain_ioctl()
504 struct drm_radeon_gem_mmap *args = data; in radeon_gem_mmap_ioctl() local
506 return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr); in radeon_gem_mmap_ioctl()
512 struct drm_radeon_gem_busy *args = data; in radeon_gem_busy_ioctl() local
518 gobj = drm_gem_object_lookup(filp, args->handle); in radeon_gem_busy_ioctl()
531 args->domain = radeon_mem_type_to_domain(cur_placement); in radeon_gem_busy_ioctl()
540 struct drm_radeon_gem_wait_idle *args = data; in radeon_gem_wait_idle_ioctl() local
547 gobj = drm_gem_object_lookup(filp, args->handle); in radeon_gem_wait_idle_ioctl()
572 struct drm_radeon_gem_set_tiling *args = data; in radeon_gem_set_tiling_ioctl() local
577 DRM_DEBUG("%d \n", args->handle); in radeon_gem_set_tiling_ioctl()
578 gobj = drm_gem_object_lookup(filp, args->handle); in radeon_gem_set_tiling_ioctl()
582 r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch); in radeon_gem_set_tiling_ioctl()
590 struct drm_radeon_gem_get_tiling *args = data; in radeon_gem_get_tiling_ioctl() local
596 gobj = drm_gem_object_lookup(filp, args->handle); in radeon_gem_get_tiling_ioctl()
603 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch); in radeon_gem_get_tiling_ioctl()
675 struct drm_radeon_gem_va *args = data; in radeon_gem_va_ioctl() local
685 args->operation = RADEON_VA_RESULT_ERROR; in radeon_gem_va_ioctl()
694 if (args->vm_id) { in radeon_gem_va_ioctl()
695 args->operation = RADEON_VA_RESULT_ERROR; in radeon_gem_va_ioctl()
699 if (args->offset < RADEON_VA_RESERVED_SIZE) { in radeon_gem_va_ioctl()
702 (unsigned long)args->offset, in radeon_gem_va_ioctl()
704 args->operation = RADEON_VA_RESULT_ERROR; in radeon_gem_va_ioctl()
713 if ((args->flags & invalid_flags)) { in radeon_gem_va_ioctl()
715 args->flags, invalid_flags); in radeon_gem_va_ioctl()
716 args->operation = RADEON_VA_RESULT_ERROR; in radeon_gem_va_ioctl()
720 switch (args->operation) { in radeon_gem_va_ioctl()
726 args->operation); in radeon_gem_va_ioctl()
727 args->operation = RADEON_VA_RESULT_ERROR; in radeon_gem_va_ioctl()
731 gobj = drm_gem_object_lookup(filp, args->handle); in radeon_gem_va_ioctl()
733 args->operation = RADEON_VA_RESULT_ERROR; in radeon_gem_va_ioctl()
739 args->operation = RADEON_VA_RESULT_ERROR; in radeon_gem_va_ioctl()
745 args->operation = RADEON_VA_RESULT_ERROR; in radeon_gem_va_ioctl()
751 switch (args->operation) { in radeon_gem_va_ioctl()
754 args->operation = RADEON_VA_RESULT_VA_EXIST; in radeon_gem_va_ioctl()
755 args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE; in radeon_gem_va_ioctl()
759 r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags); in radeon_gem_va_ioctl()
769 args->operation = RADEON_VA_RESULT_OK; in radeon_gem_va_ioctl()
771 args->operation = RADEON_VA_RESULT_ERROR; in radeon_gem_va_ioctl()
781 struct drm_radeon_gem_op *args = data; in radeon_gem_op_ioctl() local
786 gobj = drm_gem_object_lookup(filp, args->handle); in radeon_gem_op_ioctl()
800 switch (args->op) { in radeon_gem_op_ioctl()
802 args->value = robj->initial_domain; in radeon_gem_op_ioctl()
805 robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM | in radeon_gem_op_ioctl()
821 struct drm_mode_create_dumb *args) in radeon_mode_dumb_create() argument
828 args->pitch = radeon_align_pitch(rdev, args->width, in radeon_mode_dumb_create()
829 DIV_ROUND_UP(args->bpp, 8), 0); in radeon_mode_dumb_create()
830 args->size = args->pitch * args->height; in radeon_mode_dumb_create()
831 args->size = ALIGN(args->size, PAGE_SIZE); in radeon_mode_dumb_create()
833 r = radeon_gem_object_create(rdev, args->size, 0, in radeon_mode_dumb_create()
845 args->handle = handle; in radeon_mode_dumb_create()