545 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_divider_value()  local
552 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);  in trinity_set_divider_value()
555 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);  in trinity_set_divider_value()
562 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix);  in trinity_set_divider_value()
565 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix, value);  in trinity_set_divider_value()
572 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_ds_dividers()  local
574 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);  in trinity_set_ds_dividers()
577 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);  in trinity_set_ds_dividers()
584 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_ss_dividers()  local
586 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);  in trinity_set_ss_dividers()
589 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);  in trinity_set_ss_dividers()
597 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_vid()  local
599 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);  in trinity_set_vid()
602 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);  in trinity_set_vid()
604 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);  in trinity_set_vid()
607 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);  in trinity_set_vid()
614 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_allos_gnb_slow()  local
616 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix);  in trinity_set_allos_gnb_slow()
619 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value);  in trinity_set_allos_gnb_slow()
626 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_force_nbp_state()  local
628 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix);  in trinity_set_force_nbp_state()
631 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value);  in trinity_set_force_nbp_state()
638 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_display_wm()  local
640 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);  in trinity_set_display_wm()
643 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);  in trinity_set_display_wm()
650 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_vce_wm()  local
652 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);  in trinity_set_vce_wm()
655 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);  in trinity_set_vce_wm()
662 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_at()  local
664 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix);  in trinity_set_at()
667 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix, value);  in trinity_set_at()
693 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_power_level_enable_disable()  local
695 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);  in trinity_power_level_enable_disable()
699 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);  in trinity_power_level_enable_disable()